kvm/ppc/e500: g2h_tlb1_map: clear old bit before setting new bit
[linux-2.6-block.git] / arch / powerpc / kvm / e500_mmu_host.c
CommitLineData
b71c9e2f
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1/*
2 * Copyright (C) 2008-2013 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * Author: Yu Liu, yu.liu@freescale.com
5 * Scott Wood, scottwood@freescale.com
6 * Ashish Kalra, ashish.kalra@freescale.com
7 * Varun Sethi, varun.sethi@freescale.com
8 * Alexander Graf, agraf@suse.de
9 *
10 * Description:
11 * This file is based on arch/powerpc/kvm/44x_tlb.c,
12 * by Hollis Blanchard <hollisb@us.ibm.com>.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License, version 2, as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/kernel.h>
20#include <linux/types.h>
21#include <linux/slab.h>
22#include <linux/string.h>
23#include <linux/kvm.h>
24#include <linux/kvm_host.h>
25#include <linux/highmem.h>
26#include <linux/log2.h>
27#include <linux/uaccess.h>
28#include <linux/sched.h>
29#include <linux/rwsem.h>
30#include <linux/vmalloc.h>
31#include <linux/hugetlb.h>
32#include <asm/kvm_ppc.h>
33
34#include "e500.h"
35#include "trace.h"
36#include "timing.h"
37#include "e500_mmu_host.h"
38
39#define to_htlb1_esel(esel) (host_tlb_params[1].entries - (esel) - 1)
40
41static struct kvmppc_e500_tlb_params host_tlb_params[E500_TLB_NUM];
42
43static inline unsigned int tlb1_max_shadow_size(void)
44{
45 /* reserve one entry for magic page */
46 return host_tlb_params[1].entries - tlbcam_index - 1;
47}
48
49static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)
50{
51 /* Mask off reserved bits. */
52 mas3 &= MAS3_ATTRIB_MASK;
53
54#ifndef CONFIG_KVM_BOOKE_HV
55 if (!usermode) {
56 /* Guest is in supervisor mode,
57 * so we need to translate guest
58 * supervisor permissions into user permissions. */
59 mas3 &= ~E500_TLB_USER_PERM_MASK;
60 mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1;
61 }
62 mas3 |= E500_TLB_SUPER_PERM_MASK;
63#endif
64 return mas3;
65}
66
67static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)
68{
69#ifdef CONFIG_SMP
70 return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;
71#else
72 return mas2 & MAS2_ATTRIB_MASK;
73#endif
74}
75
76/*
77 * writing shadow tlb entry to host TLB
78 */
79static inline void __write_host_tlbe(struct kvm_book3e_206_tlb_entry *stlbe,
80 uint32_t mas0)
81{
82 unsigned long flags;
83
84 local_irq_save(flags);
85 mtspr(SPRN_MAS0, mas0);
86 mtspr(SPRN_MAS1, stlbe->mas1);
87 mtspr(SPRN_MAS2, (unsigned long)stlbe->mas2);
88 mtspr(SPRN_MAS3, (u32)stlbe->mas7_3);
89 mtspr(SPRN_MAS7, (u32)(stlbe->mas7_3 >> 32));
90#ifdef CONFIG_KVM_BOOKE_HV
91 mtspr(SPRN_MAS8, stlbe->mas8);
92#endif
93 asm volatile("isync; tlbwe" : : : "memory");
94
95#ifdef CONFIG_KVM_BOOKE_HV
96 /* Must clear mas8 for other host tlbwe's */
97 mtspr(SPRN_MAS8, 0);
98 isync();
99#endif
100 local_irq_restore(flags);
101
102 trace_kvm_booke206_stlb_write(mas0, stlbe->mas8, stlbe->mas1,
103 stlbe->mas2, stlbe->mas7_3);
104}
105
106/*
107 * Acquire a mas0 with victim hint, as if we just took a TLB miss.
108 *
109 * We don't care about the address we're searching for, other than that it's
110 * in the right set and is not present in the TLB. Using a zero PID and a
111 * userspace address means we don't have to set and then restore MAS5, or
112 * calculate a proper MAS6 value.
113 */
114static u32 get_host_mas0(unsigned long eaddr)
115{
116 unsigned long flags;
117 u32 mas0;
118
119 local_irq_save(flags);
120 mtspr(SPRN_MAS6, 0);
121 asm volatile("tlbsx 0, %0" : : "b" (eaddr & ~CONFIG_PAGE_OFFSET));
122 mas0 = mfspr(SPRN_MAS0);
123 local_irq_restore(flags);
124
125 return mas0;
126}
127
128/* sesel is for tlb1 only */
129static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
130 int tlbsel, int sesel, struct kvm_book3e_206_tlb_entry *stlbe)
131{
132 u32 mas0;
133
134 if (tlbsel == 0) {
135 mas0 = get_host_mas0(stlbe->mas2);
136 __write_host_tlbe(stlbe, mas0);
137 } else {
138 __write_host_tlbe(stlbe,
139 MAS0_TLBSEL(1) |
140 MAS0_ESEL(to_htlb1_esel(sesel)));
141 }
142}
143
144/* sesel is for tlb1 only */
145static void write_stlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
146 struct kvm_book3e_206_tlb_entry *gtlbe,
147 struct kvm_book3e_206_tlb_entry *stlbe,
148 int stlbsel, int sesel)
149{
150 int stid;
151
152 preempt_disable();
153 stid = kvmppc_e500_get_tlb_stid(&vcpu_e500->vcpu, gtlbe);
154
155 stlbe->mas1 |= MAS1_TID(stid);
156 write_host_tlbe(vcpu_e500, stlbsel, sesel, stlbe);
157 preempt_enable();
158}
159
160#ifdef CONFIG_KVM_E500V2
161/* XXX should be a hook in the gva2hpa translation */
162void kvmppc_map_magic(struct kvm_vcpu *vcpu)
163{
164 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
165 struct kvm_book3e_206_tlb_entry magic;
166 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
167 unsigned int stid;
168 pfn_t pfn;
169
170 pfn = (pfn_t)virt_to_phys((void *)shared_page) >> PAGE_SHIFT;
171 get_page(pfn_to_page(pfn));
172
173 preempt_disable();
174 stid = kvmppc_e500_get_sid(vcpu_e500, 0, 0, 0, 0);
175
176 magic.mas1 = MAS1_VALID | MAS1_TS | MAS1_TID(stid) |
177 MAS1_TSIZE(BOOK3E_PAGESZ_4K);
178 magic.mas2 = vcpu->arch.magic_page_ea | MAS2_M;
179 magic.mas7_3 = ((u64)pfn << PAGE_SHIFT) |
180 MAS3_SW | MAS3_SR | MAS3_UW | MAS3_UR;
181 magic.mas8 = 0;
182
183 __write_host_tlbe(&magic, MAS0_TLBSEL(1) | MAS0_ESEL(tlbcam_index));
184 preempt_enable();
185}
186#endif
187
188void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel,
189 int esel)
190{
191 struct kvm_book3e_206_tlb_entry *gtlbe =
192 get_entry(vcpu_e500, tlbsel, esel);
193 struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[tlbsel][esel].ref;
194
195 /* Don't bother with unmapped entries */
196 if (!(ref->flags & E500_TLB_VALID))
197 return;
198
199 if (tlbsel == 1 && ref->flags & E500_TLB_BITMAP) {
200 u64 tmp = vcpu_e500->g2h_tlb1_map[esel];
201 int hw_tlb_indx;
202 unsigned long flags;
203
204 local_irq_save(flags);
205 while (tmp) {
206 hw_tlb_indx = __ilog2_u64(tmp & -tmp);
207 mtspr(SPRN_MAS0,
208 MAS0_TLBSEL(1) |
209 MAS0_ESEL(to_htlb1_esel(hw_tlb_indx)));
210 mtspr(SPRN_MAS1, 0);
211 asm volatile("tlbwe");
212 vcpu_e500->h2g_tlb1_rmap[hw_tlb_indx] = 0;
213 tmp &= tmp - 1;
214 }
215 mb();
216 vcpu_e500->g2h_tlb1_map[esel] = 0;
217 ref->flags &= ~(E500_TLB_BITMAP | E500_TLB_VALID);
218 local_irq_restore(flags);
c015c62b 219 }
b71c9e2f 220
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221 if (tlbsel == 1 && ref->flags & E500_TLB_TLB0) {
222 /*
223 * TLB1 entry is backed by 4k pages. This should happen
224 * rarely and is not worth optimizing. Invalidate everything.
225 */
226 kvmppc_e500_tlbil_all(vcpu_e500);
227 ref->flags &= ~(E500_TLB_TLB0 | E500_TLB_VALID);
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228 }
229
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230 /* Already invalidated in between */
231 if (!(ref->flags & E500_TLB_VALID))
232 return;
233
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234 /* Guest tlbe is backed by at most one host tlbe per shadow pid. */
235 kvmppc_e500_tlbil_one(vcpu_e500, gtlbe);
236
237 /* Mark the TLB as not backed by the host anymore */
238 ref->flags &= ~E500_TLB_VALID;
239}
240
241static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)
242{
243 return tlbe->mas7_3 & (MAS3_SW|MAS3_UW);
244}
245
246static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
247 struct kvm_book3e_206_tlb_entry *gtlbe,
248 pfn_t pfn)
249{
250 ref->pfn = pfn;
251 ref->flags = E500_TLB_VALID;
252
253 if (tlbe_is_writable(gtlbe))
254 kvm_set_pfn_dirty(pfn);
255}
256
257static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
258{
259 if (ref->flags & E500_TLB_VALID) {
260 trace_kvm_booke206_ref_release(ref->pfn, ref->flags);
261 ref->flags = 0;
262 }
263}
264
483ba97c 265static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500)
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266{
267 if (vcpu_e500->g2h_tlb1_map)
268 memset(vcpu_e500->g2h_tlb1_map, 0,
269 sizeof(u64) * vcpu_e500->gtlb_params[1].entries);
270 if (vcpu_e500->h2g_tlb1_rmap)
271 memset(vcpu_e500->h2g_tlb1_rmap, 0,
272 sizeof(unsigned int) * host_tlb_params[1].entries);
273}
274
275static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
276{
277 int tlbsel = 0;
278 int i;
279
280 for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
281 struct tlbe_ref *ref =
282 &vcpu_e500->gtlb_priv[tlbsel][i].ref;
283 kvmppc_e500_ref_release(ref);
284 }
285}
286
483ba97c 287static void clear_tlb_refs(struct kvmppc_vcpu_e500 *vcpu_e500)
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288{
289 int stlbsel = 1;
290 int i;
291
292 kvmppc_e500_tlbil_all(vcpu_e500);
293
294 for (i = 0; i < host_tlb_params[stlbsel].entries; i++) {
295 struct tlbe_ref *ref =
296 &vcpu_e500->tlb_refs[stlbsel][i];
297 kvmppc_e500_ref_release(ref);
298 }
299
300 clear_tlb_privs(vcpu_e500);
301}
302
303void kvmppc_core_flush_tlb(struct kvm_vcpu *vcpu)
304{
305 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
306 clear_tlb_refs(vcpu_e500);
307 clear_tlb1_bitmap(vcpu_e500);
308}
309
310/* TID must be supplied by the caller */
311static void kvmppc_e500_setup_stlbe(
312 struct kvm_vcpu *vcpu,
313 struct kvm_book3e_206_tlb_entry *gtlbe,
314 int tsize, struct tlbe_ref *ref, u64 gvaddr,
315 struct kvm_book3e_206_tlb_entry *stlbe)
316{
317 pfn_t pfn = ref->pfn;
318 u32 pr = vcpu->arch.shared->msr & MSR_PR;
319
320 BUG_ON(!(ref->flags & E500_TLB_VALID));
321
322 /* Force IPROT=0 for all guest mappings. */
323 stlbe->mas1 = MAS1_TSIZE(tsize) | get_tlb_sts(gtlbe) | MAS1_VALID;
324 stlbe->mas2 = (gvaddr & MAS2_EPN) |
325 e500_shadow_mas2_attrib(gtlbe->mas2, pr);
326 stlbe->mas7_3 = ((u64)pfn << PAGE_SHIFT) |
327 e500_shadow_mas3_attrib(gtlbe->mas7_3, pr);
328
329#ifdef CONFIG_KVM_BOOKE_HV
330 stlbe->mas8 = MAS8_TGS | vcpu->kvm->arch.lpid;
331#endif
332}
333
334static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
335 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
336 int tlbsel, struct kvm_book3e_206_tlb_entry *stlbe,
337 struct tlbe_ref *ref)
338{
339 struct kvm_memory_slot *slot;
340 unsigned long pfn = 0; /* silence GCC warning */
341 unsigned long hva;
342 int pfnmap = 0;
343 int tsize = BOOK3E_PAGESZ_4K;
344
345 /*
346 * Translate guest physical to true physical, acquiring
347 * a page reference if it is normal, non-reserved memory.
348 *
349 * gfn_to_memslot() must succeed because otherwise we wouldn't
350 * have gotten this far. Eventually we should just pass the slot
351 * pointer through from the first lookup.
352 */
353 slot = gfn_to_memslot(vcpu_e500->vcpu.kvm, gfn);
354 hva = gfn_to_hva_memslot(slot, gfn);
355
356 if (tlbsel == 1) {
357 struct vm_area_struct *vma;
358 down_read(&current->mm->mmap_sem);
359
360 vma = find_vma(current->mm, hva);
361 if (vma && hva >= vma->vm_start &&
362 (vma->vm_flags & VM_PFNMAP)) {
363 /*
364 * This VMA is a physically contiguous region (e.g.
365 * /dev/mem) that bypasses normal Linux page
366 * management. Find the overlap between the
367 * vma and the memslot.
368 */
369
370 unsigned long start, end;
371 unsigned long slot_start, slot_end;
372
373 pfnmap = 1;
374
375 start = vma->vm_pgoff;
376 end = start +
377 ((vma->vm_end - vma->vm_start) >> PAGE_SHIFT);
378
379 pfn = start + ((hva - vma->vm_start) >> PAGE_SHIFT);
380
381 slot_start = pfn - (gfn - slot->base_gfn);
382 slot_end = slot_start + slot->npages;
383
384 if (start < slot_start)
385 start = slot_start;
386 if (end > slot_end)
387 end = slot_end;
388
389 tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
390 MAS1_TSIZE_SHIFT;
391
392 /*
393 * e500 doesn't implement the lowest tsize bit,
394 * or 1K pages.
395 */
396 tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
397
398 /*
399 * Now find the largest tsize (up to what the guest
400 * requested) that will cover gfn, stay within the
401 * range, and for which gfn and pfn are mutually
402 * aligned.
403 */
404
405 for (; tsize > BOOK3E_PAGESZ_4K; tsize -= 2) {
406 unsigned long gfn_start, gfn_end, tsize_pages;
407 tsize_pages = 1 << (tsize - 2);
408
409 gfn_start = gfn & ~(tsize_pages - 1);
410 gfn_end = gfn_start + tsize_pages;
411
412 if (gfn_start + pfn - gfn < start)
413 continue;
414 if (gfn_end + pfn - gfn > end)
415 continue;
416 if ((gfn & (tsize_pages - 1)) !=
417 (pfn & (tsize_pages - 1)))
418 continue;
419
420 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
421 pfn &= ~(tsize_pages - 1);
422 break;
423 }
424 } else if (vma && hva >= vma->vm_start &&
425 (vma->vm_flags & VM_HUGETLB)) {
426 unsigned long psize = vma_kernel_pagesize(vma);
427
428 tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
429 MAS1_TSIZE_SHIFT;
430
431 /*
432 * Take the largest page size that satisfies both host
433 * and guest mapping
434 */
435 tsize = min(__ilog2(psize) - 10, tsize);
436
437 /*
438 * e500 doesn't implement the lowest tsize bit,
439 * or 1K pages.
440 */
441 tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
442 }
443
444 up_read(&current->mm->mmap_sem);
445 }
446
447 if (likely(!pfnmap)) {
448 unsigned long tsize_pages = 1 << (tsize + 10 - PAGE_SHIFT);
449 pfn = gfn_to_pfn_memslot(slot, gfn);
450 if (is_error_noslot_pfn(pfn)) {
451 printk(KERN_ERR "Couldn't get real page for gfn %lx!\n",
452 (long)gfn);
453 return -EINVAL;
454 }
455
456 /* Align guest and physical address to page map boundaries */
457 pfn &= ~(tsize_pages - 1);
458 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
459 }
460
461 /* Drop old ref and setup new one. */
462 kvmppc_e500_ref_release(ref);
463 kvmppc_e500_ref_setup(ref, gtlbe, pfn);
464
465 kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
466 ref, gvaddr, stlbe);
467
468 /* Clear i-cache for new pages */
469 kvmppc_mmu_flush_icache(pfn);
470
471 /* Drop refcount on page, so that mmu notifiers can clear it */
472 kvm_release_pfn_clean(pfn);
473
474 return 0;
475}
476
477/* XXX only map the one-one case, for now use TLB0 */
478static int kvmppc_e500_tlb0_map(struct kvmppc_vcpu_e500 *vcpu_e500, int esel,
479 struct kvm_book3e_206_tlb_entry *stlbe)
480{
481 struct kvm_book3e_206_tlb_entry *gtlbe;
482 struct tlbe_ref *ref;
483 int stlbsel = 0;
484 int sesel = 0;
485 int r;
486
487 gtlbe = get_entry(vcpu_e500, 0, esel);
488 ref = &vcpu_e500->gtlb_priv[0][esel].ref;
489
490 r = kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
491 get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
492 gtlbe, 0, stlbe, ref);
493 if (r)
494 return r;
495
496 write_stlbe(vcpu_e500, gtlbe, stlbe, stlbsel, sesel);
497
498 return 0;
499}
500
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501static int kvmppc_e500_tlb1_map_tlb1(struct kvmppc_vcpu_e500 *vcpu_e500,
502 struct tlbe_ref *ref,
503 int esel)
504{
505 unsigned int sesel = vcpu_e500->host_tlb1_nv++;
506
507 if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size()))
508 vcpu_e500->host_tlb1_nv = 0;
509
c015c62b 510 if (vcpu_e500->h2g_tlb1_rmap[sesel]) {
6b2ba1a9 511 unsigned int idx = vcpu_e500->h2g_tlb1_rmap[sesel] - 1;
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512 vcpu_e500->g2h_tlb1_map[idx] &= ~(1ULL << sesel);
513 }
66a5fecd
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514
515 vcpu_e500->tlb_refs[1][sesel] = *ref;
516 vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_BITMAP;
517 vcpu_e500->g2h_tlb1_map[esel] |= (u64)1 << sesel;
6b2ba1a9 518 vcpu_e500->h2g_tlb1_rmap[sesel] = esel + 1;
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519
520 return sesel;
521}
522
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523/* Caller must ensure that the specified guest TLB entry is safe to insert into
524 * the shadow TLB. */
c015c62b 525/* For both one-one and one-to-many */
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526static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
527 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
528 struct kvm_book3e_206_tlb_entry *stlbe, int esel)
529{
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530 struct tlbe_ref ref;
531 int sesel;
b71c9e2f 532 int r;
b71c9e2f 533
c015c62b 534 ref.flags = 0;
b71c9e2f 535 r = kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe,
c015c62b 536 &ref);
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AG
537 if (r)
538 return r;
539
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540 /* Use TLB0 when we can only map a page with 4k */
541 if (get_tlb_tsize(stlbe) == BOOK3E_PAGESZ_4K) {
542 vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_TLB0;
543 write_stlbe(vcpu_e500, gtlbe, stlbe, 0, 0);
544 return 0;
b71c9e2f 545 }
b71c9e2f 546
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547 /* Otherwise map into TLB1 */
548 sesel = kvmppc_e500_tlb1_map_tlb1(vcpu_e500, &ref, esel);
549 write_stlbe(vcpu_e500, gtlbe, stlbe, 1, sesel);
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550
551 return 0;
552}
553
554void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
555 unsigned int index)
556{
557 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
558 struct tlbe_priv *priv;
559 struct kvm_book3e_206_tlb_entry *gtlbe, stlbe;
560 int tlbsel = tlbsel_of(index);
561 int esel = esel_of(index);
562
563 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
564
565 switch (tlbsel) {
566 case 0:
567 priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
568
569 /* Triggers after clear_tlb_refs or on initial mapping */
570 if (!(priv->ref.flags & E500_TLB_VALID)) {
571 kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
572 } else {
573 kvmppc_e500_setup_stlbe(vcpu, gtlbe, BOOK3E_PAGESZ_4K,
574 &priv->ref, eaddr, &stlbe);
575 write_stlbe(vcpu_e500, gtlbe, &stlbe, 0, 0);
576 }
577 break;
578
579 case 1: {
580 gfn_t gfn = gpaddr >> PAGE_SHIFT;
581 kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn, gtlbe, &stlbe,
582 esel);
583 break;
584 }
585
586 default:
587 BUG();
588 break;
589 }
590}
591
592/************* MMU Notifiers *************/
593
594int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
595{
596 trace_kvm_unmap_hva(hva);
597
598 /*
599 * Flush all shadow tlb entries everywhere. This is slow, but
600 * we are 100% sure that we catch the to be unmapped page
601 */
602 kvm_flush_remote_tlbs(kvm);
603
604 return 0;
605}
606
607int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
608{
609 /* kvm_unmap_hva flushes everything anyways */
610 kvm_unmap_hva(kvm, start);
611
612 return 0;
613}
614
615int kvm_age_hva(struct kvm *kvm, unsigned long hva)
616{
617 /* XXX could be more clever ;) */
618 return 0;
619}
620
621int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
622{
623 /* XXX could be more clever ;) */
624 return 0;
625}
626
627void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
628{
629 /* The page will get remapped properly on its next fault */
630 kvm_unmap_hva(kvm, hva);
631}
632
633/*****************************************/
634
635int e500_mmu_host_init(struct kvmppc_vcpu_e500 *vcpu_e500)
636{
637 host_tlb_params[0].entries = mfspr(SPRN_TLB0CFG) & TLBnCFG_N_ENTRY;
638 host_tlb_params[1].entries = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
639
640 /*
641 * This should never happen on real e500 hardware, but is
642 * architecturally possible -- e.g. in some weird nested
643 * virtualization case.
644 */
645 if (host_tlb_params[0].entries == 0 ||
646 host_tlb_params[1].entries == 0) {
647 pr_err("%s: need to know host tlb size\n", __func__);
648 return -ENODEV;
649 }
650
651 host_tlb_params[0].ways = (mfspr(SPRN_TLB0CFG) & TLBnCFG_ASSOC) >>
652 TLBnCFG_ASSOC_SHIFT;
653 host_tlb_params[1].ways = host_tlb_params[1].entries;
654
655 if (!is_power_of_2(host_tlb_params[0].entries) ||
656 !is_power_of_2(host_tlb_params[0].ways) ||
657 host_tlb_params[0].entries < host_tlb_params[0].ways ||
658 host_tlb_params[0].ways == 0) {
659 pr_err("%s: bad tlb0 host config: %u entries %u ways\n",
660 __func__, host_tlb_params[0].entries,
661 host_tlb_params[0].ways);
662 return -ENODEV;
663 }
664
665 host_tlb_params[0].sets =
666 host_tlb_params[0].entries / host_tlb_params[0].ways;
667 host_tlb_params[1].sets = 1;
668
669 vcpu_e500->tlb_refs[0] =
670 kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[0].entries,
671 GFP_KERNEL);
672 if (!vcpu_e500->tlb_refs[0])
673 goto err;
674
675 vcpu_e500->tlb_refs[1] =
676 kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[1].entries,
677 GFP_KERNEL);
678 if (!vcpu_e500->tlb_refs[1])
679 goto err;
680
681 vcpu_e500->h2g_tlb1_rmap = kzalloc(sizeof(unsigned int) *
682 host_tlb_params[1].entries,
683 GFP_KERNEL);
684 if (!vcpu_e500->h2g_tlb1_rmap)
685 goto err;
686
687 return 0;
688
689err:
690 kfree(vcpu_e500->tlb_refs[0]);
691 kfree(vcpu_e500->tlb_refs[1]);
692 return -EINVAL;
693}
694
695void e500_mmu_host_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
696{
697 kfree(vcpu_e500->h2g_tlb1_rmap);
698 kfree(vcpu_e500->tlb_refs[0]);
699 kfree(vcpu_e500->tlb_refs[1]);
700}