KVM: PPC: booke: deliver program int on emulation failure
[linux-2.6-block.git] / arch / powerpc / kvm / booke.c
CommitLineData
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1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
4cd35f67 16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
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17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
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20 * Scott Wood <scottwood@freescale.com>
21 * Varun Sethi <varun.sethi@freescale.com>
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22 */
23
24#include <linux/errno.h>
25#include <linux/err.h>
26#include <linux/kvm_host.h>
5a0e3ad6 27#include <linux/gfp.h>
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28#include <linux/module.h>
29#include <linux/vmalloc.h>
30#include <linux/fs.h>
7924bd41 31
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32#include <asm/cputable.h>
33#include <asm/uaccess.h>
34#include <asm/kvm_ppc.h>
d9fbd03d 35#include <asm/cacheflush.h>
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36#include <asm/dbell.h>
37#include <asm/hw_irq.h>
38#include <asm/irq.h>
bbf45ba5 39
d30f6e48 40#include "timing.h"
75f74f0d 41#include "booke.h"
bbf45ba5 42
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43unsigned long kvmppc_booke_handlers;
44
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45#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
46#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
47
48struct kvm_stats_debugfs_item debugfs_entries[] = {
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49 { "mmio", VCPU_STAT(mmio_exits) },
50 { "dcr", VCPU_STAT(dcr_exits) },
51 { "sig", VCPU_STAT(signal_exits) },
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52 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
53 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
54 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
55 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
56 { "sysc", VCPU_STAT(syscall_exits) },
57 { "isi", VCPU_STAT(isi_exits) },
58 { "dsi", VCPU_STAT(dsi_exits) },
59 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
60 { "dec", VCPU_STAT(dec_exits) },
61 { "ext_intr", VCPU_STAT(ext_intr_exits) },
45c5eb67 62 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
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63 { "doorbell", VCPU_STAT(dbell_exits) },
64 { "guest doorbell", VCPU_STAT(gdbell_exits) },
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65 { NULL }
66};
67
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68/* TODO: use vcpu_printf() */
69void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
70{
71 int i;
72
666e7252 73 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
5cf8ca22 74 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
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75 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
76 vcpu->arch.shared->srr1);
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77
78 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
79
80 for (i = 0; i < 32; i += 4) {
5cf8ca22 81 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
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82 kvmppc_get_gpr(vcpu, i),
83 kvmppc_get_gpr(vcpu, i+1),
84 kvmppc_get_gpr(vcpu, i+2),
85 kvmppc_get_gpr(vcpu, i+3));
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86 }
87}
88
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89#ifdef CONFIG_SPE
90void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
91{
92 preempt_disable();
93 enable_kernel_spe();
94 kvmppc_save_guest_spe(vcpu);
95 vcpu->arch.shadow_msr &= ~MSR_SPE;
96 preempt_enable();
97}
98
99static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
100{
101 preempt_disable();
102 enable_kernel_spe();
103 kvmppc_load_guest_spe(vcpu);
104 vcpu->arch.shadow_msr |= MSR_SPE;
105 preempt_enable();
106}
107
108static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
109{
110 if (vcpu->arch.shared->msr & MSR_SPE) {
111 if (!(vcpu->arch.shadow_msr & MSR_SPE))
112 kvmppc_vcpu_enable_spe(vcpu);
113 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
114 kvmppc_vcpu_disable_spe(vcpu);
115 }
116}
117#else
118static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
119{
120}
121#endif
122
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123/*
124 * Helper function for "full" MSR writes. No need to call this if only
125 * EE/CE/ME/DE/RI are changing.
126 */
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127void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
128{
dd9ebf1f 129 u32 old_msr = vcpu->arch.shared->msr;
4cd35f67 130
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131#ifdef CONFIG_KVM_BOOKE_HV
132 new_msr |= MSR_GS;
133#endif
134
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135 vcpu->arch.shared->msr = new_msr;
136
dd9ebf1f 137 kvmppc_mmu_msr_notify(vcpu, old_msr);
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138 kvmppc_vcpu_sync_spe(vcpu);
139}
140
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141static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
142 unsigned int priority)
9dd921cf 143{
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144 set_bit(priority, &vcpu->arch.pending_exceptions);
145}
146
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147static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
148 ulong dear_flags, ulong esr_flags)
9dd921cf 149{
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150 vcpu->arch.queued_dear = dear_flags;
151 vcpu->arch.queued_esr = esr_flags;
152 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
153}
154
155static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
156 ulong dear_flags, ulong esr_flags)
157{
158 vcpu->arch.queued_dear = dear_flags;
159 vcpu->arch.queued_esr = esr_flags;
160 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
161}
162
163static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
164 ulong esr_flags)
165{
166 vcpu->arch.queued_esr = esr_flags;
167 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
168}
169
170void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
171{
172 vcpu->arch.queued_esr = esr_flags;
d4cf3892 173 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
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174}
175
176void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
177{
d4cf3892 178 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
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179}
180
181int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
182{
d4cf3892 183 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
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184}
185
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186void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
187{
188 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
189}
190
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191void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
192 struct kvm_interrupt *irq)
193{
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194 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
195
196 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
197 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
198
199 kvmppc_booke_queue_irqprio(vcpu, prio);
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200}
201
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202void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
203 struct kvm_interrupt *irq)
204{
205 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
c5335f17 206 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
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207}
208
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209static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
210{
211#ifdef CONFIG_KVM_BOOKE_HV
212 mtspr(SPRN_GSRR0, srr0);
213 mtspr(SPRN_GSRR1, srr1);
214#else
215 vcpu->arch.shared->srr0 = srr0;
216 vcpu->arch.shared->srr1 = srr1;
217#endif
218}
219
220static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
221{
222 vcpu->arch.csrr0 = srr0;
223 vcpu->arch.csrr1 = srr1;
224}
225
226static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
227{
228 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
229 vcpu->arch.dsrr0 = srr0;
230 vcpu->arch.dsrr1 = srr1;
231 } else {
232 set_guest_csrr(vcpu, srr0, srr1);
233 }
234}
235
236static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
237{
238 vcpu->arch.mcsrr0 = srr0;
239 vcpu->arch.mcsrr1 = srr1;
240}
241
242static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
243{
244#ifdef CONFIG_KVM_BOOKE_HV
245 return mfspr(SPRN_GDEAR);
246#else
247 return vcpu->arch.shared->dar;
248#endif
249}
250
251static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
252{
253#ifdef CONFIG_KVM_BOOKE_HV
254 mtspr(SPRN_GDEAR, dear);
255#else
256 vcpu->arch.shared->dar = dear;
257#endif
258}
259
260static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
261{
262#ifdef CONFIG_KVM_BOOKE_HV
263 return mfspr(SPRN_GESR);
264#else
265 return vcpu->arch.shared->esr;
266#endif
267}
268
269static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
270{
271#ifdef CONFIG_KVM_BOOKE_HV
272 mtspr(SPRN_GESR, esr);
273#else
274 vcpu->arch.shared->esr = esr;
275#endif
276}
277
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278/* Deliver the interrupt of the corresponding priority, if possible. */
279static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
280 unsigned int priority)
bbf45ba5 281{
d4cf3892 282 int allowed = 0;
79300f8c 283 ulong msr_mask = 0;
daf5e271 284 bool update_esr = false, update_dear = false;
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285 ulong crit_raw = vcpu->arch.shared->critical;
286 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
287 bool crit;
c5335f17 288 bool keep_irq = false;
d30f6e48 289 enum int_class int_class;
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290
291 /* Truncate crit indicators in 32 bit mode */
292 if (!(vcpu->arch.shared->msr & MSR_SF)) {
293 crit_raw &= 0xffffffff;
294 crit_r1 &= 0xffffffff;
295 }
296
297 /* Critical section when crit == r1 */
298 crit = (crit_raw == crit_r1);
299 /* ... and we're in supervisor mode */
300 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
d4cf3892 301
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302 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
303 priority = BOOKE_IRQPRIO_EXTERNAL;
304 keep_irq = true;
305 }
306
d4cf3892 307 switch (priority) {
d4cf3892 308 case BOOKE_IRQPRIO_DTLB_MISS:
d4cf3892 309 case BOOKE_IRQPRIO_DATA_STORAGE:
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310 update_dear = true;
311 /* fall through */
d4cf3892 312 case BOOKE_IRQPRIO_INST_STORAGE:
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313 case BOOKE_IRQPRIO_PROGRAM:
314 update_esr = true;
315 /* fall through */
316 case BOOKE_IRQPRIO_ITLB_MISS:
317 case BOOKE_IRQPRIO_SYSCALL:
d4cf3892 318 case BOOKE_IRQPRIO_FP_UNAVAIL:
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319 case BOOKE_IRQPRIO_SPE_UNAVAIL:
320 case BOOKE_IRQPRIO_SPE_FP_DATA:
321 case BOOKE_IRQPRIO_SPE_FP_ROUND:
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322 case BOOKE_IRQPRIO_AP_UNAVAIL:
323 case BOOKE_IRQPRIO_ALIGNMENT:
324 allowed = 1;
79300f8c 325 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 326 int_class = INT_CLASS_NONCRIT;
bbf45ba5 327 break;
d4cf3892 328 case BOOKE_IRQPRIO_CRITICAL:
4ab96919 329 case BOOKE_IRQPRIO_DBELL_CRIT:
666e7252 330 allowed = vcpu->arch.shared->msr & MSR_CE;
d30f6e48 331 allowed = allowed && !crit;
79300f8c 332 msr_mask = MSR_ME;
d30f6e48 333 int_class = INT_CLASS_CRIT;
bbf45ba5 334 break;
d4cf3892 335 case BOOKE_IRQPRIO_MACHINE_CHECK:
666e7252 336 allowed = vcpu->arch.shared->msr & MSR_ME;
d30f6e48 337 allowed = allowed && !crit;
d30f6e48 338 int_class = INT_CLASS_MC;
bbf45ba5 339 break;
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340 case BOOKE_IRQPRIO_DECREMENTER:
341 case BOOKE_IRQPRIO_FIT:
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SW
342 keep_irq = true;
343 /* fall through */
344 case BOOKE_IRQPRIO_EXTERNAL:
4ab96919 345 case BOOKE_IRQPRIO_DBELL:
666e7252 346 allowed = vcpu->arch.shared->msr & MSR_EE;
5c6cedf4 347 allowed = allowed && !crit;
79300f8c 348 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 349 int_class = INT_CLASS_NONCRIT;
bbf45ba5 350 break;
d4cf3892 351 case BOOKE_IRQPRIO_DEBUG:
666e7252 352 allowed = vcpu->arch.shared->msr & MSR_DE;
d30f6e48 353 allowed = allowed && !crit;
79300f8c 354 msr_mask = MSR_ME;
d30f6e48 355 int_class = INT_CLASS_CRIT;
bbf45ba5 356 break;
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357 }
358
d4cf3892 359 if (allowed) {
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SW
360 switch (int_class) {
361 case INT_CLASS_NONCRIT:
362 set_guest_srr(vcpu, vcpu->arch.pc,
363 vcpu->arch.shared->msr);
364 break;
365 case INT_CLASS_CRIT:
366 set_guest_csrr(vcpu, vcpu->arch.pc,
367 vcpu->arch.shared->msr);
368 break;
369 case INT_CLASS_DBG:
370 set_guest_dsrr(vcpu, vcpu->arch.pc,
371 vcpu->arch.shared->msr);
372 break;
373 case INT_CLASS_MC:
374 set_guest_mcsrr(vcpu, vcpu->arch.pc,
375 vcpu->arch.shared->msr);
376 break;
377 }
378
d4cf3892 379 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
daf5e271 380 if (update_esr == true)
d30f6e48 381 set_guest_esr(vcpu, vcpu->arch.queued_esr);
daf5e271 382 if (update_dear == true)
d30f6e48 383 set_guest_dear(vcpu, vcpu->arch.queued_dear);
666e7252 384 kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
bbf45ba5 385
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AG
386 if (!keep_irq)
387 clear_bit(priority, &vcpu->arch.pending_exceptions);
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388 }
389
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390#ifdef CONFIG_KVM_BOOKE_HV
391 /*
392 * If an interrupt is pending but masked, raise a guest doorbell
393 * so that we are notified when the guest enables the relevant
394 * MSR bit.
395 */
396 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
397 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
398 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
399 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
400 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
401 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
402#endif
403
d4cf3892 404 return allowed;
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405}
406
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407static void update_timer_ints(struct kvm_vcpu *vcpu)
408{
409 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
410 kvmppc_core_queue_dec(vcpu);
411 else
412 kvmppc_core_dequeue_dec(vcpu);
413}
414
c59a6a3e 415static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
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416{
417 unsigned long *pending = &vcpu->arch.pending_exceptions;
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418 unsigned int priority;
419
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420 if (vcpu->requests) {
421 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) {
422 smp_mb();
423 update_timer_ints(vcpu);
424 }
425 }
426
9ab80843 427 priority = __ffs(*pending);
bdc89f13 428 while (priority <= BOOKE_IRQPRIO_MAX) {
d4cf3892 429 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
bbf45ba5 430 break;
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431
432 priority = find_next_bit(pending,
433 BITS_PER_BYTE * sizeof(*pending),
434 priority + 1);
435 }
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AG
436
437 /* Tell the guest about our interrupt status */
29ac26ef 438 vcpu->arch.shared->int_pending = !!*pending;
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439}
440
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SW
441/* Check pending exceptions and deliver one, if possible. */
442void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
443{
444 WARN_ON_ONCE(!irqs_disabled());
445
446 kvmppc_core_check_exceptions(vcpu);
447
448 if (vcpu->arch.shared->msr & MSR_WE) {
449 local_irq_enable();
450 kvm_vcpu_block(vcpu);
451 local_irq_disable();
452
453 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
454 kvmppc_core_check_exceptions(vcpu);
455 };
456}
457
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458int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
459{
460 int ret;
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SW
461#ifdef CONFIG_PPC_FPU
462 unsigned int fpscr;
463 int fpexc_mode;
464 u64 fpr[32];
465#endif
df6909e5 466
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AG
467 if (!vcpu->arch.sane) {
468 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
469 return -EINVAL;
470 }
471
df6909e5 472 local_irq_disable();
1d1ef222 473
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SW
474 kvmppc_core_prepare_to_enter(vcpu);
475
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SW
476 if (signal_pending(current)) {
477 kvm_run->exit_reason = KVM_EXIT_INTR;
478 ret = -EINTR;
479 goto out;
480 }
481
df6909e5 482 kvm_guest_enter();
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SW
483
484#ifdef CONFIG_PPC_FPU
485 /* Save userspace FPU state in stack */
486 enable_kernel_fp();
487 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
488 fpscr = current->thread.fpscr.val;
489 fpexc_mode = current->thread.fpexc_mode;
490
491 /* Restore guest FPU state to thread */
492 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
493 current->thread.fpscr.val = vcpu->arch.fpscr;
494
495 /*
496 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
497 * as always using the FPU. Kernel usage of FP (via
498 * enable_kernel_fp()) in this thread must not occur while
499 * vcpu->fpu_active is set.
500 */
501 vcpu->fpu_active = 1;
502
503 kvmppc_load_guest_fp(vcpu);
504#endif
505
df6909e5 506 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
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SW
507
508#ifdef CONFIG_PPC_FPU
509 kvmppc_save_guest_fp(vcpu);
510
511 vcpu->fpu_active = 0;
512
513 /* Save guest FPU state from thread */
514 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
515 vcpu->arch.fpscr = current->thread.fpscr.val;
516
517 /* Restore userspace FPU state from stack */
518 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
519 current->thread.fpscr.val = fpscr;
520 current->thread.fpexc_mode = fpexc_mode;
521#endif
522
df6909e5 523 kvm_guest_exit();
df6909e5 524
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SW
525out:
526 local_irq_enable();
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PM
527 return ret;
528}
529
d30f6e48
SW
530static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
531{
532 enum emulation_result er;
533
534 er = kvmppc_emulate_instruction(run, vcpu);
535 switch (er) {
536 case EMULATE_DONE:
537 /* don't overwrite subtypes, just account kvm_stats */
538 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
539 /* Future optimization: only reload non-volatiles if
540 * they were actually modified by emulation. */
541 return RESUME_GUEST_NV;
542
543 case EMULATE_DO_DCR:
544 run->exit_reason = KVM_EXIT_DCR;
545 return RESUME_HOST;
546
547 case EMULATE_FAIL:
d30f6e48
SW
548 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
549 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
550 /* For debugging, encode the failing instruction and
551 * report it to userspace. */
552 run->hw.hardware_exit_reason = ~0ULL << 32;
553 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
d1ff5499 554 kvmppc_core_queue_program(vcpu, ESR_PIL);
d30f6e48
SW
555 return RESUME_HOST;
556
557 default:
558 BUG();
559 }
560}
561
bbf45ba5
HB
562/**
563 * kvmppc_handle_exit
564 *
565 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
566 */
567int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
568 unsigned int exit_nr)
569{
bbf45ba5
HB
570 int r = RESUME_HOST;
571
73e75b41
HB
572 /* update before a new last_exit_type is rewritten */
573 kvmppc_update_timing_stats(vcpu);
574
d30f6e48
SW
575 switch (exit_nr) {
576 case BOOKE_INTERRUPT_EXTERNAL:
577 do_IRQ(current->thread.regs);
578 break;
579
580 case BOOKE_INTERRUPT_DECREMENTER:
581 timer_interrupt(current->thread.regs);
582 break;
583
584#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
585 case BOOKE_INTERRUPT_DOORBELL:
586 doorbell_exception(current->thread.regs);
587 break;
588#endif
589 case BOOKE_INTERRUPT_MACHINE_CHECK:
590 /* FIXME */
591 break;
592 }
593
bbf45ba5
HB
594 local_irq_enable();
595
596 run->exit_reason = KVM_EXIT_UNKNOWN;
597 run->ready_for_interrupt_injection = 1;
598
599 switch (exit_nr) {
600 case BOOKE_INTERRUPT_MACHINE_CHECK:
d30f6e48
SW
601 kvm_resched(vcpu);
602 r = RESUME_GUEST;
bbf45ba5
HB
603 break;
604
605 case BOOKE_INTERRUPT_EXTERNAL:
7b701591 606 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
d30f6e48 607 kvm_resched(vcpu);
1b6766c7
HB
608 r = RESUME_GUEST;
609 break;
610
bbf45ba5 611 case BOOKE_INTERRUPT_DECREMENTER:
7b701591 612 kvmppc_account_exit(vcpu, DEC_EXITS);
d30f6e48 613 kvm_resched(vcpu);
bbf45ba5
HB
614 r = RESUME_GUEST;
615 break;
616
d30f6e48
SW
617 case BOOKE_INTERRUPT_DOORBELL:
618 kvmppc_account_exit(vcpu, DBELL_EXITS);
619 kvm_resched(vcpu);
620 r = RESUME_GUEST;
621 break;
622
623 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
624 kvmppc_account_exit(vcpu, GDBELL_EXITS);
625
626 /*
627 * We are here because there is a pending guest interrupt
628 * which could not be delivered as MSR_CE or MSR_ME was not
629 * set. Once we break from here we will retry delivery.
630 */
631 r = RESUME_GUEST;
632 break;
633
634 case BOOKE_INTERRUPT_GUEST_DBELL:
635 kvmppc_account_exit(vcpu, GDBELL_EXITS);
636
637 /*
638 * We are here because there is a pending guest interrupt
639 * which could not be delivered as MSR_EE was not set. Once
640 * we break from here we will retry delivery.
641 */
642 r = RESUME_GUEST;
643 break;
644
645 case BOOKE_INTERRUPT_HV_PRIV:
646 r = emulation_exit(run, vcpu);
647 break;
648
bbf45ba5 649 case BOOKE_INTERRUPT_PROGRAM:
d30f6e48 650 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
bbf45ba5
HB
651 /* Program traps generated by user-level software must be handled
652 * by the guest kernel. */
daf5e271 653 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
bbf45ba5 654 r = RESUME_GUEST;
7b701591 655 kvmppc_account_exit(vcpu, USR_PR_INST);
bbf45ba5
HB
656 break;
657 }
658
d30f6e48 659 r = emulation_exit(run, vcpu);
bbf45ba5
HB
660 break;
661
de368dce 662 case BOOKE_INTERRUPT_FP_UNAVAIL:
d4cf3892 663 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
7b701591 664 kvmppc_account_exit(vcpu, FP_UNAVAIL);
de368dce
CE
665 r = RESUME_GUEST;
666 break;
667
4cd35f67
SW
668#ifdef CONFIG_SPE
669 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
670 if (vcpu->arch.shared->msr & MSR_SPE)
671 kvmppc_vcpu_enable_spe(vcpu);
672 else
673 kvmppc_booke_queue_irqprio(vcpu,
674 BOOKE_IRQPRIO_SPE_UNAVAIL);
bb3a8a17
HB
675 r = RESUME_GUEST;
676 break;
4cd35f67 677 }
bb3a8a17
HB
678
679 case BOOKE_INTERRUPT_SPE_FP_DATA:
680 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
681 r = RESUME_GUEST;
682 break;
683
684 case BOOKE_INTERRUPT_SPE_FP_ROUND:
685 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
686 r = RESUME_GUEST;
687 break;
4cd35f67
SW
688#else
689 case BOOKE_INTERRUPT_SPE_UNAVAIL:
690 /*
691 * Guest wants SPE, but host kernel doesn't support it. Send
692 * an "unimplemented operation" program check to the guest.
693 */
694 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
695 r = RESUME_GUEST;
696 break;
697
698 /*
699 * These really should never happen without CONFIG_SPE,
700 * as we should never enable the real MSR[SPE] in the guest.
701 */
702 case BOOKE_INTERRUPT_SPE_FP_DATA:
703 case BOOKE_INTERRUPT_SPE_FP_ROUND:
704 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
705 __func__, exit_nr, vcpu->arch.pc);
706 run->hw.hardware_exit_reason = exit_nr;
707 r = RESUME_HOST;
708 break;
709#endif
bb3a8a17 710
bbf45ba5 711 case BOOKE_INTERRUPT_DATA_STORAGE:
daf5e271
LY
712 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
713 vcpu->arch.fault_esr);
7b701591 714 kvmppc_account_exit(vcpu, DSI_EXITS);
bbf45ba5
HB
715 r = RESUME_GUEST;
716 break;
717
718 case BOOKE_INTERRUPT_INST_STORAGE:
daf5e271 719 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
7b701591 720 kvmppc_account_exit(vcpu, ISI_EXITS);
bbf45ba5
HB
721 r = RESUME_GUEST;
722 break;
723
d30f6e48
SW
724#ifdef CONFIG_KVM_BOOKE_HV
725 case BOOKE_INTERRUPT_HV_SYSCALL:
726 if (!(vcpu->arch.shared->msr & MSR_PR)) {
727 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
728 } else {
729 /*
730 * hcall from guest userspace -- send privileged
731 * instruction program check.
732 */
733 kvmppc_core_queue_program(vcpu, ESR_PPR);
734 }
735
736 r = RESUME_GUEST;
737 break;
738#else
bbf45ba5 739 case BOOKE_INTERRUPT_SYSCALL:
2a342ed5
AG
740 if (!(vcpu->arch.shared->msr & MSR_PR) &&
741 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
742 /* KVM PV hypercalls */
743 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
744 r = RESUME_GUEST;
745 } else {
746 /* Guest syscalls */
747 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
748 }
7b701591 749 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
bbf45ba5
HB
750 r = RESUME_GUEST;
751 break;
d30f6e48 752#endif
bbf45ba5
HB
753
754 case BOOKE_INTERRUPT_DTLB_MISS: {
bbf45ba5 755 unsigned long eaddr = vcpu->arch.fault_dear;
7924bd41 756 int gtlb_index;
475e7cdd 757 gpa_t gpaddr;
bbf45ba5
HB
758 gfn_t gfn;
759
bf7ca4bd 760#ifdef CONFIG_KVM_E500V2
a4cd8b23
SW
761 if (!(vcpu->arch.shared->msr & MSR_PR) &&
762 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
763 kvmppc_map_magic(vcpu);
764 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
765 r = RESUME_GUEST;
766
767 break;
768 }
769#endif
770
bbf45ba5 771 /* Check the guest TLB. */
fa86b8dd 772 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
7924bd41 773 if (gtlb_index < 0) {
bbf45ba5 774 /* The guest didn't have a mapping for it. */
daf5e271
LY
775 kvmppc_core_queue_dtlb_miss(vcpu,
776 vcpu->arch.fault_dear,
777 vcpu->arch.fault_esr);
b52a638c 778 kvmppc_mmu_dtlb_miss(vcpu);
7b701591 779 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
bbf45ba5
HB
780 r = RESUME_GUEST;
781 break;
782 }
783
be8d1cae 784 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
475e7cdd 785 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB
786
787 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
788 /* The guest TLB had a mapping, but the shadow TLB
789 * didn't, and it is RAM. This could be because:
790 * a) the entry is mapping the host kernel, or
791 * b) the guest used a large mapping which we're faking
792 * Either way, we need to satisfy the fault without
793 * invoking the guest. */
58a96214 794 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
7b701591 795 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
bbf45ba5
HB
796 r = RESUME_GUEST;
797 } else {
798 /* Guest has mapped and accessed a page which is not
799 * actually RAM. */
475e7cdd 800 vcpu->arch.paddr_accessed = gpaddr;
bbf45ba5 801 r = kvmppc_emulate_mmio(run, vcpu);
7b701591 802 kvmppc_account_exit(vcpu, MMIO_EXITS);
bbf45ba5
HB
803 }
804
805 break;
806 }
807
808 case BOOKE_INTERRUPT_ITLB_MISS: {
bbf45ba5 809 unsigned long eaddr = vcpu->arch.pc;
89168618 810 gpa_t gpaddr;
bbf45ba5 811 gfn_t gfn;
7924bd41 812 int gtlb_index;
bbf45ba5
HB
813
814 r = RESUME_GUEST;
815
816 /* Check the guest TLB. */
fa86b8dd 817 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
7924bd41 818 if (gtlb_index < 0) {
bbf45ba5 819 /* The guest didn't have a mapping for it. */
d4cf3892 820 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
b52a638c 821 kvmppc_mmu_itlb_miss(vcpu);
7b701591 822 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
bbf45ba5
HB
823 break;
824 }
825
7b701591 826 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
bbf45ba5 827
be8d1cae 828 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
89168618 829 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB
830
831 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
832 /* The guest TLB had a mapping, but the shadow TLB
833 * didn't. This could be because:
834 * a) the entry is mapping the host kernel, or
835 * b) the guest used a large mapping which we're faking
836 * Either way, we need to satisfy the fault without
837 * invoking the guest. */
58a96214 838 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
bbf45ba5
HB
839 } else {
840 /* Guest mapped and leaped at non-RAM! */
d4cf3892 841 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
bbf45ba5
HB
842 }
843
844 break;
845 }
846
6a0ab738
HB
847 case BOOKE_INTERRUPT_DEBUG: {
848 u32 dbsr;
849
850 vcpu->arch.pc = mfspr(SPRN_CSRR0);
851
852 /* clear IAC events in DBSR register */
853 dbsr = mfspr(SPRN_DBSR);
854 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
855 mtspr(SPRN_DBSR, dbsr);
856
857 run->exit_reason = KVM_EXIT_DEBUG;
7b701591 858 kvmppc_account_exit(vcpu, DEBUG_EXITS);
6a0ab738
HB
859 r = RESUME_HOST;
860 break;
861 }
862
bbf45ba5
HB
863 default:
864 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
865 BUG();
866 }
867
868 local_irq_disable();
869
7e28e60e 870 kvmppc_core_prepare_to_enter(vcpu);
bbf45ba5 871
bbf45ba5
HB
872 if (!(r & RESUME_HOST)) {
873 /* To avoid clobbering exit_reason, only check for signals if
874 * we aren't already exiting to userspace for some other
875 * reason. */
876 if (signal_pending(current)) {
877 run->exit_reason = KVM_EXIT_INTR;
878 r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
7b701591 879 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
bbf45ba5
HB
880 }
881 }
882
883 return r;
884}
885
886/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
887int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
888{
082decf2 889 int i;
af8f38b3 890 int r;
082decf2 891
bbf45ba5 892 vcpu->arch.pc = 0;
b5904972 893 vcpu->arch.shared->pir = vcpu->vcpu_id;
8e5b26b5 894 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
d30f6e48 895 kvmppc_set_msr(vcpu, 0);
bbf45ba5 896
d30f6e48
SW
897#ifndef CONFIG_KVM_BOOKE_HV
898 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
49dd2c49 899 vcpu->arch.shadow_pid = 1;
d30f6e48
SW
900 vcpu->arch.shared->msr = 0;
901#endif
49dd2c49 902
082decf2
HB
903 /* Eye-catching numbers so we know if the guest takes an interrupt
904 * before it's programmed its own IVPR/IVORs. */
bbf45ba5 905 vcpu->arch.ivpr = 0x55550000;
082decf2
HB
906 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
907 vcpu->arch.ivor[i] = 0x7700 | i * 4;
bbf45ba5 908
73e75b41
HB
909 kvmppc_init_timing_stats(vcpu);
910
af8f38b3
AG
911 r = kvmppc_core_vcpu_setup(vcpu);
912 kvmppc_sanity_check(vcpu);
913 return r;
bbf45ba5
HB
914}
915
916int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
917{
918 int i;
919
920 regs->pc = vcpu->arch.pc;
992b5b29 921 regs->cr = kvmppc_get_cr(vcpu);
bbf45ba5
HB
922 regs->ctr = vcpu->arch.ctr;
923 regs->lr = vcpu->arch.lr;
992b5b29 924 regs->xer = kvmppc_get_xer(vcpu);
666e7252 925 regs->msr = vcpu->arch.shared->msr;
de7906c3
AG
926 regs->srr0 = vcpu->arch.shared->srr0;
927 regs->srr1 = vcpu->arch.shared->srr1;
bbf45ba5 928 regs->pid = vcpu->arch.pid;
a73a9599
AG
929 regs->sprg0 = vcpu->arch.shared->sprg0;
930 regs->sprg1 = vcpu->arch.shared->sprg1;
931 regs->sprg2 = vcpu->arch.shared->sprg2;
932 regs->sprg3 = vcpu->arch.shared->sprg3;
b5904972
SW
933 regs->sprg4 = vcpu->arch.shared->sprg4;
934 regs->sprg5 = vcpu->arch.shared->sprg5;
935 regs->sprg6 = vcpu->arch.shared->sprg6;
936 regs->sprg7 = vcpu->arch.shared->sprg7;
bbf45ba5
HB
937
938 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 939 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
bbf45ba5
HB
940
941 return 0;
942}
943
944int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
945{
946 int i;
947
948 vcpu->arch.pc = regs->pc;
992b5b29 949 kvmppc_set_cr(vcpu, regs->cr);
bbf45ba5
HB
950 vcpu->arch.ctr = regs->ctr;
951 vcpu->arch.lr = regs->lr;
992b5b29 952 kvmppc_set_xer(vcpu, regs->xer);
b8fd68ac 953 kvmppc_set_msr(vcpu, regs->msr);
de7906c3
AG
954 vcpu->arch.shared->srr0 = regs->srr0;
955 vcpu->arch.shared->srr1 = regs->srr1;
5ce941ee 956 kvmppc_set_pid(vcpu, regs->pid);
a73a9599
AG
957 vcpu->arch.shared->sprg0 = regs->sprg0;
958 vcpu->arch.shared->sprg1 = regs->sprg1;
959 vcpu->arch.shared->sprg2 = regs->sprg2;
960 vcpu->arch.shared->sprg3 = regs->sprg3;
b5904972
SW
961 vcpu->arch.shared->sprg4 = regs->sprg4;
962 vcpu->arch.shared->sprg5 = regs->sprg5;
963 vcpu->arch.shared->sprg6 = regs->sprg6;
964 vcpu->arch.shared->sprg7 = regs->sprg7;
bbf45ba5 965
8e5b26b5
AG
966 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
967 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
bbf45ba5
HB
968
969 return 0;
970}
971
5ce941ee
SW
972static void get_sregs_base(struct kvm_vcpu *vcpu,
973 struct kvm_sregs *sregs)
974{
975 u64 tb = get_tb();
976
977 sregs->u.e.features |= KVM_SREGS_E_BASE;
978
979 sregs->u.e.csrr0 = vcpu->arch.csrr0;
980 sregs->u.e.csrr1 = vcpu->arch.csrr1;
981 sregs->u.e.mcsr = vcpu->arch.mcsr;
d30f6e48
SW
982 sregs->u.e.esr = get_guest_esr(vcpu);
983 sregs->u.e.dear = get_guest_dear(vcpu);
5ce941ee
SW
984 sregs->u.e.tsr = vcpu->arch.tsr;
985 sregs->u.e.tcr = vcpu->arch.tcr;
986 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
987 sregs->u.e.tb = tb;
988 sregs->u.e.vrsave = vcpu->arch.vrsave;
989}
990
991static int set_sregs_base(struct kvm_vcpu *vcpu,
992 struct kvm_sregs *sregs)
993{
994 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
995 return 0;
996
997 vcpu->arch.csrr0 = sregs->u.e.csrr0;
998 vcpu->arch.csrr1 = sregs->u.e.csrr1;
999 vcpu->arch.mcsr = sregs->u.e.mcsr;
d30f6e48
SW
1000 set_guest_esr(vcpu, sregs->u.e.esr);
1001 set_guest_dear(vcpu, sregs->u.e.dear);
5ce941ee 1002 vcpu->arch.vrsave = sregs->u.e.vrsave;
dfd4d47e 1003 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
5ce941ee 1004
dfd4d47e 1005 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
5ce941ee 1006 vcpu->arch.dec = sregs->u.e.dec;
dfd4d47e
SW
1007 kvmppc_emulate_dec(vcpu);
1008 }
5ce941ee
SW
1009
1010 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
dfd4d47e
SW
1011 vcpu->arch.tsr = sregs->u.e.tsr;
1012 update_timer_ints(vcpu);
5ce941ee
SW
1013 }
1014
1015 return 0;
1016}
1017
1018static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1019 struct kvm_sregs *sregs)
1020{
1021 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1022
841741f2 1023 sregs->u.e.pir = vcpu->vcpu_id;
5ce941ee
SW
1024 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1025 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1026 sregs->u.e.decar = vcpu->arch.decar;
1027 sregs->u.e.ivpr = vcpu->arch.ivpr;
1028}
1029
1030static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1031 struct kvm_sregs *sregs)
1032{
1033 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1034 return 0;
1035
841741f2 1036 if (sregs->u.e.pir != vcpu->vcpu_id)
5ce941ee
SW
1037 return -EINVAL;
1038
1039 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1040 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1041 vcpu->arch.decar = sregs->u.e.decar;
1042 vcpu->arch.ivpr = sregs->u.e.ivpr;
1043
1044 return 0;
1045}
1046
1047void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1048{
1049 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1050
1051 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1052 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1053 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1054 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1055 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1056 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1057 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1058 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1059 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1060 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1061 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1062 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1063 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1064 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1065 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1066 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1067}
1068
1069int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1070{
1071 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1072 return 0;
1073
1074 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1075 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1076 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1077 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1078 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1079 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1080 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1081 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1082 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1083 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1084 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1085 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1086 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1087 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1088 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1089 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1090
1091 return 0;
1092}
1093
bbf45ba5
HB
1094int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1095 struct kvm_sregs *sregs)
1096{
5ce941ee
SW
1097 sregs->pvr = vcpu->arch.pvr;
1098
1099 get_sregs_base(vcpu, sregs);
1100 get_sregs_arch206(vcpu, sregs);
1101 kvmppc_core_get_sregs(vcpu, sregs);
1102 return 0;
bbf45ba5
HB
1103}
1104
1105int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1106 struct kvm_sregs *sregs)
1107{
5ce941ee
SW
1108 int ret;
1109
1110 if (vcpu->arch.pvr != sregs->pvr)
1111 return -EINVAL;
1112
1113 ret = set_sregs_base(vcpu, sregs);
1114 if (ret < 0)
1115 return ret;
1116
1117 ret = set_sregs_arch206(vcpu, sregs);
1118 if (ret < 0)
1119 return ret;
1120
1121 return kvmppc_core_set_sregs(vcpu, sregs);
bbf45ba5
HB
1122}
1123
31f3438e
PM
1124int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1125{
1126 return -EINVAL;
1127}
1128
1129int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1130{
1131 return -EINVAL;
1132}
1133
bbf45ba5
HB
1134int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1135{
1136 return -ENOTSUPP;
1137}
1138
1139int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1140{
1141 return -ENOTSUPP;
1142}
1143
bbf45ba5
HB
1144int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1145 struct kvm_translation *tr)
1146{
98001d8d
AK
1147 int r;
1148
98001d8d 1149 r = kvmppc_core_vcpu_translate(vcpu, tr);
98001d8d 1150 return r;
bbf45ba5 1151}
d9fbd03d 1152
4e755758
AG
1153int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1154{
1155 return -ENOTSUPP;
1156}
1157
f9e0554d
PM
1158int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1159 struct kvm_userspace_memory_region *mem)
1160{
1161 return 0;
1162}
1163
1164void kvmppc_core_commit_memory_region(struct kvm *kvm,
1165 struct kvm_userspace_memory_region *mem)
1166{
1167}
1168
dfd4d47e
SW
1169void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1170{
1171 vcpu->arch.tcr = new_tcr;
1172 update_timer_ints(vcpu);
1173}
1174
1175void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1176{
1177 set_bits(tsr_bits, &vcpu->arch.tsr);
1178 smp_wmb();
1179 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1180 kvm_vcpu_kick(vcpu);
1181}
1182
1183void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1184{
1185 clear_bits(tsr_bits, &vcpu->arch.tsr);
1186 update_timer_ints(vcpu);
1187}
1188
1189void kvmppc_decrementer_func(unsigned long data)
1190{
1191 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1192
1193 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1194}
1195
94fa9d99
SW
1196void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1197{
d30f6e48 1198 current->thread.kvm_vcpu = vcpu;
94fa9d99
SW
1199}
1200
1201void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1202{
d30f6e48 1203 current->thread.kvm_vcpu = NULL;
94fa9d99
SW
1204}
1205
2986b8c7 1206int __init kvmppc_booke_init(void)
d9fbd03d 1207{
d30f6e48 1208#ifndef CONFIG_KVM_BOOKE_HV
d9fbd03d
HB
1209 unsigned long ivor[16];
1210 unsigned long max_ivor = 0;
1211 int i;
1212
1213 /* We install our own exception handlers by hijacking IVPR. IVPR must
1214 * be 16-bit aligned, so we need a 64KB allocation. */
1215 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1216 VCPU_SIZE_ORDER);
1217 if (!kvmppc_booke_handlers)
1218 return -ENOMEM;
1219
1220 /* XXX make sure our handlers are smaller than Linux's */
1221
1222 /* Copy our interrupt handlers to match host IVORs. That way we don't
1223 * have to swap the IVORs on every guest/host transition. */
1224 ivor[0] = mfspr(SPRN_IVOR0);
1225 ivor[1] = mfspr(SPRN_IVOR1);
1226 ivor[2] = mfspr(SPRN_IVOR2);
1227 ivor[3] = mfspr(SPRN_IVOR3);
1228 ivor[4] = mfspr(SPRN_IVOR4);
1229 ivor[5] = mfspr(SPRN_IVOR5);
1230 ivor[6] = mfspr(SPRN_IVOR6);
1231 ivor[7] = mfspr(SPRN_IVOR7);
1232 ivor[8] = mfspr(SPRN_IVOR8);
1233 ivor[9] = mfspr(SPRN_IVOR9);
1234 ivor[10] = mfspr(SPRN_IVOR10);
1235 ivor[11] = mfspr(SPRN_IVOR11);
1236 ivor[12] = mfspr(SPRN_IVOR12);
1237 ivor[13] = mfspr(SPRN_IVOR13);
1238 ivor[14] = mfspr(SPRN_IVOR14);
1239 ivor[15] = mfspr(SPRN_IVOR15);
1240
1241 for (i = 0; i < 16; i++) {
1242 if (ivor[i] > max_ivor)
1243 max_ivor = ivor[i];
1244
1245 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1246 kvmppc_handlers_start + i * kvmppc_handler_len,
1247 kvmppc_handler_len);
1248 }
1249 flush_icache_range(kvmppc_booke_handlers,
1250 kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
d30f6e48 1251#endif /* !BOOKE_HV */
db93f574 1252 return 0;
d9fbd03d
HB
1253}
1254
db93f574 1255void __exit kvmppc_booke_exit(void)
d9fbd03d
HB
1256{
1257 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1258 kvm_exit();
1259}