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KVM: PPC: BookE: Drop redundant vcpu->mode set
[linux-block.git] / arch / powerpc / kvm / book3s_pr.c
CommitLineData
f05ed4d5
PM		 1/*
2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3 *
4 * Authors:
5 * Alexander Graf <agraf@suse.de>
6 * Kevin Wolf <mail@kevin-wolf.de>
7 * Paul Mackerras <paulus@samba.org>
8 *
9 * Description:
10 * Functions relating to running KVM on Book 3S processors where
11 * we don't have access to hypervisor mode, and we run the guest
12 * in problem state (user mode).
13 *
14 * This file is derived from arch/powerpc/kvm/44x.c,
15 * by Hollis Blanchard <hollisb@us.ibm.com>.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License, version 2, as
19 * published by the Free Software Foundation.
20 */
21
22#include <linux/kvm_host.h>
93087948 23#include <linux/export.h>
f05ed4d5
PM		 24#include <linux/err.h>
25#include <linux/slab.h>
26
27#include <asm/reg.h>
28#include <asm/cputable.h>
29#include <asm/cacheflush.h>
30#include <asm/tlbflush.h>
31#include <asm/uaccess.h>
32#include <asm/io.h>
33#include <asm/kvm_ppc.h>
34#include <asm/kvm_book3s.h>
35#include <asm/mmu_context.h>
95327d08 36#include <asm/switch_to.h>
f05ed4d5
PM		 37#include <linux/gfp.h>
38#include <linux/sched.h>
39#include <linux/vmalloc.h>
40#include <linux/highmem.h>
41
42#include "trace.h"
43
44/* #define EXIT_DEBUG */
45/* #define DEBUG_EXT */
46
47static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
48 ulong msr);
49
50/* Some compatibility defines */
51#ifdef CONFIG_PPC_BOOK3S_32
52#define MSR_USER32 MSR_USER
53#define MSR_USER64 MSR_USER
54#define HW_PAGE_SIZE PAGE_SIZE
e371f713
AG		 55#define __hard_irq_disable local_irq_disable
56#define __hard_irq_enable local_irq_enable
f05ed4d5
PM		 57#endif
58
59void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
60{
61#ifdef CONFIG_PPC_BOOK3S_64
468a12c2
AG		 62 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
63 memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
f05ed4d5
PM		 64 memcpy(&get_paca()->shadow_vcpu, to_book3s(vcpu)->shadow_vcpu,
65 sizeof(get_paca()->shadow_vcpu));
468a12c2
AG		 66 svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
67 svcpu_put(svcpu);
f05ed4d5
PM		 68#endif
69
70#ifdef CONFIG_PPC_BOOK3S_32
71 current->thread.kvm_shadow_vcpu = to_book3s(vcpu)->shadow_vcpu;
72#endif
73}
74
75void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
76{
77#ifdef CONFIG_PPC_BOOK3S_64
468a12c2
AG		 78 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
79 memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
f05ed4d5
PM		 80 memcpy(to_book3s(vcpu)->shadow_vcpu, &get_paca()->shadow_vcpu,
81 sizeof(get_paca()->shadow_vcpu));
468a12c2
AG		 82 to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
83 svcpu_put(svcpu);
f05ed4d5
PM		 84#endif
85
86 kvmppc_giveup_ext(vcpu, MSR_FP);
87 kvmppc_giveup_ext(vcpu, MSR_VEC);
88 kvmppc_giveup_ext(vcpu, MSR_VSX);
89}
90
03d25c5b
AG		 91void kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
92{
9b0cb3c8
AG		 93 /* We misuse TLB_FLUSH to indicate that we want to clear
94 all shadow cache entries */
95 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
96 kvmppc_mmu_pte_flush(vcpu, 0, 0);
03d25c5b
AG		 97}
98
9b0cb3c8
AG		 99/************* MMU Notifiers *************/
100
101int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
102{
103 trace_kvm_unmap_hva(hva);
104
105 /*
106 * Flush all shadow tlb entries everywhere. This is slow, but
107 * we are 100% sure that we catch the to be unmapped page
108 */
109 kvm_flush_remote_tlbs(kvm);
110
111 return 0;
112}
113
114int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
115{
116 /* kvm_unmap_hva flushes everything anyways */
117 kvm_unmap_hva(kvm, start);
118
119 return 0;
120}
121
122int kvm_age_hva(struct kvm *kvm, unsigned long hva)
123{
124 /* XXX could be more clever ;) */
125 return 0;
126}
127
128int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
129{
130 /* XXX could be more clever ;) */
131 return 0;
132}
133
134void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
135{
136 /* The page will get remapped properly on its next fault */
137 kvm_unmap_hva(kvm, hva);
138}
139
140/*****************************************/
141
f05ed4d5
PM		 142static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
143{
144 ulong smsr = vcpu->arch.shared->msr;
145
146 /* Guest MSR values */
147 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_DE;
148 /* Process MSR values */
149 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
150 /* External providers the guest reserved */
151 smsr |= (vcpu->arch.shared->msr & vcpu->arch.guest_owned_ext);
152 /* 64-bit Process MSR values */
153#ifdef CONFIG_PPC_BOOK3S_64
154 smsr |= MSR_ISF | MSR_HV;
155#endif
156 vcpu->arch.shadow_msr = smsr;
157}
158
159void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
160{
161 ulong old_msr = vcpu->arch.shared->msr;
162
163#ifdef EXIT_DEBUG
164 printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
165#endif
166
167 msr &= to_book3s(vcpu)->msr_mask;
168 vcpu->arch.shared->msr = msr;
169 kvmppc_recalc_shadow_msr(vcpu);
170
171 if (msr & MSR_POW) {
172 if (!vcpu->arch.pending_exceptions) {
173 kvm_vcpu_block(vcpu);
966cd0f3 174 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
f05ed4d5
PM		 175 vcpu->stat.halt_wakeup++;
176
177 /* Unset POW bit after we woke up */
178 msr &= ~MSR_POW;
179 vcpu->arch.shared->msr = msr;
180 }
181 }
182
183 if ((vcpu->arch.shared->msr & (MSR_PR|MSR_IR|MSR_DR)) !=
184 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
185 kvmppc_mmu_flush_segments(vcpu);
186 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
187
188 /* Preload magic page segment when in kernel mode */
189 if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
190 struct kvm_vcpu_arch *a = &vcpu->arch;
191
192 if (msr & MSR_DR)
193 kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
194 else
195 kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
196 }
197 }
198
bbcc9c06
BH		 199 /*
200 * When switching from 32 to 64-bit, we may have a stale 32-bit
201 * magic page around, we need to flush it. Typically 32-bit magic
202 * page will be instanciated when calling into RTAS. Note: We
203 * assume that such transition only happens while in kernel mode,
204 * ie, we never transition from user 32-bit to kernel 64-bit with
205 * a 32-bit magic page around.
206 */
207 if (vcpu->arch.magic_page_pa &&
208 !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
209 /* going from RTAS to normal kernel code */
210 kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
211 ~0xFFFUL);
212 }
213
f05ed4d5
PM		 214 /* Preload FPU if it's enabled */
215 if (vcpu->arch.shared->msr & MSR_FP)
216 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
217}
218
219void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr)
220{
221 u32 host_pvr;
222
223 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
224 vcpu->arch.pvr = pvr;
225#ifdef CONFIG_PPC_BOOK3S_64
226 if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
227 kvmppc_mmu_book3s_64_init(vcpu);
1022fc3d
AG		 228 if (!to_book3s(vcpu)->hior_explicit)
229 to_book3s(vcpu)->hior = 0xfff00000;
f05ed4d5 230 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
af8f38b3 231 vcpu->arch.cpu_type = KVM_CPU_3S_64;
f05ed4d5
PM		 232 } else
233#endif
234 {
235 kvmppc_mmu_book3s_32_init(vcpu);
1022fc3d
AG		 236 if (!to_book3s(vcpu)->hior_explicit)
237 to_book3s(vcpu)->hior = 0;
f05ed4d5 238 to_book3s(vcpu)->msr_mask = 0xffffffffULL;
af8f38b3 239 vcpu->arch.cpu_type = KVM_CPU_3S_32;
f05ed4d5
PM		 240 }
241
af8f38b3
AG		 242 kvmppc_sanity_check(vcpu);
243
f05ed4d5
PM		 244 /* If we are in hypervisor level on 970, we can tell the CPU to
245 * treat DCBZ as 32 bytes store */
246 vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
247 if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
248 !strcmp(cur_cpu_spec->platform, "ppc970"))
249 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
250
251 /* Cell performs badly if MSR_FEx are set. So let's hope nobody
252 really needs them in a VM on Cell and force disable them. */
253 if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
254 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);
255
256#ifdef CONFIG_PPC_BOOK3S_32
257 /* 32 bit Book3S always has 32 byte dcbz */
258 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
259#endif
260
261 /* On some CPUs we can execute paired single operations natively */
262 asm ( "mfpvr %0" : "=r"(host_pvr));
263 switch (host_pvr) {
264 case 0x00080200: /* lonestar 2.0 */
265 case 0x00088202: /* lonestar 2.2 */
266 case 0x70000100: /* gekko 1.0 */
267 case 0x00080100: /* gekko 2.0 */
268 case 0x00083203: /* gekko 2.3a */
269 case 0x00083213: /* gekko 2.3b */
270 case 0x00083204: /* gekko 2.4 */
271 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
272 case 0x00087200: /* broadway */
273 vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
274 /* Enable HID2.PSE - in case we need it later */
275 mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
276 }
277}
278
279/* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
280 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
281 * emulate 32 bytes dcbz length.
282 *
283 * The Book3s_64 inventors also realized this case and implemented a special bit
284 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
285 *
286 * My approach here is to patch the dcbz instruction on executing pages.
287 */
288static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
289{
290 struct page *hpage;
291 u64 hpage_offset;
292 u32 *page;
293 int i;
294
295 hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
32cad84f 296 if (is_error_page(hpage))
f05ed4d5 297 return;
f05ed4d5
PM		 298
299 hpage_offset = pte->raddr & ~PAGE_MASK;
300 hpage_offset &= ~0xFFFULL;
301 hpage_offset /= 4;
302
303 get_page(hpage);
2480b208 304 page = kmap_atomic(hpage);
f05ed4d5
PM		 305
306 /* patch dcbz into reserved instruction, so we trap */
307 for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
308 if ((page[i] & 0xff0007ff) == INS_DCBZ)
309 page[i] &= 0xfffffff7;
310
2480b208 311 kunmap_atomic(page);
f05ed4d5
PM		 312 put_page(hpage);
313}
314
315static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
316{
317 ulong mp_pa = vcpu->arch.magic_page_pa;
318
bbcc9c06
BH		 319 if (!(vcpu->arch.shared->msr & MSR_SF))
320 mp_pa = (uint32_t)mp_pa;
321
f05ed4d5
PM		 322 if (unlikely(mp_pa) &&
323 unlikely((mp_pa & KVM_PAM) >> PAGE_SHIFT == gfn)) {
324 return 1;
325 }
326
327 return kvm_is_visible_gfn(vcpu->kvm, gfn);
328}
329
330int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
331 ulong eaddr, int vec)
332{
333 bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
334 int r = RESUME_GUEST;
335 int relocated;
336 int page_found = 0;
337 struct kvmppc_pte pte;
338 bool is_mmio = false;
339 bool dr = (vcpu->arch.shared->msr & MSR_DR) ? true : false;
340 bool ir = (vcpu->arch.shared->msr & MSR_IR) ? true : false;
341 u64 vsid;
342
343 relocated = data ? dr : ir;
344
345 /* Resolve real address if translation turned on */
346 if (relocated) {
347 page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data);
348 } else {
349 pte.may_execute = true;
350 pte.may_read = true;
351 pte.may_write = true;
352 pte.raddr = eaddr & KVM_PAM;
353 pte.eaddr = eaddr;
354 pte.vpage = eaddr >> 12;
355 }
356
357 switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
358 case 0:
359 pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
360 break;
361 case MSR_DR:
362 case MSR_IR:
363 vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
364
365 if ((vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) == MSR_DR)
366 pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
367 else
368 pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
369 pte.vpage |= vsid;
370
371 if (vsid == -1)
372 page_found = -EINVAL;
373 break;
374 }
375
376 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
377 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
378 /*
379 * If we do the dcbz hack, we have to NX on every execution,
380 * so we can patch the executing code. This renders our guest
381 * NX-less.
382 */
383 pte.may_execute = !data;
384 }
385
386 if (page_found == -ENOENT) {
387 /* Page not found in guest PTE entries */
468a12c2 388 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
f05ed4d5 389 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
468a12c2 390 vcpu->arch.shared->dsisr = svcpu->fault_dsisr;
f05ed4d5 391 vcpu->arch.shared->msr |=
468a12c2
AG		 392 (svcpu->shadow_srr1 & 0x00000000f8000000ULL);
393 svcpu_put(svcpu);
f05ed4d5
PM		 394 kvmppc_book3s_queue_irqprio(vcpu, vec);
395 } else if (page_found == -EPERM) {
396 /* Storage protection */
468a12c2 397 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
f05ed4d5 398 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
468a12c2 399 vcpu->arch.shared->dsisr = svcpu->fault_dsisr & ~DSISR_NOHPTE;
f05ed4d5
PM		 400 vcpu->arch.shared->dsisr |= DSISR_PROTFAULT;
401 vcpu->arch.shared->msr |=
468a12c2
AG		 402 svcpu->shadow_srr1 & 0x00000000f8000000ULL;
403 svcpu_put(svcpu);
f05ed4d5
PM		 404 kvmppc_book3s_queue_irqprio(vcpu, vec);
405 } else if (page_found == -EINVAL) {
406 /* Page not found in guest SLB */
407 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
408 kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
409 } else if (!is_mmio &&
410 kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) {
411 /* The guest's PTE is not mapped yet. Map on the host */
412 kvmppc_mmu_map_page(vcpu, &pte);
413 if (data)
414 vcpu->stat.sp_storage++;
415 else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
416 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
417 kvmppc_patch_dcbz(vcpu, &pte);
418 } else {
419 /* MMIO */
420 vcpu->stat.mmio_exits++;
421 vcpu->arch.paddr_accessed = pte.raddr;
6020c0f6 422 vcpu->arch.vaddr_accessed = pte.eaddr;
f05ed4d5
PM		 423 r = kvmppc_emulate_mmio(run, vcpu);
424 if ( r == RESUME_HOST_NV )
425 r = RESUME_HOST;
426 }
427
428 return r;
429}
430
431static inline int get_fpr_index(int i)
432{
433#ifdef CONFIG_VSX
434 i *= 2;
435#endif
436 return i;
437}
438
439/* Give up external provider (FPU, Altivec, VSX) */
440void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
441{
442 struct thread_struct *t = &current->thread;
443 u64 *vcpu_fpr = vcpu->arch.fpr;
444#ifdef CONFIG_VSX
445 u64 *vcpu_vsx = vcpu->arch.vsr;
446#endif
447 u64 *thread_fpr = (u64*)t->fpr;
448 int i;
449
450 if (!(vcpu->arch.guest_owned_ext & msr))
451 return;
452
453#ifdef DEBUG_EXT
454 printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
455#endif
456
457 switch (msr) {
458 case MSR_FP:
459 giveup_fpu(current);
460 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
461 vcpu_fpr[i] = thread_fpr[get_fpr_index(i)];
462
463 vcpu->arch.fpscr = t->fpscr.val;
464 break;
465 case MSR_VEC:
466#ifdef CONFIG_ALTIVEC
467 giveup_altivec(current);
468 memcpy(vcpu->arch.vr, t->vr, sizeof(vcpu->arch.vr));
469 vcpu->arch.vscr = t->vscr;
470#endif
471 break;
472 case MSR_VSX:
473#ifdef CONFIG_VSX
474 __giveup_vsx(current);
475 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++)
476 vcpu_vsx[i] = thread_fpr[get_fpr_index(i) + 1];
477#endif
478 break;
479 default:
480 BUG();
481 }
482
483 vcpu->arch.guest_owned_ext &= ~msr;
484 current->thread.regs->msr &= ~msr;
485 kvmppc_recalc_shadow_msr(vcpu);
486}
487
488static int kvmppc_read_inst(struct kvm_vcpu *vcpu)
489{
490 ulong srr0 = kvmppc_get_pc(vcpu);
491 u32 last_inst = kvmppc_get_last_inst(vcpu);
492 int ret;
493
494 ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false);
495 if (ret == -ENOENT) {
496 ulong msr = vcpu->arch.shared->msr;
497
498 msr = kvmppc_set_field(msr, 33, 33, 1);
499 msr = kvmppc_set_field(msr, 34, 36, 0);
500 vcpu->arch.shared->msr = kvmppc_set_field(msr, 42, 47, 0);
501 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE);
502 return EMULATE_AGAIN;
503 }
504
505 return EMULATE_DONE;
506}
507
508static int kvmppc_check_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr)
509{
510
511 /* Need to do paired single emulation? */
512 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE))
513 return EMULATE_DONE;
514
515 /* Read out the instruction */
516 if (kvmppc_read_inst(vcpu) == EMULATE_DONE)
517 /* Need to emulate */
518 return EMULATE_FAIL;
519
520 return EMULATE_AGAIN;
521}
522
523/* Handle external providers (FPU, Altivec, VSX) */
524static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
525 ulong msr)
526{
527 struct thread_struct *t = &current->thread;
528 u64 *vcpu_fpr = vcpu->arch.fpr;
529#ifdef CONFIG_VSX
530 u64 *vcpu_vsx = vcpu->arch.vsr;
531#endif
532 u64 *thread_fpr = (u64*)t->fpr;
533 int i;
534
535 /* When we have paired singles, we emulate in software */
536 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
537 return RESUME_GUEST;
538
539 if (!(vcpu->arch.shared->msr & msr)) {
540 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
541 return RESUME_GUEST;
542 }
543
544 /* We already own the ext */
545 if (vcpu->arch.guest_owned_ext & msr) {
546 return RESUME_GUEST;
547 }
548
549#ifdef DEBUG_EXT
550 printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
551#endif
552
553 current->thread.regs->msr |= msr;
554
555 switch (msr) {
556 case MSR_FP:
557 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
558 thread_fpr[get_fpr_index(i)] = vcpu_fpr[i];
559
560 t->fpscr.val = vcpu->arch.fpscr;
561 t->fpexc_mode = 0;
562 kvmppc_load_up_fpu();
563 break;
564 case MSR_VEC:
565#ifdef CONFIG_ALTIVEC
566 memcpy(t->vr, vcpu->arch.vr, sizeof(vcpu->arch.vr));
567 t->vscr = vcpu->arch.vscr;
568 t->vrsave = -1;
569 kvmppc_load_up_altivec();
570#endif
571 break;
572 case MSR_VSX:
573#ifdef CONFIG_VSX
574 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++)
575 thread_fpr[get_fpr_index(i) + 1] = vcpu_vsx[i];
576 kvmppc_load_up_vsx();
577#endif
578 break;
579 default:
580 BUG();
581 }
582
583 vcpu->arch.guest_owned_ext |= msr;
584
585 kvmppc_recalc_shadow_msr(vcpu);
586
587 return RESUME_GUEST;
588}
589
590int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
591 unsigned int exit_nr)
592{
593 int r = RESUME_HOST;
594
595 vcpu->stat.sum_exits++;
596
597 run->exit_reason = KVM_EXIT_UNKNOWN;
598 run->ready_for_interrupt_injection = 1;
599
3b1d9d7d
AG		 600 /* We get here with MSR.EE=0, so enable it to be a nice citizen */
601 __hard_irq_enable();
602
97c95059 603 trace_kvm_exit(exit_nr, vcpu);
7d82714d 604 preempt_enable();
f05ed4d5
PM		 605 kvm_resched(vcpu);
606 switch (exit_nr) {
607 case BOOK3S_INTERRUPT_INST_STORAGE:
468a12c2
AG		 608 {
609 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
610 ulong shadow_srr1 = svcpu->shadow_srr1;
f05ed4d5
PM		 611 vcpu->stat.pf_instruc++;
612
613#ifdef CONFIG_PPC_BOOK3S_32
614 /* We set segments as unused segments when invalidating them. So
615 * treat the respective fault as segment fault. */
468a12c2 616 if (svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT] == SR_INVALID) {
f05ed4d5
PM		 617 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
618 r = RESUME_GUEST;
468a12c2 619 svcpu_put(svcpu);
f05ed4d5
PM		 620 break;
621 }
622#endif
468a12c2 623 svcpu_put(svcpu);
f05ed4d5
PM		 624
625 /* only care about PTEG not found errors, but leave NX alone */
468a12c2 626 if (shadow_srr1 & 0x40000000) {
f05ed4d5
PM		 627 r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr);
628 vcpu->stat.sp_instruc++;
629 } else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
630 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
631 /*
632 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
633 * so we can't use the NX bit inside the guest. Let's cross our fingers,
634 * that no guest that needs the dcbz hack does NX.
635 */
636 kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
637 r = RESUME_GUEST;
638 } else {
468a12c2 639 vcpu->arch.shared->msr |= shadow_srr1 & 0x58000000;
f05ed4d5
PM		 640 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
641 r = RESUME_GUEST;
642 }
643 break;
468a12c2 644 }
f05ed4d5
PM		 645 case BOOK3S_INTERRUPT_DATA_STORAGE:
646 {
647 ulong dar = kvmppc_get_fault_dar(vcpu);
468a12c2
AG		 648 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
649 u32 fault_dsisr = svcpu->fault_dsisr;
f05ed4d5
PM		 650 vcpu->stat.pf_storage++;
651
652#ifdef CONFIG_PPC_BOOK3S_32
653 /* We set segments as unused segments when invalidating them. So
654 * treat the respective fault as segment fault. */
468a12c2 655 if ((svcpu->sr[dar >> SID_SHIFT]) == SR_INVALID) {
f05ed4d5
PM		 656 kvmppc_mmu_map_segment(vcpu, dar);
657 r = RESUME_GUEST;
468a12c2 658 svcpu_put(svcpu);
f05ed4d5
PM		 659 break;
660 }
661#endif
468a12c2 662 svcpu_put(svcpu);
f05ed4d5
PM		 663
664 /* The only case we need to handle is missing shadow PTEs */
468a12c2 665 if (fault_dsisr & DSISR_NOHPTE) {
f05ed4d5
PM		 666 r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
667 } else {
668 vcpu->arch.shared->dar = dar;
468a12c2 669 vcpu->arch.shared->dsisr = fault_dsisr;
f05ed4d5
PM		 670 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
671 r = RESUME_GUEST;
672 }
673 break;
674 }
675 case BOOK3S_INTERRUPT_DATA_SEGMENT:
676 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
677 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
678 kvmppc_book3s_queue_irqprio(vcpu,
679 BOOK3S_INTERRUPT_DATA_SEGMENT);
680 }
681 r = RESUME_GUEST;
682 break;
683 case BOOK3S_INTERRUPT_INST_SEGMENT:
684 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
685 kvmppc_book3s_queue_irqprio(vcpu,
686 BOOK3S_INTERRUPT_INST_SEGMENT);
687 }
688 r = RESUME_GUEST;
689 break;
690 /* We're good on these - the host merely wanted to get our attention */
691 case BOOK3S_INTERRUPT_DECREMENTER:
4f225ae0 692 case BOOK3S_INTERRUPT_HV_DECREMENTER:
f05ed4d5
PM		 693 vcpu->stat.dec_exits++;
694 r = RESUME_GUEST;
695 break;
696 case BOOK3S_INTERRUPT_EXTERNAL:
4f225ae0
AG		 697 case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:
698 case BOOK3S_INTERRUPT_EXTERNAL_HV:
f05ed4d5
PM		 699 vcpu->stat.ext_intr_exits++;
700 r = RESUME_GUEST;
701 break;
702 case BOOK3S_INTERRUPT_PERFMON:
703 r = RESUME_GUEST;
704 break;
705 case BOOK3S_INTERRUPT_PROGRAM:
4f225ae0 706 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
f05ed4d5
PM		 707 {
708 enum emulation_result er;
468a12c2 709 struct kvmppc_book3s_shadow_vcpu *svcpu;
f05ed4d5
PM		 710 ulong flags;
711
712program_interrupt:
468a12c2
AG		 713 svcpu = svcpu_get(vcpu);
714 flags = svcpu->shadow_srr1 & 0x1f0000ull;
715 svcpu_put(svcpu);
f05ed4d5
PM		 716
717 if (vcpu->arch.shared->msr & MSR_PR) {
718#ifdef EXIT_DEBUG
719 printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu));
720#endif
721 if ((kvmppc_get_last_inst(vcpu) & 0xff0007ff) !=
722 (INS_DCBZ & 0xfffffff7)) {
723 kvmppc_core_queue_program(vcpu, flags);
724 r = RESUME_GUEST;
725 break;
726 }
727 }
728
729 vcpu->stat.emulated_inst_exits++;
730 er = kvmppc_emulate_instruction(run, vcpu);
731 switch (er) {
732 case EMULATE_DONE:
733 r = RESUME_GUEST_NV;
734 break;
735 case EMULATE_AGAIN:
736 r = RESUME_GUEST;
737 break;
738 case EMULATE_FAIL:
739 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
740 __func__, kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu));
741 kvmppc_core_queue_program(vcpu, flags);
742 r = RESUME_GUEST;
743 break;
744 case EMULATE_DO_MMIO:
745 run->exit_reason = KVM_EXIT_MMIO;
746 r = RESUME_HOST_NV;
747 break;
748 default:
749 BUG();
750 }
751 break;
752 }
753 case BOOK3S_INTERRUPT_SYSCALL:
a668f2bd
AG		 754 if (vcpu->arch.papr_enabled &&
755 (kvmppc_get_last_inst(vcpu) == 0x44000022) &&
756 !(vcpu->arch.shared->msr & MSR_PR)) {
757 /* SC 1 papr hypercalls */
758 ulong cmd = kvmppc_get_gpr(vcpu, 3);
759 int i;
760
96f38d72 761#ifdef CONFIG_KVM_BOOK3S_64_PR
a668f2bd
AG		 762 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
763 r = RESUME_GUEST;
764 break;
765 }
96f38d72 766#endif
a668f2bd
AG		 767
768 run->papr_hcall.nr = cmd;
769 for (i = 0; i < 9; ++i) {
770 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
771 run->papr_hcall.args[i] = gpr;
772 }
773 run->exit_reason = KVM_EXIT_PAPR_HCALL;
774 vcpu->arch.hcall_needed = 1;
775 r = RESUME_HOST;
776 } else if (vcpu->arch.osi_enabled &&
f05ed4d5
PM		 777 (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
778 (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
779 /* MOL hypercalls */
780 u64 *gprs = run->osi.gprs;
781 int i;
782
783 run->exit_reason = KVM_EXIT_OSI;
784 for (i = 0; i < 32; i++)
785 gprs[i] = kvmppc_get_gpr(vcpu, i);
786 vcpu->arch.osi_needed = 1;
787 r = RESUME_HOST_NV;
788 } else if (!(vcpu->arch.shared->msr & MSR_PR) &&
789 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
790 /* KVM PV hypercalls */
791 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
792 r = RESUME_GUEST;
793 } else {
794 /* Guest syscalls */
795 vcpu->stat.syscall_exits++;
796 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
797 r = RESUME_GUEST;
798 }
799 break;
800 case BOOK3S_INTERRUPT_FP_UNAVAIL:
801 case BOOK3S_INTERRUPT_ALTIVEC:
802 case BOOK3S_INTERRUPT_VSX:
803 {
804 int ext_msr = 0;
805
806 switch (exit_nr) {
807 case BOOK3S_INTERRUPT_FP_UNAVAIL: ext_msr = MSR_FP; break;
808 case BOOK3S_INTERRUPT_ALTIVEC: ext_msr = MSR_VEC; break;
809 case BOOK3S_INTERRUPT_VSX: ext_msr = MSR_VSX; break;
810 }
811
812 switch (kvmppc_check_ext(vcpu, exit_nr)) {
813 case EMULATE_DONE:
814 /* everything ok - let's enable the ext */
815 r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
816 break;
817 case EMULATE_FAIL:
818 /* we need to emulate this instruction */
819 goto program_interrupt;
820 break;
821 default:
822 /* nothing to worry about - go again */
823 break;
824 }
825 break;
826 }
827 case BOOK3S_INTERRUPT_ALIGNMENT:
828 if (kvmppc_read_inst(vcpu) == EMULATE_DONE) {
829 vcpu->arch.shared->dsisr = kvmppc_alignment_dsisr(vcpu,
830 kvmppc_get_last_inst(vcpu));
831 vcpu->arch.shared->dar = kvmppc_alignment_dar(vcpu,
832 kvmppc_get_last_inst(vcpu));
833 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
834 }
835 r = RESUME_GUEST;
836 break;
837 case BOOK3S_INTERRUPT_MACHINE_CHECK:
838 case BOOK3S_INTERRUPT_TRACE:
839 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
840 r = RESUME_GUEST;
841 break;
842 default:
468a12c2
AG		 843 {
844 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
845 ulong shadow_srr1 = svcpu->shadow_srr1;
846 svcpu_put(svcpu);
f05ed4d5
PM		 847 /* Ugh - bork here! What did we get? */
848 printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
468a12c2 849 exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
f05ed4d5
PM		 850 r = RESUME_HOST;
851 BUG();
852 break;
853 }
468a12c2 854 }
f05ed4d5 855
592f5d87 856 preempt_disable();
f05ed4d5
PM		 857 if (!(r & RESUME_HOST)) {
858 /* To avoid clobbering exit_reason, only check for signals if
859 * we aren't already exiting to userspace for some other
860 * reason. */
e371f713
AG		 861
862 /*
863 * Interrupts could be timers for the guest which we have to
864 * inject again, so let's postpone them until we're in the guest
865 * and if we really did time things so badly, then we just exit
866 * again due to a host external interrupt.
867 */
868 __hard_irq_disable();
03d25c5b 869 if (kvmppc_prepare_to_enter(vcpu)) {
f05ed4d5
PM		 870 run->exit_reason = KVM_EXIT_INTR;
871 r = -EINTR;
f05ed4d5
PM		 872 }
873 }
874
875 trace_kvm_book3s_reenter(r, vcpu);
876
877 return r;
878}
879
880int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
881 struct kvm_sregs *sregs)
882{
883 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
884 int i;
885
886 sregs->pvr = vcpu->arch.pvr;
887
888 sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
889 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
890 for (i = 0; i < 64; i++) {
891 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
892 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
893 }
894 } else {
895 for (i = 0; i < 16; i++)
896 sregs->u.s.ppc32.sr[i] = vcpu->arch.shared->sr[i];
897
898 for (i = 0; i < 8; i++) {
899 sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
900 sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
901 }
902 }
903
904 return 0;
905}
906
907int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
908 struct kvm_sregs *sregs)
909{
910 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
911 int i;
912
913 kvmppc_set_pvr(vcpu, sregs->pvr);
914
915 vcpu3s->sdr1 = sregs->u.s.sdr1;
916 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
917 for (i = 0; i < 64; i++) {
918 vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv,
919 sregs->u.s.ppc64.slb[i].slbe);
920 }
921 } else {
922 for (i = 0; i < 16; i++) {
923 vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
924 }
925 for (i = 0; i < 8; i++) {
926 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
927 (u32)sregs->u.s.ppc32.ibat[i]);
928 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
929 (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
930 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
931 (u32)sregs->u.s.ppc32.dbat[i]);
932 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
933 (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
934 }
935 }
936
937 /* Flush the MMU after messing with the segments */
938 kvmppc_mmu_pte_flush(vcpu, 0, 0);
939
940 return 0;
941}
942
31f3438e
PM		 943int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
944{
945 int r = -EINVAL;
946
947 switch (reg->id) {
948 case KVM_REG_PPC_HIOR:
b8e6f8ae
AG		 949 r = copy_to_user((u64 __user *)(long)reg->addr,
950 &to_book3s(vcpu)->hior, sizeof(u64));
31f3438e
PM		 951 break;
952 default:
953 break;
954 }
955
956 return r;
957}
958
959int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
960{
961 int r = -EINVAL;
962
963 switch (reg->id) {
964 case KVM_REG_PPC_HIOR:
b8e6f8ae
AG		 965 r = copy_from_user(&to_book3s(vcpu)->hior,
966 (u64 __user *)(long)reg->addr, sizeof(u64));
31f3438e
PM		 967 if (!r)
968 to_book3s(vcpu)->hior_explicit = true;
969 break;
970 default:
971 break;
972 }
973
974 return r;
975}
976
f05ed4d5
PM		 977int kvmppc_core_check_processor_compat(void)
978{
979 return 0;
980}
981
982struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
983{
984 struct kvmppc_vcpu_book3s *vcpu_book3s;
985 struct kvm_vcpu *vcpu;
986 int err = -ENOMEM;
987 unsigned long p;
988
989 vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
990 if (!vcpu_book3s)
991 goto out;
992
993 vcpu_book3s->shadow_vcpu = (struct kvmppc_book3s_shadow_vcpu *)
994 kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL);
995 if (!vcpu_book3s->shadow_vcpu)
996 goto free_vcpu;
997
998 vcpu = &vcpu_book3s->vcpu;
999 err = kvm_vcpu_init(vcpu, kvm, id);
1000 if (err)
1001 goto free_shadow_vcpu;
1002
1003 p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
1004 /* the real shared page fills the last 4k of our page */
1005 vcpu->arch.shared = (void*)(p + PAGE_SIZE - 4096);
1006 if (!p)
1007 goto uninit_vcpu;
1008
f05ed4d5
PM		 1009#ifdef CONFIG_PPC_BOOK3S_64
1010 /* default to book3s_64 (970fx) */
1011 vcpu->arch.pvr = 0x3C0301;
1012#else
1013 /* default to book3s_32 (750) */
1014 vcpu->arch.pvr = 0x84202;
1015#endif
1016 kvmppc_set_pvr(vcpu, vcpu->arch.pvr);
1017 vcpu->arch.slb_nr = 64;
1018
f05ed4d5
PM		 1019 vcpu->arch.shadow_msr = MSR_USER64;
1020
1021 err = kvmppc_mmu_init(vcpu);
1022 if (err < 0)
1023 goto uninit_vcpu;
1024
1025 return vcpu;
1026
1027uninit_vcpu:
1028 kvm_vcpu_uninit(vcpu);
1029free_shadow_vcpu:
1030 kfree(vcpu_book3s->shadow_vcpu);
1031free_vcpu:
1032 vfree(vcpu_book3s);
1033out:
1034 return ERR_PTR(err);
1035}
1036
1037void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
1038{
1039 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
1040
1041 free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
1042 kvm_vcpu_uninit(vcpu);
1043 kfree(vcpu_book3s->shadow_vcpu);
1044 vfree(vcpu_book3s);
1045}
1046
df6909e5 1047int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
f05ed4d5
PM		 1048{
1049 int ret;
1050 double fpr[32][TS_FPRWIDTH];
1051 unsigned int fpscr;
1052 int fpexc_mode;
1053#ifdef CONFIG_ALTIVEC
1054 vector128 vr[32];
1055 vector128 vscr;
1056 unsigned long uninitialized_var(vrsave);
1057 int used_vr;
1058#endif
1059#ifdef CONFIG_VSX
1060 int used_vsr;
1061#endif
1062 ulong ext_msr;
1063
7d82714d
AG		 1064 preempt_disable();
1065
af8f38b3
AG		 1066 /* Check if we can run the vcpu at all */
1067 if (!vcpu->arch.sane) {
1068 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7d82714d
AG		 1069 ret = -EINVAL;
1070 goto out;
af8f38b3
AG		 1071 }
1072
e371f713
AG		 1073 /*
1074 * Interrupts could be timers for the guest which we have to inject
1075 * again, so let's postpone them until we're in the guest and if we
1076 * really did time things so badly, then we just exit again due to
1077 * a host external interrupt.
1078 */
1079 __hard_irq_disable();
03d25c5b 1080 if (kvmppc_prepare_to_enter(vcpu)) {
e371f713 1081 __hard_irq_enable();
f05ed4d5 1082 kvm_run->exit_reason = KVM_EXIT_INTR;
7d82714d
AG		 1083 ret = -EINTR;
1084 goto out;
f05ed4d5
PM		 1085 }
1086
1087 /* Save FPU state in stack */
1088 if (current->thread.regs->msr & MSR_FP)
1089 giveup_fpu(current);
1090 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
1091 fpscr = current->thread.fpscr.val;
1092 fpexc_mode = current->thread.fpexc_mode;
1093
1094#ifdef CONFIG_ALTIVEC
1095 /* Save Altivec state in stack */
1096 used_vr = current->thread.used_vr;
1097 if (used_vr) {
1098 if (current->thread.regs->msr & MSR_VEC)
1099 giveup_altivec(current);
1100 memcpy(vr, current->thread.vr, sizeof(current->thread.vr));
1101 vscr = current->thread.vscr;
1102 vrsave = current->thread.vrsave;
1103 }
1104#endif
1105
1106#ifdef CONFIG_VSX
1107 /* Save VSX state in stack */
1108 used_vsr = current->thread.used_vsr;
1109 if (used_vsr && (current->thread.regs->msr & MSR_VSX))
1110 __giveup_vsx(current);
1111#endif
1112
1113 /* Remember the MSR with disabled extensions */
1114 ext_msr = current->thread.regs->msr;
1115
f05ed4d5
PM		 1116 /* Preload FPU if it's enabled */
1117 if (vcpu->arch.shared->msr & MSR_FP)
1118 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
1119
df6909e5
PM		 1120 kvm_guest_enter();
1121
1122 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
1123
1124 kvm_guest_exit();
f05ed4d5 1125
f05ed4d5
PM		 1126 current->thread.regs->msr = ext_msr;
1127
1128 /* Make sure we save the guest FPU/Altivec/VSX state */
1129 kvmppc_giveup_ext(vcpu, MSR_FP);
1130 kvmppc_giveup_ext(vcpu, MSR_VEC);
1131 kvmppc_giveup_ext(vcpu, MSR_VSX);
1132
1133 /* Restore FPU state from stack */
1134 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
1135 current->thread.fpscr.val = fpscr;
1136 current->thread.fpexc_mode = fpexc_mode;
1137
1138#ifdef CONFIG_ALTIVEC
1139 /* Restore Altivec state from stack */
1140 if (used_vr && current->thread.used_vr) {
1141 memcpy(current->thread.vr, vr, sizeof(current->thread.vr));
1142 current->thread.vscr = vscr;
1143 current->thread.vrsave = vrsave;
1144 }
1145 current->thread.used_vr = used_vr;
1146#endif
1147
1148#ifdef CONFIG_VSX
1149 current->thread.used_vsr = used_vsr;
1150#endif
1151
7d82714d
AG		 1152out:
1153 preempt_enable();
f05ed4d5
PM		 1154 return ret;
1155}
1156
82ed3616
PM		 1157/*
1158 * Get (and clear) the dirty memory log for a memory slot.
1159 */
1160int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1161 struct kvm_dirty_log *log)
1162{
1163 struct kvm_memory_slot *memslot;
1164 struct kvm_vcpu *vcpu;
1165 ulong ga, ga_end;
1166 int is_dirty = 0;
1167 int r;
1168 unsigned long n;
1169
1170 mutex_lock(&kvm->slots_lock);
1171
1172 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1173 if (r)
1174 goto out;
1175
1176 /* If nothing is dirty, don't bother messing with page tables. */
1177 if (is_dirty) {
1178 memslot = id_to_memslot(kvm->memslots, log->slot);
1179
1180 ga = memslot->base_gfn << PAGE_SHIFT;
1181 ga_end = ga + (memslot->npages << PAGE_SHIFT);
1182
1183 kvm_for_each_vcpu(n, vcpu, kvm)
1184 kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);
1185
1186 n = kvm_dirty_bitmap_bytes(memslot);
1187 memset(memslot->dirty_bitmap, 0, n);
1188 }
1189
1190 r = 0;
1191out:
1192 mutex_unlock(&kvm->slots_lock);
1193 return r;
1194}
1195
5b74716e
BH		 1196#ifdef CONFIG_PPC64
1197int kvm_vm_ioctl_get_smmu_info(struct kvm *kvm, struct kvm_ppc_smmu_info *info)
1198{
1199 /* No flags */
1200 info->flags = 0;
1201
1202 /* SLB is always 64 entries */
1203 info->slb_size = 64;
1204
1205 /* Standard 4k base page size segment */
1206 info->sps[0].page_shift = 12;
1207 info->sps[0].slb_enc = 0;
1208 info->sps[0].enc[0].page_shift = 12;
1209 info->sps[0].enc[0].pte_enc = 0;
1210
1211 /* Standard 16M large page size segment */
1212 info->sps[1].page_shift = 24;
1213 info->sps[1].slb_enc = SLB_VSID_L;
1214 info->sps[1].enc[0].page_shift = 24;
1215 info->sps[1].enc[0].pte_enc = 0;
1216
1217 return 0;
1218}
1219#endif /* CONFIG_PPC64 */
1220
f9e0554d
PM		 1221int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1222 struct kvm_userspace_memory_region *mem)
1223{
1224 return 0;
1225}
1226
1227void kvmppc_core_commit_memory_region(struct kvm *kvm,
1228 struct kvm_userspace_memory_region *mem)
1229{
1230}
1231
1232int kvmppc_core_init_vm(struct kvm *kvm)
1233{
f31e65e1
BH		 1234#ifdef CONFIG_PPC64
1235 INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables);
1236#endif
1237
f9e0554d
PM		 1238 return 0;
1239}
1240
1241void kvmppc_core_destroy_vm(struct kvm *kvm)
1242{
f31e65e1
BH		 1243#ifdef CONFIG_PPC64
1244 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
1245#endif
f9e0554d
PM		 1246}
1247
f05ed4d5
PM		 1248static int kvmppc_book3s_init(void)
1249{
1250 int r;
1251
1252 r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_book3s), 0,
1253 THIS_MODULE);
1254
1255 if (r)
1256 return r;
1257
1258 r = kvmppc_mmu_hpte_sysinit();
1259
1260 return r;
1261}
1262
1263static void kvmppc_book3s_exit(void)
1264{
1265 kvmppc_mmu_hpte_sysexit();
1266 kvm_exit();
1267}
1268
1269module_init(kvmppc_book3s_init);
1270module_exit(kvmppc_book3s_exit);
Linux 6.x block layer and io_uring tree(s)