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f05ed4d5 PM |
1 | /* |
2 | * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. | |
3 | * | |
4 | * Authors: | |
5 | * Alexander Graf <agraf@suse.de> | |
6 | * Kevin Wolf <mail@kevin-wolf.de> | |
7 | * Paul Mackerras <paulus@samba.org> | |
8 | * | |
9 | * Description: | |
10 | * Functions relating to running KVM on Book 3S processors where | |
11 | * we don't have access to hypervisor mode, and we run the guest | |
12 | * in problem state (user mode). | |
13 | * | |
14 | * This file is derived from arch/powerpc/kvm/44x.c, | |
15 | * by Hollis Blanchard <hollisb@us.ibm.com>. | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or modify | |
18 | * it under the terms of the GNU General Public License, version 2, as | |
19 | * published by the Free Software Foundation. | |
20 | */ | |
21 | ||
22 | #include <linux/kvm_host.h> | |
93087948 | 23 | #include <linux/export.h> |
f05ed4d5 PM |
24 | #include <linux/err.h> |
25 | #include <linux/slab.h> | |
26 | ||
27 | #include <asm/reg.h> | |
28 | #include <asm/cputable.h> | |
29 | #include <asm/cacheflush.h> | |
30 | #include <asm/tlbflush.h> | |
31 | #include <asm/uaccess.h> | |
32 | #include <asm/io.h> | |
33 | #include <asm/kvm_ppc.h> | |
34 | #include <asm/kvm_book3s.h> | |
35 | #include <asm/mmu_context.h> | |
95327d08 | 36 | #include <asm/switch_to.h> |
a413f474 | 37 | #include <asm/firmware.h> |
deb26c27 | 38 | #include <asm/hvcall.h> |
f05ed4d5 PM |
39 | #include <linux/gfp.h> |
40 | #include <linux/sched.h> | |
41 | #include <linux/vmalloc.h> | |
42 | #include <linux/highmem.h> | |
2ba9f0d8 | 43 | #include <linux/module.h> |
398a76c6 | 44 | #include <linux/miscdevice.h> |
f05ed4d5 | 45 | |
3a167bea | 46 | #include "book3s.h" |
72c12535 AK |
47 | |
48 | #define CREATE_TRACE_POINTS | |
49 | #include "trace_pr.h" | |
f05ed4d5 PM |
50 | |
51 | /* #define EXIT_DEBUG */ | |
52 | /* #define DEBUG_EXT */ | |
53 | ||
54 | static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, | |
55 | ulong msr); | |
616dff86 | 56 | static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac); |
f05ed4d5 PM |
57 | |
58 | /* Some compatibility defines */ | |
59 | #ifdef CONFIG_PPC_BOOK3S_32 | |
60 | #define MSR_USER32 MSR_USER | |
61 | #define MSR_USER64 MSR_USER | |
62 | #define HW_PAGE_SIZE PAGE_SIZE | |
63 | #endif | |
64 | ||
3a167bea | 65 | static void kvmppc_core_vcpu_load_pr(struct kvm_vcpu *vcpu, int cpu) |
f05ed4d5 PM |
66 | { |
67 | #ifdef CONFIG_PPC_BOOK3S_64 | |
468a12c2 AG |
68 | struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); |
69 | memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb)); | |
468a12c2 | 70 | svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max; |
40fdd8c8 | 71 | svcpu->in_use = 0; |
468a12c2 | 72 | svcpu_put(svcpu); |
f05ed4d5 | 73 | #endif |
a47d72f3 | 74 | vcpu->cpu = smp_processor_id(); |
f05ed4d5 | 75 | #ifdef CONFIG_PPC_BOOK3S_32 |
3ff95502 | 76 | current->thread.kvm_shadow_vcpu = vcpu->arch.shadow_vcpu; |
f05ed4d5 PM |
77 | #endif |
78 | } | |
79 | ||
3a167bea | 80 | static void kvmppc_core_vcpu_put_pr(struct kvm_vcpu *vcpu) |
f05ed4d5 PM |
81 | { |
82 | #ifdef CONFIG_PPC_BOOK3S_64 | |
468a12c2 | 83 | struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); |
40fdd8c8 AG |
84 | if (svcpu->in_use) { |
85 | kvmppc_copy_from_svcpu(vcpu, svcpu); | |
86 | } | |
468a12c2 | 87 | memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb)); |
468a12c2 AG |
88 | to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max; |
89 | svcpu_put(svcpu); | |
f05ed4d5 PM |
90 | #endif |
91 | ||
28c483b6 | 92 | kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX); |
e14e7a1e | 93 | kvmppc_giveup_fac(vcpu, FSCR_TAR_LG); |
a47d72f3 | 94 | vcpu->cpu = -1; |
f05ed4d5 PM |
95 | } |
96 | ||
a2d56020 PM |
97 | /* Copy data needed by real-mode code from vcpu to shadow vcpu */ |
98 | void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu, | |
99 | struct kvm_vcpu *vcpu) | |
100 | { | |
101 | svcpu->gpr[0] = vcpu->arch.gpr[0]; | |
102 | svcpu->gpr[1] = vcpu->arch.gpr[1]; | |
103 | svcpu->gpr[2] = vcpu->arch.gpr[2]; | |
104 | svcpu->gpr[3] = vcpu->arch.gpr[3]; | |
105 | svcpu->gpr[4] = vcpu->arch.gpr[4]; | |
106 | svcpu->gpr[5] = vcpu->arch.gpr[5]; | |
107 | svcpu->gpr[6] = vcpu->arch.gpr[6]; | |
108 | svcpu->gpr[7] = vcpu->arch.gpr[7]; | |
109 | svcpu->gpr[8] = vcpu->arch.gpr[8]; | |
110 | svcpu->gpr[9] = vcpu->arch.gpr[9]; | |
111 | svcpu->gpr[10] = vcpu->arch.gpr[10]; | |
112 | svcpu->gpr[11] = vcpu->arch.gpr[11]; | |
113 | svcpu->gpr[12] = vcpu->arch.gpr[12]; | |
114 | svcpu->gpr[13] = vcpu->arch.gpr[13]; | |
115 | svcpu->cr = vcpu->arch.cr; | |
116 | svcpu->xer = vcpu->arch.xer; | |
117 | svcpu->ctr = vcpu->arch.ctr; | |
118 | svcpu->lr = vcpu->arch.lr; | |
119 | svcpu->pc = vcpu->arch.pc; | |
616dff86 AG |
120 | #ifdef CONFIG_PPC_BOOK3S_64 |
121 | svcpu->shadow_fscr = vcpu->arch.shadow_fscr; | |
122 | #endif | |
3cd60e31 AK |
123 | /* |
124 | * Now also save the current time base value. We use this | |
125 | * to find the guest purr and spurr value. | |
126 | */ | |
127 | vcpu->arch.entry_tb = get_tb(); | |
40fdd8c8 | 128 | svcpu->in_use = true; |
a2d56020 PM |
129 | } |
130 | ||
131 | /* Copy data touched by real-mode code from shadow vcpu back to vcpu */ | |
132 | void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu, | |
133 | struct kvmppc_book3s_shadow_vcpu *svcpu) | |
134 | { | |
40fdd8c8 AG |
135 | /* |
136 | * vcpu_put would just call us again because in_use hasn't | |
137 | * been updated yet. | |
138 | */ | |
139 | preempt_disable(); | |
140 | ||
141 | /* | |
142 | * Maybe we were already preempted and synced the svcpu from | |
143 | * our preempt notifiers. Don't bother touching this svcpu then. | |
144 | */ | |
145 | if (!svcpu->in_use) | |
146 | goto out; | |
147 | ||
a2d56020 PM |
148 | vcpu->arch.gpr[0] = svcpu->gpr[0]; |
149 | vcpu->arch.gpr[1] = svcpu->gpr[1]; | |
150 | vcpu->arch.gpr[2] = svcpu->gpr[2]; | |
151 | vcpu->arch.gpr[3] = svcpu->gpr[3]; | |
152 | vcpu->arch.gpr[4] = svcpu->gpr[4]; | |
153 | vcpu->arch.gpr[5] = svcpu->gpr[5]; | |
154 | vcpu->arch.gpr[6] = svcpu->gpr[6]; | |
155 | vcpu->arch.gpr[7] = svcpu->gpr[7]; | |
156 | vcpu->arch.gpr[8] = svcpu->gpr[8]; | |
157 | vcpu->arch.gpr[9] = svcpu->gpr[9]; | |
158 | vcpu->arch.gpr[10] = svcpu->gpr[10]; | |
159 | vcpu->arch.gpr[11] = svcpu->gpr[11]; | |
160 | vcpu->arch.gpr[12] = svcpu->gpr[12]; | |
161 | vcpu->arch.gpr[13] = svcpu->gpr[13]; | |
162 | vcpu->arch.cr = svcpu->cr; | |
163 | vcpu->arch.xer = svcpu->xer; | |
164 | vcpu->arch.ctr = svcpu->ctr; | |
165 | vcpu->arch.lr = svcpu->lr; | |
166 | vcpu->arch.pc = svcpu->pc; | |
167 | vcpu->arch.shadow_srr1 = svcpu->shadow_srr1; | |
168 | vcpu->arch.fault_dar = svcpu->fault_dar; | |
169 | vcpu->arch.fault_dsisr = svcpu->fault_dsisr; | |
170 | vcpu->arch.last_inst = svcpu->last_inst; | |
616dff86 AG |
171 | #ifdef CONFIG_PPC_BOOK3S_64 |
172 | vcpu->arch.shadow_fscr = svcpu->shadow_fscr; | |
173 | #endif | |
3cd60e31 AK |
174 | /* |
175 | * Update purr and spurr using time base on exit. | |
176 | */ | |
177 | vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb; | |
178 | vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb; | |
179 | ||
40fdd8c8 AG |
180 | svcpu->in_use = false; |
181 | ||
182 | out: | |
183 | preempt_enable(); | |
a2d56020 PM |
184 | } |
185 | ||
3a167bea | 186 | static int kvmppc_core_check_requests_pr(struct kvm_vcpu *vcpu) |
03d25c5b | 187 | { |
7c973a2e AG |
188 | int r = 1; /* Indicate we want to get back into the guest */ |
189 | ||
9b0cb3c8 AG |
190 | /* We misuse TLB_FLUSH to indicate that we want to clear |
191 | all shadow cache entries */ | |
192 | if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) | |
193 | kvmppc_mmu_pte_flush(vcpu, 0, 0); | |
7c973a2e AG |
194 | |
195 | return r; | |
03d25c5b AG |
196 | } |
197 | ||
9b0cb3c8 | 198 | /************* MMU Notifiers *************/ |
491d6ecc PM |
199 | static void do_kvm_unmap_hva(struct kvm *kvm, unsigned long start, |
200 | unsigned long end) | |
201 | { | |
202 | long i; | |
203 | struct kvm_vcpu *vcpu; | |
204 | struct kvm_memslots *slots; | |
205 | struct kvm_memory_slot *memslot; | |
206 | ||
207 | slots = kvm_memslots(kvm); | |
208 | kvm_for_each_memslot(memslot, slots) { | |
209 | unsigned long hva_start, hva_end; | |
210 | gfn_t gfn, gfn_end; | |
211 | ||
212 | hva_start = max(start, memslot->userspace_addr); | |
213 | hva_end = min(end, memslot->userspace_addr + | |
214 | (memslot->npages << PAGE_SHIFT)); | |
215 | if (hva_start >= hva_end) | |
216 | continue; | |
217 | /* | |
218 | * {gfn(page) | page intersects with [hva_start, hva_end)} = | |
219 | * {gfn, gfn+1, ..., gfn_end-1}. | |
220 | */ | |
221 | gfn = hva_to_gfn_memslot(hva_start, memslot); | |
222 | gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot); | |
223 | kvm_for_each_vcpu(i, vcpu, kvm) | |
224 | kvmppc_mmu_pte_pflush(vcpu, gfn << PAGE_SHIFT, | |
225 | gfn_end << PAGE_SHIFT); | |
226 | } | |
227 | } | |
9b0cb3c8 | 228 | |
3a167bea | 229 | static int kvm_unmap_hva_pr(struct kvm *kvm, unsigned long hva) |
9b0cb3c8 AG |
230 | { |
231 | trace_kvm_unmap_hva(hva); | |
232 | ||
491d6ecc | 233 | do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE); |
9b0cb3c8 AG |
234 | |
235 | return 0; | |
236 | } | |
237 | ||
3a167bea AK |
238 | static int kvm_unmap_hva_range_pr(struct kvm *kvm, unsigned long start, |
239 | unsigned long end) | |
9b0cb3c8 | 240 | { |
491d6ecc | 241 | do_kvm_unmap_hva(kvm, start, end); |
9b0cb3c8 AG |
242 | |
243 | return 0; | |
244 | } | |
245 | ||
3a167bea | 246 | static int kvm_age_hva_pr(struct kvm *kvm, unsigned long hva) |
9b0cb3c8 AG |
247 | { |
248 | /* XXX could be more clever ;) */ | |
249 | return 0; | |
250 | } | |
251 | ||
3a167bea | 252 | static int kvm_test_age_hva_pr(struct kvm *kvm, unsigned long hva) |
9b0cb3c8 AG |
253 | { |
254 | /* XXX could be more clever ;) */ | |
255 | return 0; | |
256 | } | |
257 | ||
3a167bea | 258 | static void kvm_set_spte_hva_pr(struct kvm *kvm, unsigned long hva, pte_t pte) |
9b0cb3c8 AG |
259 | { |
260 | /* The page will get remapped properly on its next fault */ | |
491d6ecc | 261 | do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE); |
9b0cb3c8 AG |
262 | } |
263 | ||
264 | /*****************************************/ | |
265 | ||
f05ed4d5 PM |
266 | static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu) |
267 | { | |
5deb8e7a AG |
268 | ulong guest_msr = kvmppc_get_msr(vcpu); |
269 | ulong smsr = guest_msr; | |
f05ed4d5 PM |
270 | |
271 | /* Guest MSR values */ | |
e5ee5422 | 272 | smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE; |
f05ed4d5 PM |
273 | /* Process MSR values */ |
274 | smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE; | |
275 | /* External providers the guest reserved */ | |
5deb8e7a | 276 | smsr |= (guest_msr & vcpu->arch.guest_owned_ext); |
f05ed4d5 PM |
277 | /* 64-bit Process MSR values */ |
278 | #ifdef CONFIG_PPC_BOOK3S_64 | |
279 | smsr |= MSR_ISF | MSR_HV; | |
280 | #endif | |
281 | vcpu->arch.shadow_msr = smsr; | |
282 | } | |
283 | ||
3a167bea | 284 | static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr) |
f05ed4d5 | 285 | { |
5deb8e7a | 286 | ulong old_msr = kvmppc_get_msr(vcpu); |
f05ed4d5 PM |
287 | |
288 | #ifdef EXIT_DEBUG | |
289 | printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr); | |
290 | #endif | |
291 | ||
292 | msr &= to_book3s(vcpu)->msr_mask; | |
5deb8e7a | 293 | kvmppc_set_msr_fast(vcpu, msr); |
f05ed4d5 PM |
294 | kvmppc_recalc_shadow_msr(vcpu); |
295 | ||
296 | if (msr & MSR_POW) { | |
297 | if (!vcpu->arch.pending_exceptions) { | |
298 | kvm_vcpu_block(vcpu); | |
966cd0f3 | 299 | clear_bit(KVM_REQ_UNHALT, &vcpu->requests); |
f05ed4d5 PM |
300 | vcpu->stat.halt_wakeup++; |
301 | ||
302 | /* Unset POW bit after we woke up */ | |
303 | msr &= ~MSR_POW; | |
5deb8e7a | 304 | kvmppc_set_msr_fast(vcpu, msr); |
f05ed4d5 PM |
305 | } |
306 | } | |
307 | ||
5deb8e7a | 308 | if ((kvmppc_get_msr(vcpu) & (MSR_PR|MSR_IR|MSR_DR)) != |
f05ed4d5 PM |
309 | (old_msr & (MSR_PR|MSR_IR|MSR_DR))) { |
310 | kvmppc_mmu_flush_segments(vcpu); | |
311 | kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); | |
312 | ||
313 | /* Preload magic page segment when in kernel mode */ | |
314 | if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) { | |
315 | struct kvm_vcpu_arch *a = &vcpu->arch; | |
316 | ||
317 | if (msr & MSR_DR) | |
318 | kvmppc_mmu_map_segment(vcpu, a->magic_page_ea); | |
319 | else | |
320 | kvmppc_mmu_map_segment(vcpu, a->magic_page_pa); | |
321 | } | |
322 | } | |
323 | ||
bbcc9c06 BH |
324 | /* |
325 | * When switching from 32 to 64-bit, we may have a stale 32-bit | |
326 | * magic page around, we need to flush it. Typically 32-bit magic | |
327 | * page will be instanciated when calling into RTAS. Note: We | |
328 | * assume that such transition only happens while in kernel mode, | |
329 | * ie, we never transition from user 32-bit to kernel 64-bit with | |
330 | * a 32-bit magic page around. | |
331 | */ | |
332 | if (vcpu->arch.magic_page_pa && | |
333 | !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) { | |
334 | /* going from RTAS to normal kernel code */ | |
335 | kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa, | |
336 | ~0xFFFUL); | |
337 | } | |
338 | ||
f05ed4d5 | 339 | /* Preload FPU if it's enabled */ |
5deb8e7a | 340 | if (kvmppc_get_msr(vcpu) & MSR_FP) |
f05ed4d5 PM |
341 | kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); |
342 | } | |
343 | ||
3a167bea | 344 | void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr) |
f05ed4d5 PM |
345 | { |
346 | u32 host_pvr; | |
347 | ||
348 | vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB; | |
349 | vcpu->arch.pvr = pvr; | |
350 | #ifdef CONFIG_PPC_BOOK3S_64 | |
351 | if ((pvr >= 0x330000) && (pvr < 0x70330000)) { | |
352 | kvmppc_mmu_book3s_64_init(vcpu); | |
1022fc3d AG |
353 | if (!to_book3s(vcpu)->hior_explicit) |
354 | to_book3s(vcpu)->hior = 0xfff00000; | |
f05ed4d5 | 355 | to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL; |
af8f38b3 | 356 | vcpu->arch.cpu_type = KVM_CPU_3S_64; |
f05ed4d5 PM |
357 | } else |
358 | #endif | |
359 | { | |
360 | kvmppc_mmu_book3s_32_init(vcpu); | |
1022fc3d AG |
361 | if (!to_book3s(vcpu)->hior_explicit) |
362 | to_book3s(vcpu)->hior = 0; | |
f05ed4d5 | 363 | to_book3s(vcpu)->msr_mask = 0xffffffffULL; |
af8f38b3 | 364 | vcpu->arch.cpu_type = KVM_CPU_3S_32; |
f05ed4d5 PM |
365 | } |
366 | ||
af8f38b3 AG |
367 | kvmppc_sanity_check(vcpu); |
368 | ||
f05ed4d5 PM |
369 | /* If we are in hypervisor level on 970, we can tell the CPU to |
370 | * treat DCBZ as 32 bytes store */ | |
371 | vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32; | |
372 | if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) && | |
373 | !strcmp(cur_cpu_spec->platform, "ppc970")) | |
374 | vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; | |
375 | ||
376 | /* Cell performs badly if MSR_FEx are set. So let's hope nobody | |
377 | really needs them in a VM on Cell and force disable them. */ | |
378 | if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be")) | |
379 | to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1); | |
380 | ||
a4a0f252 PM |
381 | /* |
382 | * If they're asking for POWER6 or later, set the flag | |
383 | * indicating that we can do multiple large page sizes | |
384 | * and 1TB segments. | |
385 | * Also set the flag that indicates that tlbie has the large | |
386 | * page bit in the RB operand instead of the instruction. | |
387 | */ | |
388 | switch (PVR_VER(pvr)) { | |
389 | case PVR_POWER6: | |
390 | case PVR_POWER7: | |
391 | case PVR_POWER7p: | |
392 | case PVR_POWER8: | |
393 | vcpu->arch.hflags |= BOOK3S_HFLAG_MULTI_PGSIZE | | |
394 | BOOK3S_HFLAG_NEW_TLBIE; | |
395 | break; | |
396 | } | |
397 | ||
f05ed4d5 PM |
398 | #ifdef CONFIG_PPC_BOOK3S_32 |
399 | /* 32 bit Book3S always has 32 byte dcbz */ | |
400 | vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; | |
401 | #endif | |
402 | ||
403 | /* On some CPUs we can execute paired single operations natively */ | |
404 | asm ( "mfpvr %0" : "=r"(host_pvr)); | |
405 | switch (host_pvr) { | |
406 | case 0x00080200: /* lonestar 2.0 */ | |
407 | case 0x00088202: /* lonestar 2.2 */ | |
408 | case 0x70000100: /* gekko 1.0 */ | |
409 | case 0x00080100: /* gekko 2.0 */ | |
410 | case 0x00083203: /* gekko 2.3a */ | |
411 | case 0x00083213: /* gekko 2.3b */ | |
412 | case 0x00083204: /* gekko 2.4 */ | |
413 | case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */ | |
414 | case 0x00087200: /* broadway */ | |
415 | vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS; | |
416 | /* Enable HID2.PSE - in case we need it later */ | |
417 | mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29)); | |
418 | } | |
419 | } | |
420 | ||
421 | /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To | |
422 | * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to | |
423 | * emulate 32 bytes dcbz length. | |
424 | * | |
425 | * The Book3s_64 inventors also realized this case and implemented a special bit | |
426 | * in the HID5 register, which is a hypervisor ressource. Thus we can't use it. | |
427 | * | |
428 | * My approach here is to patch the dcbz instruction on executing pages. | |
429 | */ | |
430 | static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte) | |
431 | { | |
432 | struct page *hpage; | |
433 | u64 hpage_offset; | |
434 | u32 *page; | |
435 | int i; | |
436 | ||
437 | hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT); | |
32cad84f | 438 | if (is_error_page(hpage)) |
f05ed4d5 | 439 | return; |
f05ed4d5 PM |
440 | |
441 | hpage_offset = pte->raddr & ~PAGE_MASK; | |
442 | hpage_offset &= ~0xFFFULL; | |
443 | hpage_offset /= 4; | |
444 | ||
445 | get_page(hpage); | |
2480b208 | 446 | page = kmap_atomic(hpage); |
f05ed4d5 PM |
447 | |
448 | /* patch dcbz into reserved instruction, so we trap */ | |
449 | for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++) | |
cd087eef AG |
450 | if ((be32_to_cpu(page[i]) & 0xff0007ff) == INS_DCBZ) |
451 | page[i] &= cpu_to_be32(0xfffffff7); | |
f05ed4d5 | 452 | |
2480b208 | 453 | kunmap_atomic(page); |
f05ed4d5 PM |
454 | put_page(hpage); |
455 | } | |
456 | ||
457 | static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn) | |
458 | { | |
459 | ulong mp_pa = vcpu->arch.magic_page_pa; | |
460 | ||
5deb8e7a | 461 | if (!(kvmppc_get_msr(vcpu) & MSR_SF)) |
bbcc9c06 BH |
462 | mp_pa = (uint32_t)mp_pa; |
463 | ||
f05ed4d5 PM |
464 | if (unlikely(mp_pa) && |
465 | unlikely((mp_pa & KVM_PAM) >> PAGE_SHIFT == gfn)) { | |
466 | return 1; | |
467 | } | |
468 | ||
469 | return kvm_is_visible_gfn(vcpu->kvm, gfn); | |
470 | } | |
471 | ||
472 | int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu, | |
473 | ulong eaddr, int vec) | |
474 | { | |
475 | bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE); | |
93b159b4 | 476 | bool iswrite = false; |
f05ed4d5 PM |
477 | int r = RESUME_GUEST; |
478 | int relocated; | |
479 | int page_found = 0; | |
480 | struct kvmppc_pte pte; | |
481 | bool is_mmio = false; | |
5deb8e7a AG |
482 | bool dr = (kvmppc_get_msr(vcpu) & MSR_DR) ? true : false; |
483 | bool ir = (kvmppc_get_msr(vcpu) & MSR_IR) ? true : false; | |
f05ed4d5 PM |
484 | u64 vsid; |
485 | ||
486 | relocated = data ? dr : ir; | |
93b159b4 PM |
487 | if (data && (vcpu->arch.fault_dsisr & DSISR_ISSTORE)) |
488 | iswrite = true; | |
f05ed4d5 PM |
489 | |
490 | /* Resolve real address if translation turned on */ | |
491 | if (relocated) { | |
93b159b4 | 492 | page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data, iswrite); |
f05ed4d5 PM |
493 | } else { |
494 | pte.may_execute = true; | |
495 | pte.may_read = true; | |
496 | pte.may_write = true; | |
497 | pte.raddr = eaddr & KVM_PAM; | |
498 | pte.eaddr = eaddr; | |
499 | pte.vpage = eaddr >> 12; | |
c9029c34 | 500 | pte.page_size = MMU_PAGE_64K; |
f05ed4d5 PM |
501 | } |
502 | ||
5deb8e7a | 503 | switch (kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) { |
f05ed4d5 PM |
504 | case 0: |
505 | pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12)); | |
506 | break; | |
507 | case MSR_DR: | |
508 | case MSR_IR: | |
509 | vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid); | |
510 | ||
5deb8e7a | 511 | if ((kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) == MSR_DR) |
f05ed4d5 PM |
512 | pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12)); |
513 | else | |
514 | pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12)); | |
515 | pte.vpage |= vsid; | |
516 | ||
517 | if (vsid == -1) | |
518 | page_found = -EINVAL; | |
519 | break; | |
520 | } | |
521 | ||
522 | if (vcpu->arch.mmu.is_dcbz32(vcpu) && | |
523 | (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { | |
524 | /* | |
525 | * If we do the dcbz hack, we have to NX on every execution, | |
526 | * so we can patch the executing code. This renders our guest | |
527 | * NX-less. | |
528 | */ | |
529 | pte.may_execute = !data; | |
530 | } | |
531 | ||
532 | if (page_found == -ENOENT) { | |
533 | /* Page not found in guest PTE entries */ | |
5deb8e7a AG |
534 | u64 ssrr1 = vcpu->arch.shadow_srr1; |
535 | u64 msr = kvmppc_get_msr(vcpu); | |
536 | kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu)); | |
537 | kvmppc_set_dsisr(vcpu, vcpu->arch.fault_dsisr); | |
538 | kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL)); | |
f05ed4d5 PM |
539 | kvmppc_book3s_queue_irqprio(vcpu, vec); |
540 | } else if (page_found == -EPERM) { | |
541 | /* Storage protection */ | |
5deb8e7a AG |
542 | u32 dsisr = vcpu->arch.fault_dsisr; |
543 | u64 ssrr1 = vcpu->arch.shadow_srr1; | |
544 | u64 msr = kvmppc_get_msr(vcpu); | |
545 | kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu)); | |
546 | dsisr = (dsisr & ~DSISR_NOHPTE) | DSISR_PROTFAULT; | |
547 | kvmppc_set_dsisr(vcpu, dsisr); | |
548 | kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL)); | |
f05ed4d5 PM |
549 | kvmppc_book3s_queue_irqprio(vcpu, vec); |
550 | } else if (page_found == -EINVAL) { | |
551 | /* Page not found in guest SLB */ | |
5deb8e7a | 552 | kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu)); |
f05ed4d5 PM |
553 | kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80); |
554 | } else if (!is_mmio && | |
555 | kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) { | |
93b159b4 PM |
556 | if (data && !(vcpu->arch.fault_dsisr & DSISR_NOHPTE)) { |
557 | /* | |
558 | * There is already a host HPTE there, presumably | |
559 | * a read-only one for a page the guest thinks | |
560 | * is writable, so get rid of it first. | |
561 | */ | |
562 | kvmppc_mmu_unmap_page(vcpu, &pte); | |
563 | } | |
f05ed4d5 | 564 | /* The guest's PTE is not mapped yet. Map on the host */ |
93b159b4 | 565 | kvmppc_mmu_map_page(vcpu, &pte, iswrite); |
f05ed4d5 PM |
566 | if (data) |
567 | vcpu->stat.sp_storage++; | |
568 | else if (vcpu->arch.mmu.is_dcbz32(vcpu) && | |
93b159b4 | 569 | (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) |
f05ed4d5 PM |
570 | kvmppc_patch_dcbz(vcpu, &pte); |
571 | } else { | |
572 | /* MMIO */ | |
573 | vcpu->stat.mmio_exits++; | |
574 | vcpu->arch.paddr_accessed = pte.raddr; | |
6020c0f6 | 575 | vcpu->arch.vaddr_accessed = pte.eaddr; |
f05ed4d5 PM |
576 | r = kvmppc_emulate_mmio(run, vcpu); |
577 | if ( r == RESUME_HOST_NV ) | |
578 | r = RESUME_HOST; | |
579 | } | |
580 | ||
581 | return r; | |
582 | } | |
583 | ||
584 | static inline int get_fpr_index(int i) | |
585 | { | |
28c483b6 | 586 | return i * TS_FPRWIDTH; |
f05ed4d5 PM |
587 | } |
588 | ||
589 | /* Give up external provider (FPU, Altivec, VSX) */ | |
590 | void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr) | |
591 | { | |
592 | struct thread_struct *t = ¤t->thread; | |
f05ed4d5 | 593 | |
28c483b6 PM |
594 | /* |
595 | * VSX instructions can access FP and vector registers, so if | |
596 | * we are giving up VSX, make sure we give up FP and VMX as well. | |
597 | */ | |
598 | if (msr & MSR_VSX) | |
599 | msr |= MSR_FP | MSR_VEC; | |
600 | ||
601 | msr &= vcpu->arch.guest_owned_ext; | |
602 | if (!msr) | |
f05ed4d5 PM |
603 | return; |
604 | ||
605 | #ifdef DEBUG_EXT | |
606 | printk(KERN_INFO "Giving up ext 0x%lx\n", msr); | |
607 | #endif | |
608 | ||
28c483b6 PM |
609 | if (msr & MSR_FP) { |
610 | /* | |
611 | * Note that on CPUs with VSX, giveup_fpu stores | |
612 | * both the traditional FP registers and the added VSX | |
de79f7b9 | 613 | * registers into thread.fp_state.fpr[]. |
28c483b6 | 614 | */ |
99dae3ba | 615 | if (t->regs->msr & MSR_FP) |
9d1ffdd8 | 616 | giveup_fpu(current); |
99dae3ba | 617 | t->fp_save_area = NULL; |
28c483b6 PM |
618 | } |
619 | ||
f05ed4d5 | 620 | #ifdef CONFIG_ALTIVEC |
28c483b6 | 621 | if (msr & MSR_VEC) { |
9d1ffdd8 PM |
622 | if (current->thread.regs->msr & MSR_VEC) |
623 | giveup_altivec(current); | |
99dae3ba | 624 | t->vr_save_area = NULL; |
f05ed4d5 | 625 | } |
28c483b6 | 626 | #endif |
f05ed4d5 | 627 | |
28c483b6 | 628 | vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX); |
f05ed4d5 PM |
629 | kvmppc_recalc_shadow_msr(vcpu); |
630 | } | |
631 | ||
616dff86 AG |
632 | /* Give up facility (TAR / EBB / DSCR) */ |
633 | static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac) | |
634 | { | |
635 | #ifdef CONFIG_PPC_BOOK3S_64 | |
636 | if (!(vcpu->arch.shadow_fscr & (1ULL << fac))) { | |
637 | /* Facility not available to the guest, ignore giveup request*/ | |
638 | return; | |
639 | } | |
e14e7a1e AG |
640 | |
641 | switch (fac) { | |
642 | case FSCR_TAR_LG: | |
643 | vcpu->arch.tar = mfspr(SPRN_TAR); | |
644 | mtspr(SPRN_TAR, current->thread.tar); | |
645 | vcpu->arch.shadow_fscr &= ~FSCR_TAR; | |
646 | break; | |
647 | } | |
616dff86 AG |
648 | #endif |
649 | } | |
650 | ||
f05ed4d5 PM |
651 | static int kvmppc_read_inst(struct kvm_vcpu *vcpu) |
652 | { | |
653 | ulong srr0 = kvmppc_get_pc(vcpu); | |
654 | u32 last_inst = kvmppc_get_last_inst(vcpu); | |
655 | int ret; | |
656 | ||
657 | ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false); | |
658 | if (ret == -ENOENT) { | |
5deb8e7a | 659 | ulong msr = kvmppc_get_msr(vcpu); |
f05ed4d5 PM |
660 | |
661 | msr = kvmppc_set_field(msr, 33, 33, 1); | |
662 | msr = kvmppc_set_field(msr, 34, 36, 0); | |
5deb8e7a AG |
663 | msr = kvmppc_set_field(msr, 42, 47, 0); |
664 | kvmppc_set_msr_fast(vcpu, msr); | |
f05ed4d5 PM |
665 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE); |
666 | return EMULATE_AGAIN; | |
667 | } | |
668 | ||
669 | return EMULATE_DONE; | |
670 | } | |
671 | ||
672 | static int kvmppc_check_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr) | |
673 | { | |
674 | ||
675 | /* Need to do paired single emulation? */ | |
676 | if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)) | |
677 | return EMULATE_DONE; | |
678 | ||
679 | /* Read out the instruction */ | |
680 | if (kvmppc_read_inst(vcpu) == EMULATE_DONE) | |
681 | /* Need to emulate */ | |
682 | return EMULATE_FAIL; | |
683 | ||
684 | return EMULATE_AGAIN; | |
685 | } | |
686 | ||
687 | /* Handle external providers (FPU, Altivec, VSX) */ | |
688 | static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, | |
689 | ulong msr) | |
690 | { | |
691 | struct thread_struct *t = ¤t->thread; | |
f05ed4d5 PM |
692 | |
693 | /* When we have paired singles, we emulate in software */ | |
694 | if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) | |
695 | return RESUME_GUEST; | |
696 | ||
5deb8e7a | 697 | if (!(kvmppc_get_msr(vcpu) & msr)) { |
f05ed4d5 PM |
698 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
699 | return RESUME_GUEST; | |
700 | } | |
701 | ||
28c483b6 PM |
702 | if (msr == MSR_VSX) { |
703 | /* No VSX? Give an illegal instruction interrupt */ | |
704 | #ifdef CONFIG_VSX | |
705 | if (!cpu_has_feature(CPU_FTR_VSX)) | |
706 | #endif | |
707 | { | |
708 | kvmppc_core_queue_program(vcpu, SRR1_PROGILL); | |
709 | return RESUME_GUEST; | |
710 | } | |
711 | ||
712 | /* | |
713 | * We have to load up all the FP and VMX registers before | |
714 | * we can let the guest use VSX instructions. | |
715 | */ | |
716 | msr = MSR_FP | MSR_VEC | MSR_VSX; | |
f05ed4d5 PM |
717 | } |
718 | ||
28c483b6 PM |
719 | /* See if we already own all the ext(s) needed */ |
720 | msr &= ~vcpu->arch.guest_owned_ext; | |
721 | if (!msr) | |
722 | return RESUME_GUEST; | |
723 | ||
f05ed4d5 PM |
724 | #ifdef DEBUG_EXT |
725 | printk(KERN_INFO "Loading up ext 0x%lx\n", msr); | |
726 | #endif | |
727 | ||
28c483b6 | 728 | if (msr & MSR_FP) { |
7562c4fd | 729 | preempt_disable(); |
09548fda | 730 | enable_kernel_fp(); |
99dae3ba PM |
731 | load_fp_state(&vcpu->arch.fp); |
732 | t->fp_save_area = &vcpu->arch.fp; | |
7562c4fd | 733 | preempt_enable(); |
28c483b6 PM |
734 | } |
735 | ||
736 | if (msr & MSR_VEC) { | |
f05ed4d5 | 737 | #ifdef CONFIG_ALTIVEC |
7562c4fd | 738 | preempt_disable(); |
09548fda | 739 | enable_kernel_altivec(); |
99dae3ba PM |
740 | load_vr_state(&vcpu->arch.vr); |
741 | t->vr_save_area = &vcpu->arch.vr; | |
7562c4fd | 742 | preempt_enable(); |
f05ed4d5 | 743 | #endif |
f05ed4d5 PM |
744 | } |
745 | ||
99dae3ba | 746 | t->regs->msr |= msr; |
f05ed4d5 | 747 | vcpu->arch.guest_owned_ext |= msr; |
f05ed4d5 PM |
748 | kvmppc_recalc_shadow_msr(vcpu); |
749 | ||
750 | return RESUME_GUEST; | |
751 | } | |
752 | ||
9d1ffdd8 PM |
753 | /* |
754 | * Kernel code using FP or VMX could have flushed guest state to | |
755 | * the thread_struct; if so, get it back now. | |
756 | */ | |
757 | static void kvmppc_handle_lost_ext(struct kvm_vcpu *vcpu) | |
758 | { | |
759 | unsigned long lost_ext; | |
760 | ||
761 | lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr; | |
762 | if (!lost_ext) | |
763 | return; | |
764 | ||
09548fda | 765 | if (lost_ext & MSR_FP) { |
7562c4fd | 766 | preempt_disable(); |
09548fda | 767 | enable_kernel_fp(); |
99dae3ba | 768 | load_fp_state(&vcpu->arch.fp); |
7562c4fd | 769 | preempt_enable(); |
09548fda | 770 | } |
f2481771 | 771 | #ifdef CONFIG_ALTIVEC |
09548fda | 772 | if (lost_ext & MSR_VEC) { |
7562c4fd | 773 | preempt_disable(); |
09548fda | 774 | enable_kernel_altivec(); |
99dae3ba | 775 | load_vr_state(&vcpu->arch.vr); |
7562c4fd | 776 | preempt_enable(); |
09548fda | 777 | } |
f2481771 | 778 | #endif |
9d1ffdd8 PM |
779 | current->thread.regs->msr |= lost_ext; |
780 | } | |
781 | ||
616dff86 AG |
782 | #ifdef CONFIG_PPC_BOOK3S_64 |
783 | ||
784 | static void kvmppc_trigger_fac_interrupt(struct kvm_vcpu *vcpu, ulong fac) | |
785 | { | |
786 | /* Inject the Interrupt Cause field and trigger a guest interrupt */ | |
787 | vcpu->arch.fscr &= ~(0xffULL << 56); | |
788 | vcpu->arch.fscr |= (fac << 56); | |
789 | kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FAC_UNAVAIL); | |
790 | } | |
791 | ||
792 | static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac) | |
793 | { | |
794 | enum emulation_result er = EMULATE_FAIL; | |
795 | ||
796 | if (!(kvmppc_get_msr(vcpu) & MSR_PR)) | |
797 | er = kvmppc_emulate_instruction(vcpu->run, vcpu); | |
798 | ||
799 | if ((er != EMULATE_DONE) && (er != EMULATE_AGAIN)) { | |
800 | /* Couldn't emulate, trigger interrupt in guest */ | |
801 | kvmppc_trigger_fac_interrupt(vcpu, fac); | |
802 | } | |
803 | } | |
804 | ||
805 | /* Enable facilities (TAR, EBB, DSCR) for the guest */ | |
806 | static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac) | |
807 | { | |
9916d57e | 808 | bool guest_fac_enabled; |
616dff86 AG |
809 | BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S)); |
810 | ||
9916d57e AG |
811 | /* |
812 | * Not every facility is enabled by FSCR bits, check whether the | |
813 | * guest has this facility enabled at all. | |
814 | */ | |
815 | switch (fac) { | |
816 | case FSCR_TAR_LG: | |
817 | case FSCR_EBB_LG: | |
818 | guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac)); | |
819 | break; | |
820 | case FSCR_TM_LG: | |
821 | guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM; | |
822 | break; | |
823 | default: | |
824 | guest_fac_enabled = false; | |
825 | break; | |
826 | } | |
827 | ||
828 | if (!guest_fac_enabled) { | |
616dff86 AG |
829 | /* Facility not enabled by the guest */ |
830 | kvmppc_trigger_fac_interrupt(vcpu, fac); | |
831 | return RESUME_GUEST; | |
832 | } | |
833 | ||
834 | switch (fac) { | |
e14e7a1e AG |
835 | case FSCR_TAR_LG: |
836 | /* TAR switching isn't lazy in Linux yet */ | |
837 | current->thread.tar = mfspr(SPRN_TAR); | |
838 | mtspr(SPRN_TAR, vcpu->arch.tar); | |
839 | vcpu->arch.shadow_fscr |= FSCR_TAR; | |
840 | break; | |
616dff86 AG |
841 | default: |
842 | kvmppc_emulate_fac(vcpu, fac); | |
843 | break; | |
844 | } | |
845 | ||
846 | return RESUME_GUEST; | |
847 | } | |
848 | #endif | |
849 | ||
3a167bea AK |
850 | int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu, |
851 | unsigned int exit_nr) | |
f05ed4d5 PM |
852 | { |
853 | int r = RESUME_HOST; | |
7ee78855 | 854 | int s; |
f05ed4d5 PM |
855 | |
856 | vcpu->stat.sum_exits++; | |
857 | ||
858 | run->exit_reason = KVM_EXIT_UNKNOWN; | |
859 | run->ready_for_interrupt_injection = 1; | |
860 | ||
bd2be683 | 861 | /* We get here with MSR.EE=1 */ |
3b1d9d7d | 862 | |
97c95059 | 863 | trace_kvm_exit(exit_nr, vcpu); |
706fb730 | 864 | kvm_guest_exit(); |
c63ddcb4 | 865 | |
f05ed4d5 PM |
866 | switch (exit_nr) { |
867 | case BOOK3S_INTERRUPT_INST_STORAGE: | |
468a12c2 | 868 | { |
a2d56020 | 869 | ulong shadow_srr1 = vcpu->arch.shadow_srr1; |
f05ed4d5 PM |
870 | vcpu->stat.pf_instruc++; |
871 | ||
872 | #ifdef CONFIG_PPC_BOOK3S_32 | |
873 | /* We set segments as unused segments when invalidating them. So | |
874 | * treat the respective fault as segment fault. */ | |
a2d56020 PM |
875 | { |
876 | struct kvmppc_book3s_shadow_vcpu *svcpu; | |
877 | u32 sr; | |
878 | ||
879 | svcpu = svcpu_get(vcpu); | |
880 | sr = svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT]; | |
468a12c2 | 881 | svcpu_put(svcpu); |
a2d56020 PM |
882 | if (sr == SR_INVALID) { |
883 | kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); | |
884 | r = RESUME_GUEST; | |
885 | break; | |
886 | } | |
f05ed4d5 PM |
887 | } |
888 | #endif | |
889 | ||
890 | /* only care about PTEG not found errors, but leave NX alone */ | |
468a12c2 | 891 | if (shadow_srr1 & 0x40000000) { |
93b159b4 | 892 | int idx = srcu_read_lock(&vcpu->kvm->srcu); |
f05ed4d5 | 893 | r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr); |
93b159b4 | 894 | srcu_read_unlock(&vcpu->kvm->srcu, idx); |
f05ed4d5 PM |
895 | vcpu->stat.sp_instruc++; |
896 | } else if (vcpu->arch.mmu.is_dcbz32(vcpu) && | |
897 | (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { | |
898 | /* | |
899 | * XXX If we do the dcbz hack we use the NX bit to flush&patch the page, | |
900 | * so we can't use the NX bit inside the guest. Let's cross our fingers, | |
901 | * that no guest that needs the dcbz hack does NX. | |
902 | */ | |
903 | kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL); | |
904 | r = RESUME_GUEST; | |
905 | } else { | |
5deb8e7a AG |
906 | u64 msr = kvmppc_get_msr(vcpu); |
907 | msr |= shadow_srr1 & 0x58000000; | |
908 | kvmppc_set_msr_fast(vcpu, msr); | |
f05ed4d5 PM |
909 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
910 | r = RESUME_GUEST; | |
911 | } | |
912 | break; | |
468a12c2 | 913 | } |
f05ed4d5 PM |
914 | case BOOK3S_INTERRUPT_DATA_STORAGE: |
915 | { | |
916 | ulong dar = kvmppc_get_fault_dar(vcpu); | |
a2d56020 | 917 | u32 fault_dsisr = vcpu->arch.fault_dsisr; |
f05ed4d5 PM |
918 | vcpu->stat.pf_storage++; |
919 | ||
920 | #ifdef CONFIG_PPC_BOOK3S_32 | |
921 | /* We set segments as unused segments when invalidating them. So | |
922 | * treat the respective fault as segment fault. */ | |
a2d56020 PM |
923 | { |
924 | struct kvmppc_book3s_shadow_vcpu *svcpu; | |
925 | u32 sr; | |
926 | ||
927 | svcpu = svcpu_get(vcpu); | |
928 | sr = svcpu->sr[dar >> SID_SHIFT]; | |
468a12c2 | 929 | svcpu_put(svcpu); |
a2d56020 PM |
930 | if (sr == SR_INVALID) { |
931 | kvmppc_mmu_map_segment(vcpu, dar); | |
932 | r = RESUME_GUEST; | |
933 | break; | |
934 | } | |
f05ed4d5 PM |
935 | } |
936 | #endif | |
937 | ||
93b159b4 PM |
938 | /* |
939 | * We need to handle missing shadow PTEs, and | |
940 | * protection faults due to us mapping a page read-only | |
941 | * when the guest thinks it is writable. | |
942 | */ | |
943 | if (fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT)) { | |
944 | int idx = srcu_read_lock(&vcpu->kvm->srcu); | |
f05ed4d5 | 945 | r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr); |
93b159b4 | 946 | srcu_read_unlock(&vcpu->kvm->srcu, idx); |
f05ed4d5 | 947 | } else { |
5deb8e7a AG |
948 | kvmppc_set_dar(vcpu, dar); |
949 | kvmppc_set_dsisr(vcpu, fault_dsisr); | |
f05ed4d5 PM |
950 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
951 | r = RESUME_GUEST; | |
952 | } | |
953 | break; | |
954 | } | |
955 | case BOOK3S_INTERRUPT_DATA_SEGMENT: | |
956 | if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) { | |
5deb8e7a | 957 | kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu)); |
f05ed4d5 PM |
958 | kvmppc_book3s_queue_irqprio(vcpu, |
959 | BOOK3S_INTERRUPT_DATA_SEGMENT); | |
960 | } | |
961 | r = RESUME_GUEST; | |
962 | break; | |
963 | case BOOK3S_INTERRUPT_INST_SEGMENT: | |
964 | if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) { | |
965 | kvmppc_book3s_queue_irqprio(vcpu, | |
966 | BOOK3S_INTERRUPT_INST_SEGMENT); | |
967 | } | |
968 | r = RESUME_GUEST; | |
969 | break; | |
970 | /* We're good on these - the host merely wanted to get our attention */ | |
971 | case BOOK3S_INTERRUPT_DECREMENTER: | |
4f225ae0 | 972 | case BOOK3S_INTERRUPT_HV_DECREMENTER: |
40688909 | 973 | case BOOK3S_INTERRUPT_DOORBELL: |
f05ed4d5 PM |
974 | vcpu->stat.dec_exits++; |
975 | r = RESUME_GUEST; | |
976 | break; | |
977 | case BOOK3S_INTERRUPT_EXTERNAL: | |
4f225ae0 AG |
978 | case BOOK3S_INTERRUPT_EXTERNAL_LEVEL: |
979 | case BOOK3S_INTERRUPT_EXTERNAL_HV: | |
f05ed4d5 PM |
980 | vcpu->stat.ext_intr_exits++; |
981 | r = RESUME_GUEST; | |
982 | break; | |
983 | case BOOK3S_INTERRUPT_PERFMON: | |
984 | r = RESUME_GUEST; | |
985 | break; | |
986 | case BOOK3S_INTERRUPT_PROGRAM: | |
4f225ae0 | 987 | case BOOK3S_INTERRUPT_H_EMUL_ASSIST: |
f05ed4d5 PM |
988 | { |
989 | enum emulation_result er; | |
990 | ulong flags; | |
991 | ||
992 | program_interrupt: | |
a2d56020 | 993 | flags = vcpu->arch.shadow_srr1 & 0x1f0000ull; |
f05ed4d5 | 994 | |
5deb8e7a | 995 | if (kvmppc_get_msr(vcpu) & MSR_PR) { |
f05ed4d5 PM |
996 | #ifdef EXIT_DEBUG |
997 | printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu)); | |
998 | #endif | |
999 | if ((kvmppc_get_last_inst(vcpu) & 0xff0007ff) != | |
1000 | (INS_DCBZ & 0xfffffff7)) { | |
1001 | kvmppc_core_queue_program(vcpu, flags); | |
1002 | r = RESUME_GUEST; | |
1003 | break; | |
1004 | } | |
1005 | } | |
1006 | ||
1007 | vcpu->stat.emulated_inst_exits++; | |
1008 | er = kvmppc_emulate_instruction(run, vcpu); | |
1009 | switch (er) { | |
1010 | case EMULATE_DONE: | |
1011 | r = RESUME_GUEST_NV; | |
1012 | break; | |
1013 | case EMULATE_AGAIN: | |
1014 | r = RESUME_GUEST; | |
1015 | break; | |
1016 | case EMULATE_FAIL: | |
1017 | printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", | |
1018 | __func__, kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu)); | |
1019 | kvmppc_core_queue_program(vcpu, flags); | |
1020 | r = RESUME_GUEST; | |
1021 | break; | |
1022 | case EMULATE_DO_MMIO: | |
1023 | run->exit_reason = KVM_EXIT_MMIO; | |
1024 | r = RESUME_HOST_NV; | |
1025 | break; | |
c402a3f4 | 1026 | case EMULATE_EXIT_USER: |
50c7bb80 AG |
1027 | r = RESUME_HOST_NV; |
1028 | break; | |
f05ed4d5 PM |
1029 | default: |
1030 | BUG(); | |
1031 | } | |
1032 | break; | |
1033 | } | |
1034 | case BOOK3S_INTERRUPT_SYSCALL: | |
a668f2bd | 1035 | if (vcpu->arch.papr_enabled && |
8b23de29 | 1036 | (kvmppc_get_last_sc(vcpu) == 0x44000022) && |
5deb8e7a | 1037 | !(kvmppc_get_msr(vcpu) & MSR_PR)) { |
a668f2bd AG |
1038 | /* SC 1 papr hypercalls */ |
1039 | ulong cmd = kvmppc_get_gpr(vcpu, 3); | |
1040 | int i; | |
1041 | ||
2ba9f0d8 | 1042 | #ifdef CONFIG_PPC_BOOK3S_64 |
a668f2bd AG |
1043 | if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) { |
1044 | r = RESUME_GUEST; | |
1045 | break; | |
1046 | } | |
96f38d72 | 1047 | #endif |
a668f2bd AG |
1048 | |
1049 | run->papr_hcall.nr = cmd; | |
1050 | for (i = 0; i < 9; ++i) { | |
1051 | ulong gpr = kvmppc_get_gpr(vcpu, 4 + i); | |
1052 | run->papr_hcall.args[i] = gpr; | |
1053 | } | |
1054 | run->exit_reason = KVM_EXIT_PAPR_HCALL; | |
1055 | vcpu->arch.hcall_needed = 1; | |
1056 | r = RESUME_HOST; | |
1057 | } else if (vcpu->arch.osi_enabled && | |
f05ed4d5 PM |
1058 | (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) && |
1059 | (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) { | |
1060 | /* MOL hypercalls */ | |
1061 | u64 *gprs = run->osi.gprs; | |
1062 | int i; | |
1063 | ||
1064 | run->exit_reason = KVM_EXIT_OSI; | |
1065 | for (i = 0; i < 32; i++) | |
1066 | gprs[i] = kvmppc_get_gpr(vcpu, i); | |
1067 | vcpu->arch.osi_needed = 1; | |
1068 | r = RESUME_HOST_NV; | |
5deb8e7a | 1069 | } else if (!(kvmppc_get_msr(vcpu) & MSR_PR) && |
f05ed4d5 PM |
1070 | (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { |
1071 | /* KVM PV hypercalls */ | |
1072 | kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); | |
1073 | r = RESUME_GUEST; | |
1074 | } else { | |
1075 | /* Guest syscalls */ | |
1076 | vcpu->stat.syscall_exits++; | |
1077 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | |
1078 | r = RESUME_GUEST; | |
1079 | } | |
1080 | break; | |
1081 | case BOOK3S_INTERRUPT_FP_UNAVAIL: | |
1082 | case BOOK3S_INTERRUPT_ALTIVEC: | |
1083 | case BOOK3S_INTERRUPT_VSX: | |
1084 | { | |
1085 | int ext_msr = 0; | |
1086 | ||
1087 | switch (exit_nr) { | |
1088 | case BOOK3S_INTERRUPT_FP_UNAVAIL: ext_msr = MSR_FP; break; | |
1089 | case BOOK3S_INTERRUPT_ALTIVEC: ext_msr = MSR_VEC; break; | |
1090 | case BOOK3S_INTERRUPT_VSX: ext_msr = MSR_VSX; break; | |
1091 | } | |
1092 | ||
1093 | switch (kvmppc_check_ext(vcpu, exit_nr)) { | |
1094 | case EMULATE_DONE: | |
1095 | /* everything ok - let's enable the ext */ | |
1096 | r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr); | |
1097 | break; | |
1098 | case EMULATE_FAIL: | |
1099 | /* we need to emulate this instruction */ | |
1100 | goto program_interrupt; | |
1101 | break; | |
1102 | default: | |
1103 | /* nothing to worry about - go again */ | |
1104 | break; | |
1105 | } | |
1106 | break; | |
1107 | } | |
1108 | case BOOK3S_INTERRUPT_ALIGNMENT: | |
1109 | if (kvmppc_read_inst(vcpu) == EMULATE_DONE) { | |
5deb8e7a AG |
1110 | u32 last_inst = kvmppc_get_last_inst(vcpu); |
1111 | u32 dsisr; | |
1112 | u64 dar; | |
1113 | ||
1114 | dsisr = kvmppc_alignment_dsisr(vcpu, last_inst); | |
1115 | dar = kvmppc_alignment_dar(vcpu, last_inst); | |
1116 | ||
1117 | kvmppc_set_dsisr(vcpu, dsisr); | |
1118 | kvmppc_set_dar(vcpu, dar); | |
1119 | ||
f05ed4d5 PM |
1120 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); |
1121 | } | |
1122 | r = RESUME_GUEST; | |
1123 | break; | |
616dff86 AG |
1124 | #ifdef CONFIG_PPC_BOOK3S_64 |
1125 | case BOOK3S_INTERRUPT_FAC_UNAVAIL: | |
1126 | kvmppc_handle_fac(vcpu, vcpu->arch.shadow_fscr >> 56); | |
1127 | r = RESUME_GUEST; | |
1128 | break; | |
1129 | #endif | |
f05ed4d5 PM |
1130 | case BOOK3S_INTERRUPT_MACHINE_CHECK: |
1131 | case BOOK3S_INTERRUPT_TRACE: | |
1132 | kvmppc_book3s_queue_irqprio(vcpu, exit_nr); | |
1133 | r = RESUME_GUEST; | |
1134 | break; | |
1135 | default: | |
468a12c2 | 1136 | { |
a2d56020 | 1137 | ulong shadow_srr1 = vcpu->arch.shadow_srr1; |
f05ed4d5 PM |
1138 | /* Ugh - bork here! What did we get? */ |
1139 | printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n", | |
468a12c2 | 1140 | exit_nr, kvmppc_get_pc(vcpu), shadow_srr1); |
f05ed4d5 PM |
1141 | r = RESUME_HOST; |
1142 | BUG(); | |
1143 | break; | |
1144 | } | |
468a12c2 | 1145 | } |
f05ed4d5 PM |
1146 | |
1147 | if (!(r & RESUME_HOST)) { | |
1148 | /* To avoid clobbering exit_reason, only check for signals if | |
1149 | * we aren't already exiting to userspace for some other | |
1150 | * reason. */ | |
e371f713 AG |
1151 | |
1152 | /* | |
1153 | * Interrupts could be timers for the guest which we have to | |
1154 | * inject again, so let's postpone them until we're in the guest | |
1155 | * and if we really did time things so badly, then we just exit | |
1156 | * again due to a host external interrupt. | |
1157 | */ | |
7ee78855 | 1158 | s = kvmppc_prepare_to_enter(vcpu); |
6c85f52b | 1159 | if (s <= 0) |
7ee78855 | 1160 | r = s; |
6c85f52b SW |
1161 | else { |
1162 | /* interrupts now hard-disabled */ | |
5f1c248f | 1163 | kvmppc_fix_ee_before_entry(); |
f05ed4d5 | 1164 | } |
6c85f52b | 1165 | |
9d1ffdd8 | 1166 | kvmppc_handle_lost_ext(vcpu); |
f05ed4d5 PM |
1167 | } |
1168 | ||
1169 | trace_kvm_book3s_reenter(r, vcpu); | |
1170 | ||
1171 | return r; | |
1172 | } | |
1173 | ||
3a167bea AK |
1174 | static int kvm_arch_vcpu_ioctl_get_sregs_pr(struct kvm_vcpu *vcpu, |
1175 | struct kvm_sregs *sregs) | |
f05ed4d5 PM |
1176 | { |
1177 | struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); | |
1178 | int i; | |
1179 | ||
1180 | sregs->pvr = vcpu->arch.pvr; | |
1181 | ||
1182 | sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1; | |
1183 | if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) { | |
1184 | for (i = 0; i < 64; i++) { | |
1185 | sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i; | |
1186 | sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; | |
1187 | } | |
1188 | } else { | |
1189 | for (i = 0; i < 16; i++) | |
5deb8e7a | 1190 | sregs->u.s.ppc32.sr[i] = kvmppc_get_sr(vcpu, i); |
f05ed4d5 PM |
1191 | |
1192 | for (i = 0; i < 8; i++) { | |
1193 | sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw; | |
1194 | sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw; | |
1195 | } | |
1196 | } | |
1197 | ||
1198 | return 0; | |
1199 | } | |
1200 | ||
3a167bea AK |
1201 | static int kvm_arch_vcpu_ioctl_set_sregs_pr(struct kvm_vcpu *vcpu, |
1202 | struct kvm_sregs *sregs) | |
f05ed4d5 PM |
1203 | { |
1204 | struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); | |
1205 | int i; | |
1206 | ||
3a167bea | 1207 | kvmppc_set_pvr_pr(vcpu, sregs->pvr); |
f05ed4d5 PM |
1208 | |
1209 | vcpu3s->sdr1 = sregs->u.s.sdr1; | |
1210 | if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) { | |
1211 | for (i = 0; i < 64; i++) { | |
1212 | vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv, | |
1213 | sregs->u.s.ppc64.slb[i].slbe); | |
1214 | } | |
1215 | } else { | |
1216 | for (i = 0; i < 16; i++) { | |
1217 | vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]); | |
1218 | } | |
1219 | for (i = 0; i < 8; i++) { | |
1220 | kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false, | |
1221 | (u32)sregs->u.s.ppc32.ibat[i]); | |
1222 | kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true, | |
1223 | (u32)(sregs->u.s.ppc32.ibat[i] >> 32)); | |
1224 | kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false, | |
1225 | (u32)sregs->u.s.ppc32.dbat[i]); | |
1226 | kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true, | |
1227 | (u32)(sregs->u.s.ppc32.dbat[i] >> 32)); | |
1228 | } | |
1229 | } | |
1230 | ||
1231 | /* Flush the MMU after messing with the segments */ | |
1232 | kvmppc_mmu_pte_flush(vcpu, 0, 0); | |
1233 | ||
1234 | return 0; | |
1235 | } | |
1236 | ||
3a167bea AK |
1237 | static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id, |
1238 | union kvmppc_one_reg *val) | |
31f3438e | 1239 | { |
a136a8bd | 1240 | int r = 0; |
31f3438e | 1241 | |
a136a8bd | 1242 | switch (id) { |
31f3438e | 1243 | case KVM_REG_PPC_HIOR: |
a136a8bd | 1244 | *val = get_reg_val(id, to_book3s(vcpu)->hior); |
31f3438e | 1245 | break; |
e5ee5422 AK |
1246 | case KVM_REG_PPC_LPCR: |
1247 | /* | |
1248 | * We are only interested in the LPCR_ILE bit | |
1249 | */ | |
1250 | if (vcpu->arch.intr_msr & MSR_LE) | |
1251 | *val = get_reg_val(id, LPCR_ILE); | |
1252 | else | |
1253 | *val = get_reg_val(id, 0); | |
1254 | break; | |
31f3438e | 1255 | default: |
a136a8bd | 1256 | r = -EINVAL; |
31f3438e PM |
1257 | break; |
1258 | } | |
1259 | ||
1260 | return r; | |
1261 | } | |
1262 | ||
e5ee5422 AK |
1263 | static void kvmppc_set_lpcr_pr(struct kvm_vcpu *vcpu, u64 new_lpcr) |
1264 | { | |
1265 | if (new_lpcr & LPCR_ILE) | |
1266 | vcpu->arch.intr_msr |= MSR_LE; | |
1267 | else | |
1268 | vcpu->arch.intr_msr &= ~MSR_LE; | |
1269 | } | |
1270 | ||
3a167bea AK |
1271 | static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id, |
1272 | union kvmppc_one_reg *val) | |
31f3438e | 1273 | { |
a136a8bd | 1274 | int r = 0; |
31f3438e | 1275 | |
a136a8bd | 1276 | switch (id) { |
31f3438e | 1277 | case KVM_REG_PPC_HIOR: |
a136a8bd PM |
1278 | to_book3s(vcpu)->hior = set_reg_val(id, *val); |
1279 | to_book3s(vcpu)->hior_explicit = true; | |
31f3438e | 1280 | break; |
e5ee5422 AK |
1281 | case KVM_REG_PPC_LPCR: |
1282 | kvmppc_set_lpcr_pr(vcpu, set_reg_val(id, *val)); | |
1283 | break; | |
31f3438e | 1284 | default: |
a136a8bd | 1285 | r = -EINVAL; |
31f3438e PM |
1286 | break; |
1287 | } | |
1288 | ||
1289 | return r; | |
1290 | } | |
1291 | ||
3a167bea AK |
1292 | static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm, |
1293 | unsigned int id) | |
f05ed4d5 PM |
1294 | { |
1295 | struct kvmppc_vcpu_book3s *vcpu_book3s; | |
1296 | struct kvm_vcpu *vcpu; | |
1297 | int err = -ENOMEM; | |
1298 | unsigned long p; | |
1299 | ||
3ff95502 PM |
1300 | vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL); |
1301 | if (!vcpu) | |
f05ed4d5 PM |
1302 | goto out; |
1303 | ||
f05ed4d5 PM |
1304 | vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s)); |
1305 | if (!vcpu_book3s) | |
f05ed4d5 | 1306 | goto free_vcpu; |
3ff95502 | 1307 | vcpu->arch.book3s = vcpu_book3s; |
f05ed4d5 | 1308 | |
ab78475c | 1309 | #ifdef CONFIG_KVM_BOOK3S_32_HANDLER |
3ff95502 PM |
1310 | vcpu->arch.shadow_vcpu = |
1311 | kzalloc(sizeof(*vcpu->arch.shadow_vcpu), GFP_KERNEL); | |
1312 | if (!vcpu->arch.shadow_vcpu) | |
1313 | goto free_vcpu3s; | |
a2d56020 | 1314 | #endif |
f05ed4d5 | 1315 | |
f05ed4d5 PM |
1316 | err = kvm_vcpu_init(vcpu, kvm, id); |
1317 | if (err) | |
1318 | goto free_shadow_vcpu; | |
1319 | ||
7c7b406e | 1320 | err = -ENOMEM; |
f05ed4d5 | 1321 | p = __get_free_page(GFP_KERNEL|__GFP_ZERO); |
f05ed4d5 PM |
1322 | if (!p) |
1323 | goto uninit_vcpu; | |
7c7b406e TLSC |
1324 | /* the real shared page fills the last 4k of our page */ |
1325 | vcpu->arch.shared = (void *)(p + PAGE_SIZE - 4096); | |
f05ed4d5 | 1326 | #ifdef CONFIG_PPC_BOOK3S_64 |
5deb8e7a AG |
1327 | /* Always start the shared struct in native endian mode */ |
1328 | #ifdef __BIG_ENDIAN__ | |
1329 | vcpu->arch.shared_big_endian = true; | |
1330 | #else | |
1331 | vcpu->arch.shared_big_endian = false; | |
1332 | #endif | |
1333 | ||
a4a0f252 PM |
1334 | /* |
1335 | * Default to the same as the host if we're on sufficiently | |
1336 | * recent machine that we have 1TB segments; | |
1337 | * otherwise default to PPC970FX. | |
1338 | */ | |
f05ed4d5 | 1339 | vcpu->arch.pvr = 0x3C0301; |
a4a0f252 PM |
1340 | if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) |
1341 | vcpu->arch.pvr = mfspr(SPRN_PVR); | |
e5ee5422 | 1342 | vcpu->arch.intr_msr = MSR_SF; |
f05ed4d5 PM |
1343 | #else |
1344 | /* default to book3s_32 (750) */ | |
1345 | vcpu->arch.pvr = 0x84202; | |
1346 | #endif | |
3a167bea | 1347 | kvmppc_set_pvr_pr(vcpu, vcpu->arch.pvr); |
f05ed4d5 PM |
1348 | vcpu->arch.slb_nr = 64; |
1349 | ||
94810ba4 | 1350 | vcpu->arch.shadow_msr = MSR_USER64 & ~MSR_LE; |
f05ed4d5 PM |
1351 | |
1352 | err = kvmppc_mmu_init(vcpu); | |
1353 | if (err < 0) | |
1354 | goto uninit_vcpu; | |
1355 | ||
1356 | return vcpu; | |
1357 | ||
1358 | uninit_vcpu: | |
1359 | kvm_vcpu_uninit(vcpu); | |
1360 | free_shadow_vcpu: | |
ab78475c | 1361 | #ifdef CONFIG_KVM_BOOK3S_32_HANDLER |
3ff95502 PM |
1362 | kfree(vcpu->arch.shadow_vcpu); |
1363 | free_vcpu3s: | |
a2d56020 | 1364 | #endif |
f05ed4d5 | 1365 | vfree(vcpu_book3s); |
3ff95502 PM |
1366 | free_vcpu: |
1367 | kmem_cache_free(kvm_vcpu_cache, vcpu); | |
f05ed4d5 PM |
1368 | out: |
1369 | return ERR_PTR(err); | |
1370 | } | |
1371 | ||
3a167bea | 1372 | static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu) |
f05ed4d5 PM |
1373 | { |
1374 | struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); | |
1375 | ||
1376 | free_page((unsigned long)vcpu->arch.shared & PAGE_MASK); | |
1377 | kvm_vcpu_uninit(vcpu); | |
ab78475c | 1378 | #ifdef CONFIG_KVM_BOOK3S_32_HANDLER |
3ff95502 PM |
1379 | kfree(vcpu->arch.shadow_vcpu); |
1380 | #endif | |
f05ed4d5 | 1381 | vfree(vcpu_book3s); |
3ff95502 | 1382 | kmem_cache_free(kvm_vcpu_cache, vcpu); |
f05ed4d5 PM |
1383 | } |
1384 | ||
3a167bea | 1385 | static int kvmppc_vcpu_run_pr(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) |
f05ed4d5 PM |
1386 | { |
1387 | int ret; | |
f05ed4d5 | 1388 | #ifdef CONFIG_ALTIVEC |
f05ed4d5 | 1389 | unsigned long uninitialized_var(vrsave); |
f05ed4d5 | 1390 | #endif |
f05ed4d5 | 1391 | |
af8f38b3 AG |
1392 | /* Check if we can run the vcpu at all */ |
1393 | if (!vcpu->arch.sane) { | |
1394 | kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; | |
7d82714d AG |
1395 | ret = -EINVAL; |
1396 | goto out; | |
af8f38b3 AG |
1397 | } |
1398 | ||
e371f713 AG |
1399 | /* |
1400 | * Interrupts could be timers for the guest which we have to inject | |
1401 | * again, so let's postpone them until we're in the guest and if we | |
1402 | * really did time things so badly, then we just exit again due to | |
1403 | * a host external interrupt. | |
1404 | */ | |
7ee78855 | 1405 | ret = kvmppc_prepare_to_enter(vcpu); |
6c85f52b | 1406 | if (ret <= 0) |
7d82714d | 1407 | goto out; |
6c85f52b | 1408 | /* interrupts now hard-disabled */ |
f05ed4d5 | 1409 | |
99dae3ba | 1410 | /* Save FPU state in thread_struct */ |
f05ed4d5 PM |
1411 | if (current->thread.regs->msr & MSR_FP) |
1412 | giveup_fpu(current); | |
f05ed4d5 PM |
1413 | |
1414 | #ifdef CONFIG_ALTIVEC | |
99dae3ba PM |
1415 | /* Save Altivec state in thread_struct */ |
1416 | if (current->thread.regs->msr & MSR_VEC) | |
1417 | giveup_altivec(current); | |
f05ed4d5 PM |
1418 | #endif |
1419 | ||
1420 | #ifdef CONFIG_VSX | |
99dae3ba PM |
1421 | /* Save VSX state in thread_struct */ |
1422 | if (current->thread.regs->msr & MSR_VSX) | |
28c483b6 | 1423 | __giveup_vsx(current); |
f05ed4d5 PM |
1424 | #endif |
1425 | ||
f05ed4d5 | 1426 | /* Preload FPU if it's enabled */ |
5deb8e7a | 1427 | if (kvmppc_get_msr(vcpu) & MSR_FP) |
f05ed4d5 PM |
1428 | kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); |
1429 | ||
5f1c248f | 1430 | kvmppc_fix_ee_before_entry(); |
df6909e5 PM |
1431 | |
1432 | ret = __kvmppc_vcpu_run(kvm_run, vcpu); | |
1433 | ||
24afa37b AG |
1434 | /* No need for kvm_guest_exit. It's done in handle_exit. |
1435 | We also get here with interrupts enabled. */ | |
f05ed4d5 | 1436 | |
f05ed4d5 | 1437 | /* Make sure we save the guest FPU/Altivec/VSX state */ |
28c483b6 PM |
1438 | kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX); |
1439 | ||
e14e7a1e AG |
1440 | /* Make sure we save the guest TAR/EBB/DSCR state */ |
1441 | kvmppc_giveup_fac(vcpu, FSCR_TAR_LG); | |
1442 | ||
7d82714d | 1443 | out: |
0652eaae | 1444 | vcpu->mode = OUTSIDE_GUEST_MODE; |
f05ed4d5 PM |
1445 | return ret; |
1446 | } | |
1447 | ||
82ed3616 PM |
1448 | /* |
1449 | * Get (and clear) the dirty memory log for a memory slot. | |
1450 | */ | |
3a167bea AK |
1451 | static int kvm_vm_ioctl_get_dirty_log_pr(struct kvm *kvm, |
1452 | struct kvm_dirty_log *log) | |
82ed3616 PM |
1453 | { |
1454 | struct kvm_memory_slot *memslot; | |
1455 | struct kvm_vcpu *vcpu; | |
1456 | ulong ga, ga_end; | |
1457 | int is_dirty = 0; | |
1458 | int r; | |
1459 | unsigned long n; | |
1460 | ||
1461 | mutex_lock(&kvm->slots_lock); | |
1462 | ||
1463 | r = kvm_get_dirty_log(kvm, log, &is_dirty); | |
1464 | if (r) | |
1465 | goto out; | |
1466 | ||
1467 | /* If nothing is dirty, don't bother messing with page tables. */ | |
1468 | if (is_dirty) { | |
1469 | memslot = id_to_memslot(kvm->memslots, log->slot); | |
1470 | ||
1471 | ga = memslot->base_gfn << PAGE_SHIFT; | |
1472 | ga_end = ga + (memslot->npages << PAGE_SHIFT); | |
1473 | ||
1474 | kvm_for_each_vcpu(n, vcpu, kvm) | |
1475 | kvmppc_mmu_pte_pflush(vcpu, ga, ga_end); | |
1476 | ||
1477 | n = kvm_dirty_bitmap_bytes(memslot); | |
1478 | memset(memslot->dirty_bitmap, 0, n); | |
1479 | } | |
1480 | ||
1481 | r = 0; | |
1482 | out: | |
1483 | mutex_unlock(&kvm->slots_lock); | |
1484 | return r; | |
1485 | } | |
1486 | ||
3a167bea AK |
1487 | static void kvmppc_core_flush_memslot_pr(struct kvm *kvm, |
1488 | struct kvm_memory_slot *memslot) | |
5b74716e | 1489 | { |
3a167bea AK |
1490 | return; |
1491 | } | |
5b74716e | 1492 | |
3a167bea AK |
1493 | static int kvmppc_core_prepare_memory_region_pr(struct kvm *kvm, |
1494 | struct kvm_memory_slot *memslot, | |
1495 | struct kvm_userspace_memory_region *mem) | |
1496 | { | |
5b74716e BH |
1497 | return 0; |
1498 | } | |
5b74716e | 1499 | |
3a167bea AK |
1500 | static void kvmppc_core_commit_memory_region_pr(struct kvm *kvm, |
1501 | struct kvm_userspace_memory_region *mem, | |
1502 | const struct kvm_memory_slot *old) | |
a66b48c3 | 1503 | { |
3a167bea | 1504 | return; |
a66b48c3 PM |
1505 | } |
1506 | ||
3a167bea AK |
1507 | static void kvmppc_core_free_memslot_pr(struct kvm_memory_slot *free, |
1508 | struct kvm_memory_slot *dont) | |
a66b48c3 | 1509 | { |
3a167bea | 1510 | return; |
a66b48c3 PM |
1511 | } |
1512 | ||
3a167bea AK |
1513 | static int kvmppc_core_create_memslot_pr(struct kvm_memory_slot *slot, |
1514 | unsigned long npages) | |
f9e0554d PM |
1515 | { |
1516 | return 0; | |
1517 | } | |
1518 | ||
3a167bea | 1519 | |
5b74716e | 1520 | #ifdef CONFIG_PPC64 |
3a167bea AK |
1521 | static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm, |
1522 | struct kvm_ppc_smmu_info *info) | |
dfe49dbd | 1523 | { |
a4a0f252 PM |
1524 | long int i; |
1525 | struct kvm_vcpu *vcpu; | |
1526 | ||
1527 | info->flags = 0; | |
5b74716e BH |
1528 | |
1529 | /* SLB is always 64 entries */ | |
1530 | info->slb_size = 64; | |
1531 | ||
1532 | /* Standard 4k base page size segment */ | |
1533 | info->sps[0].page_shift = 12; | |
1534 | info->sps[0].slb_enc = 0; | |
1535 | info->sps[0].enc[0].page_shift = 12; | |
1536 | info->sps[0].enc[0].pte_enc = 0; | |
1537 | ||
a4a0f252 PM |
1538 | /* |
1539 | * 64k large page size. | |
1540 | * We only want to put this in if the CPUs we're emulating | |
1541 | * support it, but unfortunately we don't have a vcpu easily | |
1542 | * to hand here to test. Just pick the first vcpu, and if | |
1543 | * that doesn't exist yet, report the minimum capability, | |
1544 | * i.e., no 64k pages. | |
1545 | * 1T segment support goes along with 64k pages. | |
1546 | */ | |
1547 | i = 1; | |
1548 | vcpu = kvm_get_vcpu(kvm, 0); | |
1549 | if (vcpu && (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) { | |
1550 | info->flags = KVM_PPC_1T_SEGMENTS; | |
1551 | info->sps[i].page_shift = 16; | |
1552 | info->sps[i].slb_enc = SLB_VSID_L | SLB_VSID_LP_01; | |
1553 | info->sps[i].enc[0].page_shift = 16; | |
1554 | info->sps[i].enc[0].pte_enc = 1; | |
1555 | ++i; | |
1556 | } | |
1557 | ||
5b74716e | 1558 | /* Standard 16M large page size segment */ |
a4a0f252 PM |
1559 | info->sps[i].page_shift = 24; |
1560 | info->sps[i].slb_enc = SLB_VSID_L; | |
1561 | info->sps[i].enc[0].page_shift = 24; | |
1562 | info->sps[i].enc[0].pte_enc = 0; | |
dfe49dbd | 1563 | |
5b74716e BH |
1564 | return 0; |
1565 | } | |
3a167bea AK |
1566 | #else |
1567 | static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm, | |
1568 | struct kvm_ppc_smmu_info *info) | |
f9e0554d | 1569 | { |
3a167bea AK |
1570 | /* We should not get called */ |
1571 | BUG(); | |
f9e0554d | 1572 | } |
3a167bea | 1573 | #endif /* CONFIG_PPC64 */ |
f9e0554d | 1574 | |
a413f474 IM |
1575 | static unsigned int kvm_global_user_count = 0; |
1576 | static DEFINE_SPINLOCK(kvm_global_user_count_lock); | |
1577 | ||
3a167bea | 1578 | static int kvmppc_core_init_vm_pr(struct kvm *kvm) |
f9e0554d | 1579 | { |
9308ab8e | 1580 | mutex_init(&kvm->arch.hpt_mutex); |
f31e65e1 | 1581 | |
a413f474 IM |
1582 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { |
1583 | spin_lock(&kvm_global_user_count_lock); | |
1584 | if (++kvm_global_user_count == 1) | |
1585 | pSeries_disable_reloc_on_exc(); | |
1586 | spin_unlock(&kvm_global_user_count_lock); | |
1587 | } | |
f9e0554d PM |
1588 | return 0; |
1589 | } | |
1590 | ||
3a167bea | 1591 | static void kvmppc_core_destroy_vm_pr(struct kvm *kvm) |
f9e0554d | 1592 | { |
f31e65e1 BH |
1593 | #ifdef CONFIG_PPC64 |
1594 | WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); | |
1595 | #endif | |
a413f474 IM |
1596 | |
1597 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { | |
1598 | spin_lock(&kvm_global_user_count_lock); | |
1599 | BUG_ON(kvm_global_user_count == 0); | |
1600 | if (--kvm_global_user_count == 0) | |
1601 | pSeries_enable_reloc_on_exc(); | |
1602 | spin_unlock(&kvm_global_user_count_lock); | |
1603 | } | |
f9e0554d PM |
1604 | } |
1605 | ||
3a167bea | 1606 | static int kvmppc_core_check_processor_compat_pr(void) |
f05ed4d5 | 1607 | { |
3a167bea AK |
1608 | /* we are always compatible */ |
1609 | return 0; | |
1610 | } | |
f05ed4d5 | 1611 | |
3a167bea AK |
1612 | static long kvm_arch_vm_ioctl_pr(struct file *filp, |
1613 | unsigned int ioctl, unsigned long arg) | |
1614 | { | |
1615 | return -ENOTTY; | |
1616 | } | |
f05ed4d5 | 1617 | |
cbbc58d4 | 1618 | static struct kvmppc_ops kvm_ops_pr = { |
3a167bea AK |
1619 | .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr, |
1620 | .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr, | |
1621 | .get_one_reg = kvmppc_get_one_reg_pr, | |
1622 | .set_one_reg = kvmppc_set_one_reg_pr, | |
1623 | .vcpu_load = kvmppc_core_vcpu_load_pr, | |
1624 | .vcpu_put = kvmppc_core_vcpu_put_pr, | |
1625 | .set_msr = kvmppc_set_msr_pr, | |
1626 | .vcpu_run = kvmppc_vcpu_run_pr, | |
1627 | .vcpu_create = kvmppc_core_vcpu_create_pr, | |
1628 | .vcpu_free = kvmppc_core_vcpu_free_pr, | |
1629 | .check_requests = kvmppc_core_check_requests_pr, | |
1630 | .get_dirty_log = kvm_vm_ioctl_get_dirty_log_pr, | |
1631 | .flush_memslot = kvmppc_core_flush_memslot_pr, | |
1632 | .prepare_memory_region = kvmppc_core_prepare_memory_region_pr, | |
1633 | .commit_memory_region = kvmppc_core_commit_memory_region_pr, | |
1634 | .unmap_hva = kvm_unmap_hva_pr, | |
1635 | .unmap_hva_range = kvm_unmap_hva_range_pr, | |
1636 | .age_hva = kvm_age_hva_pr, | |
1637 | .test_age_hva = kvm_test_age_hva_pr, | |
1638 | .set_spte_hva = kvm_set_spte_hva_pr, | |
1639 | .mmu_destroy = kvmppc_mmu_destroy_pr, | |
1640 | .free_memslot = kvmppc_core_free_memslot_pr, | |
1641 | .create_memslot = kvmppc_core_create_memslot_pr, | |
1642 | .init_vm = kvmppc_core_init_vm_pr, | |
1643 | .destroy_vm = kvmppc_core_destroy_vm_pr, | |
3a167bea AK |
1644 | .get_smmu_info = kvm_vm_ioctl_get_smmu_info_pr, |
1645 | .emulate_op = kvmppc_core_emulate_op_pr, | |
1646 | .emulate_mtspr = kvmppc_core_emulate_mtspr_pr, | |
1647 | .emulate_mfspr = kvmppc_core_emulate_mfspr_pr, | |
1648 | .fast_vcpu_kick = kvm_vcpu_kick, | |
1649 | .arch_vm_ioctl = kvm_arch_vm_ioctl_pr, | |
1650 | }; | |
1651 | ||
cbbc58d4 AK |
1652 | |
1653 | int kvmppc_book3s_init_pr(void) | |
f05ed4d5 PM |
1654 | { |
1655 | int r; | |
1656 | ||
cbbc58d4 AK |
1657 | r = kvmppc_core_check_processor_compat_pr(); |
1658 | if (r < 0) | |
f05ed4d5 PM |
1659 | return r; |
1660 | ||
cbbc58d4 AK |
1661 | kvm_ops_pr.owner = THIS_MODULE; |
1662 | kvmppc_pr_ops = &kvm_ops_pr; | |
f05ed4d5 | 1663 | |
cbbc58d4 | 1664 | r = kvmppc_mmu_hpte_sysinit(); |
f05ed4d5 PM |
1665 | return r; |
1666 | } | |
1667 | ||
cbbc58d4 | 1668 | void kvmppc_book3s_exit_pr(void) |
f05ed4d5 | 1669 | { |
cbbc58d4 | 1670 | kvmppc_pr_ops = NULL; |
f05ed4d5 | 1671 | kvmppc_mmu_hpte_sysexit(); |
f05ed4d5 PM |
1672 | } |
1673 | ||
cbbc58d4 AK |
1674 | /* |
1675 | * We only support separate modules for book3s 64 | |
1676 | */ | |
1677 | #ifdef CONFIG_PPC_BOOK3S_64 | |
1678 | ||
3a167bea AK |
1679 | module_init(kvmppc_book3s_init_pr); |
1680 | module_exit(kvmppc_book3s_exit_pr); | |
2ba9f0d8 AK |
1681 | |
1682 | MODULE_LICENSE("GPL"); | |
398a76c6 AG |
1683 | MODULE_ALIAS_MISCDEV(KVM_MINOR); |
1684 | MODULE_ALIAS("devname:kvm"); | |
cbbc58d4 | 1685 | #endif |