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1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License, version 2, as | |
4 | * published by the Free Software Foundation. | |
5 | * | |
6 | * This program is distributed in the hope that it will be useful, | |
7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
9 | * GNU General Public License for more details. | |
10 | * | |
11 | * You should have received a copy of the GNU General Public License | |
12 | * along with this program; if not, write to the Free Software | |
13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
14 | * | |
15 | * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> | |
16 | * | |
17 | * Derived from book3s_interrupts.S, which is: | |
18 | * Copyright SUSE Linux Products GmbH 2009 | |
19 | * | |
20 | * Authors: Alexander Graf <agraf@suse.de> | |
21 | */ | |
22 | ||
23 | #include <asm/ppc_asm.h> | |
24 | #include <asm/kvm_asm.h> | |
25 | #include <asm/reg.h> | |
26 | #include <asm/page.h> | |
27 | #include <asm/asm-offsets.h> | |
28 | #include <asm/exception-64s.h> | |
29 | #include <asm/ppc-opcode.h> | |
30 | ||
31 | /***************************************************************************** | |
32 | * * | |
33 | * Guest entry / exit code that is in kernel module memory (vmalloc) * | |
34 | * * | |
35 | ****************************************************************************/ | |
36 | ||
37 | /* Registers: | |
e0b7ec05 | 38 | * none |
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39 | */ |
40 | _GLOBAL(__kvmppc_vcore_entry) | |
41 | ||
42 | /* Write correct stack frame */ | |
43 | mflr r0 | |
44 | std r0,PPC_LR_STKOFF(r1) | |
45 | ||
46 | /* Save host state to the stack */ | |
47 | stdu r1, -SWITCH_FRAME_SIZE(r1) | |
48 | ||
a5ddea0e | 49 | /* Save non-volatile registers (r14 - r31) and CR */ |
de56a948 | 50 | SAVE_NVGPRS(r1) |
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51 | mfcr r3 |
52 | std r3, _CCR(r1) | |
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53 | |
54 | /* Save host DSCR */ | |
55 | mfspr r3, SPRN_DSCR | |
56 | std r3, HSTATE_DSCR(r13) | |
57 | ||
eee7ff9d | 58 | BEGIN_FTR_SECTION |
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59 | /* Save host DABR */ |
60 | mfspr r3, SPRN_DABR | |
61 | std r3, HSTATE_DABR(r13) | |
eee7ff9d | 62 | END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) |
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63 | |
64 | /* Hard-disable interrupts */ | |
65 | mfmsr r10 | |
66 | std r10, HSTATE_HOST_MSR(r13) | |
67 | rldicl r10,r10,48,1 | |
68 | rotldi r10,r10,16 | |
69 | mtmsrd r10,1 | |
70 | ||
8943633c | 71 | /* Save host PMU registers */ |
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72 | BEGIN_FTR_SECTION |
73 | /* Work around P8 PMAE bug */ | |
74 | li r3, -1 | |
75 | clrrdi r3, r3, 10 | |
76 | mfspr r8, SPRN_MMCR2 | |
77 | mtspr SPRN_MMCR2, r3 /* freeze all counters using MMCR2 */ | |
78 | isync | |
79 | END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) | |
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80 | li r3, 1 |
81 | sldi r3, r3, 31 /* MMCR0_FC (freeze counters) bit */ | |
82 | mfspr r7, SPRN_MMCR0 /* save MMCR0 */ | |
83 | mtspr SPRN_MMCR0, r3 /* freeze all counters, disable interrupts */ | |
8943633c | 84 | mfspr r6, SPRN_MMCRA |
c17b98cf | 85 | /* Clear MMCRA in order to disable SDAR updates */ |
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86 | li r5, 0 |
87 | mtspr SPRN_MMCRA, r5 | |
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88 | isync |
89 | ld r3, PACALPPACAPTR(r13) /* is the host using the PMU? */ | |
90 | lbz r5, LPPACA_PMCINUSE(r3) | |
91 | cmpwi r5, 0 | |
92 | beq 31f /* skip if not */ | |
93 | mfspr r5, SPRN_MMCR1 | |
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94 | mfspr r9, SPRN_SIAR |
95 | mfspr r10, SPRN_SDAR | |
9a4fc4ea ME |
96 | std r7, HSTATE_MMCR0(r13) |
97 | std r5, HSTATE_MMCR1(r13) | |
98 | std r6, HSTATE_MMCRA(r13) | |
99 | std r9, HSTATE_SIAR(r13) | |
100 | std r10, HSTATE_SDAR(r13) | |
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101 | BEGIN_FTR_SECTION |
102 | mfspr r9, SPRN_SIER | |
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103 | std r8, HSTATE_MMCR2(r13) |
104 | std r9, HSTATE_SIER(r13) | |
72cde5a8 | 105 | END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) |
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106 | mfspr r3, SPRN_PMC1 |
107 | mfspr r5, SPRN_PMC2 | |
108 | mfspr r6, SPRN_PMC3 | |
109 | mfspr r7, SPRN_PMC4 | |
110 | mfspr r8, SPRN_PMC5 | |
111 | mfspr r9, SPRN_PMC6 | |
9a4fc4ea ME |
112 | stw r3, HSTATE_PMC1(r13) |
113 | stw r5, HSTATE_PMC2(r13) | |
114 | stw r6, HSTATE_PMC3(r13) | |
115 | stw r7, HSTATE_PMC4(r13) | |
116 | stw r8, HSTATE_PMC5(r13) | |
117 | stw r9, HSTATE_PMC6(r13) | |
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118 | 31: |
119 | ||
120 | /* | |
121 | * Put whatever is in the decrementer into the | |
122 | * hypervisor decrementer. | |
123 | */ | |
124 | mfspr r8,SPRN_DEC | |
125 | mftb r7 | |
126 | mtspr SPRN_HDEC,r8 | |
127 | extsw r8,r8 | |
128 | add r8,r8,r7 | |
129 | std r8,HSTATE_DECEXP(r13) | |
130 | ||
131 | /* Jump to partition switch code */ | |
b1576fec | 132 | bl kvmppc_hv_entry_trampoline |
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133 | nop |
134 | ||
135 | /* | |
136 | * We return here in virtual mode after the guest exits | |
137 | * with something that we can't handle in real mode. | |
138 | * Interrupts are enabled again at this point. | |
139 | */ | |
140 | ||
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141 | /* |
142 | * Register usage at this point: | |
143 | * | |
144 | * R1 = host R1 | |
145 | * R2 = host R2 | |
146 | * R12 = exit handler id | |
147 | * R13 = PACA | |
148 | */ | |
149 | ||
a5ddea0e | 150 | /* Restore non-volatile host registers (r14 - r31) and CR */ |
de56a948 | 151 | REST_NVGPRS(r1) |
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152 | ld r4, _CCR(r1) |
153 | mtcr r4 | |
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154 | |
155 | addi r1, r1, SWITCH_FRAME_SIZE | |
156 | ld r0, PPC_LR_STKOFF(r1) | |
157 | mtlr r0 | |
158 | blr |