KVM: PPC: Book3S HV: Return error from h_set_mode(SET_DAWR) on POWER9
[linux-2.6-block.git] / arch / powerpc / kvm / book3s_hv.c
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1/*
2 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
4 *
5 * Authors:
6 * Paul Mackerras <paulus@au1.ibm.com>
7 * Alexander Graf <agraf@suse.de>
8 * Kevin Wolf <mail@kevin-wolf.de>
9 *
10 * Description: KVM functions specific to running on Book 3S
11 * processors in hypervisor mode (specifically POWER7 and later).
12 *
13 * This file is derived from arch/powerpc/kvm/book3s.c,
14 * by Alexander Graf <agraf@suse.de>.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License, version 2, as
18 * published by the Free Software Foundation.
19 */
20
21#include <linux/kvm_host.h>
4bb817ed 22#include <linux/kernel.h>
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23#include <linux/err.h>
24#include <linux/slab.h>
25#include <linux/preempt.h>
174cd4b1 26#include <linux/sched/signal.h>
03441a34 27#include <linux/sched/stat.h>
de56a948 28#include <linux/delay.h>
66b15db6 29#include <linux/export.h>
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30#include <linux/fs.h>
31#include <linux/anon_inodes.h>
07f8ab25 32#include <linux/cpu.h>
de56a948 33#include <linux/cpumask.h>
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34#include <linux/spinlock.h>
35#include <linux/page-flags.h>
2c9097e4 36#include <linux/srcu.h>
398a76c6 37#include <linux/miscdevice.h>
e23a808b 38#include <linux/debugfs.h>
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39#include <linux/gfp.h>
40#include <linux/vmalloc.h>
41#include <linux/highmem.h>
42#include <linux/hugetlb.h>
43#include <linux/kvm_irqfd.h>
44#include <linux/irqbypass.h>
45#include <linux/module.h>
46#include <linux/compiler.h>
47#include <linux/of.h>
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48
49#include <asm/reg.h>
57900694 50#include <asm/ppc-opcode.h>
6de6638b 51#include <asm/asm-prototypes.h>
57900694 52#include <asm/disassemble.h>
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53#include <asm/cputable.h>
54#include <asm/cacheflush.h>
55#include <asm/tlbflush.h>
7c0f6ba6 56#include <linux/uaccess.h>
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57#include <asm/io.h>
58#include <asm/kvm_ppc.h>
59#include <asm/kvm_book3s.h>
60#include <asm/mmu_context.h>
61#include <asm/lppaca.h>
62#include <asm/processor.h>
371fefd6 63#include <asm/cputhreads.h>
aa04b4cc 64#include <asm/page.h>
de1d9248 65#include <asm/hvcall.h>
ae3a197e 66#include <asm/switch_to.h>
512691d4 67#include <asm/smp.h>
66feed61 68#include <asm/dbell.h>
fd7bacbc 69#include <asm/hmi.h>
c57875f5 70#include <asm/pnv-pci.h>
7a84084c 71#include <asm/mmu.h>
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72#include <asm/opal.h>
73#include <asm/xics.h>
5af50993 74#include <asm/xive.h>
de56a948 75
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76#include "book3s.h"
77
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78#define CREATE_TRACE_POINTS
79#include "trace_hv.h"
80
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81/* #define EXIT_DEBUG */
82/* #define EXIT_DEBUG_SIMPLE */
83/* #define EXIT_DEBUG_INT */
84
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85/* Used to indicate that a guest page fault needs to be handled */
86#define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1)
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87/* Used to indicate that a guest passthrough interrupt needs to be handled */
88#define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2)
913d3ff9 89
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90/* Used as a "null" value for timebase values */
91#define TB_NIL (~(u64)0)
92
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93static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
94
b4deba5c 95static int dynamic_mt_modes = 6;
57ad583f 96module_param(dynamic_mt_modes, int, 0644);
b4deba5c 97MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)");
ec257165 98static int target_smt_mode;
57ad583f 99module_param(target_smt_mode, int, 0644);
ec257165 100MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)");
9678cdaa 101
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102static bool indep_threads_mode = true;
103module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR);
104MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)");
105
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106#ifdef CONFIG_KVM_XICS
107static struct kernel_param_ops module_param_ops = {
108 .set = param_set_int,
109 .get = param_get_int,
110};
111
57ad583f 112module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644);
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113MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization");
114
57ad583f 115module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644);
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116MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core");
117#endif
118
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119/* If set, the threads on each CPU core have to be in the same MMU mode */
120static bool no_mixing_hpt_and_radix;
121
19ccb76a 122static void kvmppc_end_cede(struct kvm_vcpu *vcpu);
32fad281 123static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu);
19ccb76a 124
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125static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc,
126 int *ip)
127{
128 int i = *ip;
129 struct kvm_vcpu *vcpu;
130
131 while (++i < MAX_SMT_THREADS) {
132 vcpu = READ_ONCE(vc->runnable_threads[i]);
133 if (vcpu) {
134 *ip = i;
135 return vcpu;
136 }
137 }
138 return NULL;
139}
140
141/* Used to traverse the list of runnable threads for a given vcore */
142#define for_each_runnable_thread(i, vcpu, vc) \
143 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); )
144
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145static bool kvmppc_ipi_thread(int cpu)
146{
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147 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
148
149 /* On POWER9 we can use msgsnd to IPI any cpu */
150 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
151 msg |= get_hard_smp_processor_id(cpu);
152 smp_mb();
153 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
154 return true;
155 }
156
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157 /* On POWER8 for IPIs to threads in the same core, use msgsnd */
158 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
159 preempt_disable();
160 if (cpu_first_thread_sibling(cpu) ==
161 cpu_first_thread_sibling(smp_processor_id())) {
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162 msg |= cpu_thread_in_core(cpu);
163 smp_mb();
164 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
165 preempt_enable();
166 return true;
167 }
168 preempt_enable();
169 }
170
171#if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
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172 if (cpu >= 0 && cpu < nr_cpu_ids) {
173 if (paca[cpu].kvm_hstate.xics_phys) {
174 xics_wake_cpu(cpu);
175 return true;
176 }
177 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY);
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178 return true;
179 }
180#endif
181
182 return false;
183}
184
3a167bea 185static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu)
54695c30 186{
ec257165 187 int cpu;
8577370f 188 struct swait_queue_head *wqp;
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189
190 wqp = kvm_arch_vcpu_wq(vcpu);
267ad7bc 191 if (swq_has_sleeper(wqp)) {
8577370f 192 swake_up(wqp);
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193 ++vcpu->stat.halt_wakeup;
194 }
195
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196 cpu = READ_ONCE(vcpu->arch.thread_cpu);
197 if (cpu >= 0 && kvmppc_ipi_thread(cpu))
66feed61 198 return;
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199
200 /* CPU points to the first thread of the core */
ec257165 201 cpu = vcpu->cpu;
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202 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu))
203 smp_send_reschedule(cpu);
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204}
205
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206/*
207 * We use the vcpu_load/put functions to measure stolen time.
208 * Stolen time is counted as time when either the vcpu is able to
209 * run as part of a virtual core, but the task running the vcore
210 * is preempted or sleeping, or when the vcpu needs something done
211 * in the kernel by the task running the vcpu, but that task is
212 * preempted or sleeping. Those two things have to be counted
213 * separately, since one of the vcpu tasks will take on the job
214 * of running the core, and the other vcpu tasks in the vcore will
215 * sleep waiting for it to do that, but that sleep shouldn't count
216 * as stolen time.
217 *
218 * Hence we accumulate stolen time when the vcpu can run as part of
219 * a vcore using vc->stolen_tb, and the stolen time when the vcpu
220 * needs its task to do other things in the kernel (for example,
221 * service a page fault) in busy_stolen. We don't accumulate
222 * stolen time for a vcore when it is inactive, or for a vcpu
223 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of
224 * a misnomer; it means that the vcpu task is not executing in
225 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in
226 * the kernel. We don't have any way of dividing up that time
227 * between time that the vcpu is genuinely stopped, time that
228 * the task is actively working on behalf of the vcpu, and time
229 * that the task is preempted, so we don't count any of it as
230 * stolen.
231 *
232 * Updates to busy_stolen are protected by arch.tbacct_lock;
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233 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock
234 * lock. The stolen times are measured in units of timebase ticks.
235 * (Note that the != TB_NIL checks below are purely defensive;
236 * they should never fail.)
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237 */
238
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239static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc)
240{
241 unsigned long flags;
242
243 spin_lock_irqsave(&vc->stoltb_lock, flags);
244 vc->preempt_tb = mftb();
245 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
246}
247
248static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc)
249{
250 unsigned long flags;
251
252 spin_lock_irqsave(&vc->stoltb_lock, flags);
253 if (vc->preempt_tb != TB_NIL) {
254 vc->stolen_tb += mftb() - vc->preempt_tb;
255 vc->preempt_tb = TB_NIL;
256 }
257 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
258}
259
3a167bea 260static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu)
de56a948 261{
0456ec4f 262 struct kvmppc_vcore *vc = vcpu->arch.vcore;
bf3d32e1 263 unsigned long flags;
0456ec4f 264
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265 /*
266 * We can test vc->runner without taking the vcore lock,
267 * because only this task ever sets vc->runner to this
268 * vcpu, and once it is set to this vcpu, only this task
269 * ever sets it to NULL.
270 */
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271 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
272 kvmppc_core_end_stolen(vc);
273
2711e248 274 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
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275 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST &&
276 vcpu->arch.busy_preempt != TB_NIL) {
277 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt;
278 vcpu->arch.busy_preempt = TB_NIL;
279 }
bf3d32e1 280 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
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281}
282
3a167bea 283static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu)
de56a948 284{
0456ec4f 285 struct kvmppc_vcore *vc = vcpu->arch.vcore;
bf3d32e1 286 unsigned long flags;
0456ec4f 287
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288 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
289 kvmppc_core_start_stolen(vc);
290
2711e248 291 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
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292 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST)
293 vcpu->arch.busy_preempt = mftb();
bf3d32e1 294 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
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295}
296
3a167bea 297static void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr)
de56a948 298{
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299 /*
300 * Check for illegal transactional state bit combination
301 * and if we find it, force the TS field to a safe state.
302 */
303 if ((msr & MSR_TS_MASK) == MSR_TS_MASK)
304 msr &= ~MSR_TS_MASK;
de56a948 305 vcpu->arch.shregs.msr = msr;
19ccb76a 306 kvmppc_end_cede(vcpu);
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307}
308
5358a963 309static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr)
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310{
311 vcpu->arch.pvr = pvr;
312}
313
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314/* Dummy value used in computing PCR value below */
315#define PCR_ARCH_300 (PCR_ARCH_207 << 1)
316
5358a963 317static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
388cc6e1 318{
2ee13be3 319 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0;
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320 struct kvmppc_vcore *vc = vcpu->arch.vcore;
321
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322 /* We can (emulate) our own architecture version and anything older */
323 if (cpu_has_feature(CPU_FTR_ARCH_300))
324 host_pcr_bit = PCR_ARCH_300;
325 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
326 host_pcr_bit = PCR_ARCH_207;
327 else if (cpu_has_feature(CPU_FTR_ARCH_206))
328 host_pcr_bit = PCR_ARCH_206;
329 else
330 host_pcr_bit = PCR_ARCH_205;
331
332 /* Determine lowest PCR bit needed to run guest in given PVR level */
333 guest_pcr_bit = host_pcr_bit;
388cc6e1 334 if (arch_compat) {
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335 switch (arch_compat) {
336 case PVR_ARCH_205:
2ee13be3 337 guest_pcr_bit = PCR_ARCH_205;
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338 break;
339 case PVR_ARCH_206:
340 case PVR_ARCH_206p:
2ee13be3 341 guest_pcr_bit = PCR_ARCH_206;
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342 break;
343 case PVR_ARCH_207:
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344 guest_pcr_bit = PCR_ARCH_207;
345 break;
346 case PVR_ARCH_300:
347 guest_pcr_bit = PCR_ARCH_300;
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348 break;
349 default:
350 return -EINVAL;
351 }
352 }
353
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354 /* Check requested PCR bits don't exceed our capabilities */
355 if (guest_pcr_bit > host_pcr_bit)
356 return -EINVAL;
357
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358 spin_lock(&vc->lock);
359 vc->arch_compat = arch_compat;
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360 /* Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit */
361 vc->pcr = host_pcr_bit - guest_pcr_bit;
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362 spin_unlock(&vc->lock);
363
364 return 0;
365}
366
5358a963 367static void kvmppc_dump_regs(struct kvm_vcpu *vcpu)
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368{
369 int r;
370
371 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id);
372 pr_err("pc = %.16lx msr = %.16llx trap = %x\n",
373 vcpu->arch.pc, vcpu->arch.shregs.msr, vcpu->arch.trap);
374 for (r = 0; r < 16; ++r)
375 pr_err("r%2d = %.16lx r%d = %.16lx\n",
376 r, kvmppc_get_gpr(vcpu, r),
377 r+16, kvmppc_get_gpr(vcpu, r+16));
378 pr_err("ctr = %.16lx lr = %.16lx\n",
379 vcpu->arch.ctr, vcpu->arch.lr);
380 pr_err("srr0 = %.16llx srr1 = %.16llx\n",
381 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1);
382 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n",
383 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1);
384 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n",
385 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3);
386 pr_err("cr = %.8x xer = %.16lx dsisr = %.8x\n",
387 vcpu->arch.cr, vcpu->arch.xer, vcpu->arch.shregs.dsisr);
388 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar);
389 pr_err("fault dar = %.16lx dsisr = %.8x\n",
390 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
391 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max);
392 for (r = 0; r < vcpu->arch.slb_max; ++r)
393 pr_err(" ESID = %.16llx VSID = %.16llx\n",
394 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv);
395 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n",
a0144e2a 396 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1,
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397 vcpu->arch.last_inst);
398}
399
5358a963 400static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id)
a8606e20 401{
e09fefde 402 struct kvm_vcpu *ret;
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403
404 mutex_lock(&kvm->lock);
e09fefde 405 ret = kvm_get_vcpu_by_id(kvm, id);
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406 mutex_unlock(&kvm->lock);
407 return ret;
408}
409
410static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa)
411{
f13c13a0 412 vpa->__old_status |= LPPACA_OLD_SHARED_PROC;
02407552 413 vpa->yield_count = cpu_to_be32(1);
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414}
415
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416static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v,
417 unsigned long addr, unsigned long len)
418{
419 /* check address is cacheline aligned */
420 if (addr & (L1_CACHE_BYTES - 1))
421 return -EINVAL;
422 spin_lock(&vcpu->arch.vpa_update_lock);
423 if (v->next_gpa != addr || v->len != len) {
424 v->next_gpa = addr;
425 v->len = addr ? len : 0;
426 v->update_pending = 1;
427 }
428 spin_unlock(&vcpu->arch.vpa_update_lock);
429 return 0;
430}
431
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432/* Length for a per-processor buffer is passed in at offset 4 in the buffer */
433struct reg_vpa {
434 u32 dummy;
435 union {
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436 __be16 hword;
437 __be32 word;
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438 } length;
439};
440
441static int vpa_is_registered(struct kvmppc_vpa *vpap)
442{
443 if (vpap->update_pending)
444 return vpap->next_gpa != 0;
445 return vpap->pinned_addr != NULL;
446}
447
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448static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu,
449 unsigned long flags,
450 unsigned long vcpuid, unsigned long vpa)
451{
452 struct kvm *kvm = vcpu->kvm;
93e60249 453 unsigned long len, nb;
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454 void *va;
455 struct kvm_vcpu *tvcpu;
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456 int err;
457 int subfunc;
458 struct kvmppc_vpa *vpap;
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459
460 tvcpu = kvmppc_find_vcpu(kvm, vcpuid);
461 if (!tvcpu)
462 return H_PARAMETER;
463
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464 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK;
465 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL ||
466 subfunc == H_VPA_REG_SLB) {
467 /* Registering new area - address must be cache-line aligned */
468 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa)
a8606e20 469 return H_PARAMETER;
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470
471 /* convert logical addr to kernel addr and read length */
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472 va = kvmppc_pin_guest_page(kvm, vpa, &nb);
473 if (va == NULL)
b2b2f165 474 return H_PARAMETER;
2e25aa5f 475 if (subfunc == H_VPA_REG_VPA)
02407552 476 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword);
a8606e20 477 else
02407552 478 len = be32_to_cpu(((struct reg_vpa *)va)->length.word);
c35635ef 479 kvmppc_unpin_guest_page(kvm, va, vpa, false);
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480
481 /* Check length */
482 if (len > nb || len < sizeof(struct reg_vpa))
483 return H_PARAMETER;
484 } else {
485 vpa = 0;
486 len = 0;
487 }
488
489 err = H_PARAMETER;
490 vpap = NULL;
491 spin_lock(&tvcpu->arch.vpa_update_lock);
492
493 switch (subfunc) {
494 case H_VPA_REG_VPA: /* register VPA */
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495 /*
496 * The size of our lppaca is 1kB because of the way we align
497 * it for the guest to avoid crossing a 4kB boundary. We only
498 * use 640 bytes of the structure though, so we should accept
499 * clients that set a size of 640.
500 */
501 if (len < 640)
a8606e20 502 break;
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503 vpap = &tvcpu->arch.vpa;
504 err = 0;
505 break;
506
507 case H_VPA_REG_DTL: /* register DTL */
508 if (len < sizeof(struct dtl_entry))
a8606e20 509 break;
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510 len -= len % sizeof(struct dtl_entry);
511
512 /* Check that they have previously registered a VPA */
513 err = H_RESOURCE;
514 if (!vpa_is_registered(&tvcpu->arch.vpa))
a8606e20 515 break;
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516
517 vpap = &tvcpu->arch.dtl;
518 err = 0;
519 break;
520
521 case H_VPA_REG_SLB: /* register SLB shadow buffer */
522 /* Check that they have previously registered a VPA */
523 err = H_RESOURCE;
524 if (!vpa_is_registered(&tvcpu->arch.vpa))
a8606e20 525 break;
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526
527 vpap = &tvcpu->arch.slb_shadow;
528 err = 0;
529 break;
530
531 case H_VPA_DEREG_VPA: /* deregister VPA */
532 /* Check they don't still have a DTL or SLB buf registered */
533 err = H_RESOURCE;
534 if (vpa_is_registered(&tvcpu->arch.dtl) ||
535 vpa_is_registered(&tvcpu->arch.slb_shadow))
a8606e20 536 break;
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537
538 vpap = &tvcpu->arch.vpa;
539 err = 0;
540 break;
541
542 case H_VPA_DEREG_DTL: /* deregister DTL */
543 vpap = &tvcpu->arch.dtl;
544 err = 0;
545 break;
546
547 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */
548 vpap = &tvcpu->arch.slb_shadow;
549 err = 0;
550 break;
551 }
552
553 if (vpap) {
554 vpap->next_gpa = vpa;
555 vpap->len = len;
556 vpap->update_pending = 1;
a8606e20 557 }
93e60249 558
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559 spin_unlock(&tvcpu->arch.vpa_update_lock);
560
93e60249 561 return err;
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562}
563
081f323b 564static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap)
2e25aa5f 565{
081f323b 566 struct kvm *kvm = vcpu->kvm;
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567 void *va;
568 unsigned long nb;
081f323b 569 unsigned long gpa;
2e25aa5f 570
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571 /*
572 * We need to pin the page pointed to by vpap->next_gpa,
573 * but we can't call kvmppc_pin_guest_page under the lock
574 * as it does get_user_pages() and down_read(). So we
575 * have to drop the lock, pin the page, then get the lock
576 * again and check that a new area didn't get registered
577 * in the meantime.
578 */
579 for (;;) {
580 gpa = vpap->next_gpa;
581 spin_unlock(&vcpu->arch.vpa_update_lock);
582 va = NULL;
583 nb = 0;
584 if (gpa)
c35635ef 585 va = kvmppc_pin_guest_page(kvm, gpa, &nb);
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PM
586 spin_lock(&vcpu->arch.vpa_update_lock);
587 if (gpa == vpap->next_gpa)
588 break;
589 /* sigh... unpin that one and try again */
590 if (va)
c35635ef 591 kvmppc_unpin_guest_page(kvm, va, gpa, false);
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PM
592 }
593
594 vpap->update_pending = 0;
595 if (va && nb < vpap->len) {
596 /*
597 * If it's now too short, it must be that userspace
598 * has changed the mappings underlying guest memory,
599 * so unregister the region.
600 */
c35635ef 601 kvmppc_unpin_guest_page(kvm, va, gpa, false);
081f323b 602 va = NULL;
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603 }
604 if (vpap->pinned_addr)
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605 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa,
606 vpap->dirty);
607 vpap->gpa = gpa;
2e25aa5f 608 vpap->pinned_addr = va;
c35635ef 609 vpap->dirty = false;
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610 if (va)
611 vpap->pinned_end = va + vpap->len;
612}
613
614static void kvmppc_update_vpas(struct kvm_vcpu *vcpu)
615{
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616 if (!(vcpu->arch.vpa.update_pending ||
617 vcpu->arch.slb_shadow.update_pending ||
618 vcpu->arch.dtl.update_pending))
619 return;
620
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621 spin_lock(&vcpu->arch.vpa_update_lock);
622 if (vcpu->arch.vpa.update_pending) {
081f323b 623 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa);
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624 if (vcpu->arch.vpa.pinned_addr)
625 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr);
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626 }
627 if (vcpu->arch.dtl.update_pending) {
081f323b 628 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl);
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629 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr;
630 vcpu->arch.dtl_index = 0;
631 }
632 if (vcpu->arch.slb_shadow.update_pending)
081f323b 633 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow);
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634 spin_unlock(&vcpu->arch.vpa_update_lock);
635}
636
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637/*
638 * Return the accumulated stolen time for the vcore up until `now'.
639 * The caller should hold the vcore lock.
640 */
641static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now)
642{
643 u64 p;
2711e248 644 unsigned long flags;
c7b67670 645
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646 spin_lock_irqsave(&vc->stoltb_lock, flags);
647 p = vc->stolen_tb;
c7b67670 648 if (vc->vcore_state != VCORE_INACTIVE &&
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649 vc->preempt_tb != TB_NIL)
650 p += now - vc->preempt_tb;
651 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
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652 return p;
653}
654
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655static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu,
656 struct kvmppc_vcore *vc)
657{
658 struct dtl_entry *dt;
659 struct lppaca *vpa;
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660 unsigned long stolen;
661 unsigned long core_stolen;
662 u64 now;
8b24e69f 663 unsigned long flags;
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664
665 dt = vcpu->arch.dtl_ptr;
666 vpa = vcpu->arch.vpa.pinned_addr;
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667 now = mftb();
668 core_stolen = vcore_stolen_time(vc, now);
669 stolen = core_stolen - vcpu->arch.stolen_logged;
670 vcpu->arch.stolen_logged = core_stolen;
8b24e69f 671 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
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672 stolen += vcpu->arch.busy_stolen;
673 vcpu->arch.busy_stolen = 0;
8b24e69f 674 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
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675 if (!dt || !vpa)
676 return;
677 memset(dt, 0, sizeof(struct dtl_entry));
678 dt->dispatch_reason = 7;
02407552
AG
679 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid);
680 dt->timebase = cpu_to_be64(now + vc->tb_offset);
681 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen);
682 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu));
683 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr);
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684 ++dt;
685 if (dt == vcpu->arch.dtl.pinned_end)
686 dt = vcpu->arch.dtl.pinned_addr;
687 vcpu->arch.dtl_ptr = dt;
688 /* order writing *dt vs. writing vpa->dtl_idx */
689 smp_wmb();
02407552 690 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index);
c35635ef 691 vcpu->arch.dtl.dirty = true;
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692}
693
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694/* See if there is a doorbell interrupt pending for a vcpu */
695static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu)
696{
697 int thr;
698 struct kvmppc_vcore *vc;
699
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700 if (vcpu->arch.doorbell_request)
701 return true;
702 /*
703 * Ensure that the read of vcore->dpdes comes after the read
704 * of vcpu->doorbell_request. This barrier matches the
705 * lwsync in book3s_hv_rmhandlers.S just before the
706 * fast_guest_return label.
707 */
708 smp_rmb();
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709 vc = vcpu->arch.vcore;
710 thr = vcpu->vcpu_id - vc->first_vcpuid;
711 return !!(vc->dpdes & (1 << thr));
712}
713
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MN
714static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu)
715{
716 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207)
717 return true;
718 if ((!vcpu->arch.vcore->arch_compat) &&
719 cpu_has_feature(CPU_FTR_ARCH_207S))
720 return true;
721 return false;
722}
723
724static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags,
725 unsigned long resource, unsigned long value1,
726 unsigned long value2)
727{
728 switch (resource) {
729 case H_SET_MODE_RESOURCE_SET_CIABR:
730 if (!kvmppc_power8_compatible(vcpu))
731 return H_P2;
732 if (value2)
733 return H_P4;
734 if (mflags)
735 return H_UNSUPPORTED_FLAG_START;
736 /* Guests can't breakpoint the hypervisor */
737 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER)
738 return H_P3;
739 vcpu->arch.ciabr = value1;
740 return H_SUCCESS;
741 case H_SET_MODE_RESOURCE_SET_DAWR:
742 if (!kvmppc_power8_compatible(vcpu))
743 return H_P2;
398e712c
MN
744 if (!ppc_breakpoint_available())
745 return H_P2;
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MN
746 if (mflags)
747 return H_UNSUPPORTED_FLAG_START;
748 if (value2 & DABRX_HYP)
749 return H_P4;
750 vcpu->arch.dawr = value1;
751 vcpu->arch.dawrx = value2;
752 return H_SUCCESS;
753 default:
754 return H_TOO_HARD;
755 }
756}
757
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SB
758static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target)
759{
760 struct kvmppc_vcore *vcore = target->arch.vcore;
761
762 /*
763 * We expect to have been called by the real mode handler
764 * (kvmppc_rm_h_confer()) which would have directly returned
765 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may
766 * have useful work to do and should not confer) so we don't
767 * recheck that here.
768 */
769
770 spin_lock(&vcore->lock);
771 if (target->arch.state == KVMPPC_VCPU_RUNNABLE &&
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772 vcore->vcore_state != VCORE_INACTIVE &&
773 vcore->runner)
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SB
774 target = vcore->runner;
775 spin_unlock(&vcore->lock);
776
777 return kvm_vcpu_yield_to(target);
778}
779
780static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
781{
782 int yield_count = 0;
783 struct lppaca *lppaca;
784
785 spin_lock(&vcpu->arch.vpa_update_lock);
786 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr;
787 if (lppaca)
ecb6d618 788 yield_count = be32_to_cpu(lppaca->yield_count);
90fd09f8
SB
789 spin_unlock(&vcpu->arch.vpa_update_lock);
790 return yield_count;
791}
792
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793int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
794{
795 unsigned long req = kvmppc_get_gpr(vcpu, 3);
796 unsigned long target, ret = H_SUCCESS;
90fd09f8 797 int yield_count;
a8606e20 798 struct kvm_vcpu *tvcpu;
8e591cb7 799 int idx, rc;
a8606e20 800
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801 if (req <= MAX_HCALL_OPCODE &&
802 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls))
803 return RESUME_HOST;
804
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805 switch (req) {
806 case H_CEDE:
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807 break;
808 case H_PROD:
809 target = kvmppc_get_gpr(vcpu, 4);
810 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
811 if (!tvcpu) {
812 ret = H_PARAMETER;
813 break;
814 }
815 tvcpu->arch.prodded = 1;
816 smp_mb();
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817 if (tvcpu->arch.ceded)
818 kvmppc_fast_vcpu_kick_hv(tvcpu);
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819 break;
820 case H_CONFER:
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821 target = kvmppc_get_gpr(vcpu, 4);
822 if (target == -1)
823 break;
824 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
825 if (!tvcpu) {
826 ret = H_PARAMETER;
827 break;
828 }
90fd09f8
SB
829 yield_count = kvmppc_get_gpr(vcpu, 5);
830 if (kvmppc_get_yield_count(tvcpu) != yield_count)
831 break;
832 kvm_arch_vcpu_yield_to(tvcpu);
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833 break;
834 case H_REGISTER_VPA:
835 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4),
836 kvmppc_get_gpr(vcpu, 5),
837 kvmppc_get_gpr(vcpu, 6));
838 break;
8e591cb7
ME
839 case H_RTAS:
840 if (list_empty(&vcpu->kvm->arch.rtas_tokens))
841 return RESUME_HOST;
842
c9438092 843 idx = srcu_read_lock(&vcpu->kvm->srcu);
8e591cb7 844 rc = kvmppc_rtas_hcall(vcpu);
c9438092 845 srcu_read_unlock(&vcpu->kvm->srcu, idx);
8e591cb7
ME
846
847 if (rc == -ENOENT)
848 return RESUME_HOST;
849 else if (rc == 0)
850 break;
851
852 /* Send the error out to userspace via KVM_RUN */
853 return rc;
99342cf8
DG
854 case H_LOGICAL_CI_LOAD:
855 ret = kvmppc_h_logical_ci_load(vcpu);
856 if (ret == H_TOO_HARD)
857 return RESUME_HOST;
858 break;
859 case H_LOGICAL_CI_STORE:
860 ret = kvmppc_h_logical_ci_store(vcpu);
861 if (ret == H_TOO_HARD)
862 return RESUME_HOST;
863 break;
9642382e
MN
864 case H_SET_MODE:
865 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4),
866 kvmppc_get_gpr(vcpu, 5),
867 kvmppc_get_gpr(vcpu, 6),
868 kvmppc_get_gpr(vcpu, 7));
869 if (ret == H_TOO_HARD)
870 return RESUME_HOST;
871 break;
bc5ad3f3
BH
872 case H_XIRR:
873 case H_CPPR:
874 case H_EOI:
875 case H_IPI:
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PM
876 case H_IPOLL:
877 case H_XIRR_X:
bc5ad3f3 878 if (kvmppc_xics_enabled(vcpu)) {
5af50993
BH
879 if (xive_enabled()) {
880 ret = H_NOT_AVAILABLE;
881 return RESUME_GUEST;
882 }
bc5ad3f3
BH
883 ret = kvmppc_xics_hcall(vcpu, req);
884 break;
d3695aa4
AK
885 }
886 return RESUME_HOST;
887 case H_PUT_TCE:
888 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
889 kvmppc_get_gpr(vcpu, 5),
890 kvmppc_get_gpr(vcpu, 6));
891 if (ret == H_TOO_HARD)
892 return RESUME_HOST;
893 break;
894 case H_PUT_TCE_INDIRECT:
895 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4),
896 kvmppc_get_gpr(vcpu, 5),
897 kvmppc_get_gpr(vcpu, 6),
898 kvmppc_get_gpr(vcpu, 7));
899 if (ret == H_TOO_HARD)
900 return RESUME_HOST;
901 break;
902 case H_STUFF_TCE:
903 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
904 kvmppc_get_gpr(vcpu, 5),
905 kvmppc_get_gpr(vcpu, 6),
906 kvmppc_get_gpr(vcpu, 7));
907 if (ret == H_TOO_HARD)
908 return RESUME_HOST;
909 break;
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910 default:
911 return RESUME_HOST;
912 }
913 kvmppc_set_gpr(vcpu, 3, ret);
914 vcpu->arch.hcall_needed = 0;
915 return RESUME_GUEST;
916}
917
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918static int kvmppc_hcall_impl_hv(unsigned long cmd)
919{
920 switch (cmd) {
921 case H_CEDE:
922 case H_PROD:
923 case H_CONFER:
924 case H_REGISTER_VPA:
9642382e 925 case H_SET_MODE:
99342cf8
DG
926 case H_LOGICAL_CI_LOAD:
927 case H_LOGICAL_CI_STORE:
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928#ifdef CONFIG_KVM_XICS
929 case H_XIRR:
930 case H_CPPR:
931 case H_EOI:
932 case H_IPI:
933 case H_IPOLL:
934 case H_XIRR_X:
935#endif
936 return 1;
937 }
938
939 /* See if it's in the real-mode table */
940 return kvmppc_hcall_impl_hv_realmode(cmd);
941}
942
a59c1d9e
MS
943static int kvmppc_emulate_debug_inst(struct kvm_run *run,
944 struct kvm_vcpu *vcpu)
945{
946 u32 last_inst;
947
948 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) !=
949 EMULATE_DONE) {
950 /*
951 * Fetch failed, so return to guest and
952 * try executing it again.
953 */
954 return RESUME_GUEST;
955 }
956
957 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) {
958 run->exit_reason = KVM_EXIT_DEBUG;
959 run->debug.arch.address = kvmppc_get_pc(vcpu);
960 return RESUME_HOST;
961 } else {
962 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
963 return RESUME_GUEST;
964 }
965}
966
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967static void do_nothing(void *x)
968{
969}
970
971static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu)
972{
973 int thr, cpu, pcpu, nthreads;
974 struct kvm_vcpu *v;
975 unsigned long dpdes;
976
977 nthreads = vcpu->kvm->arch.emul_smt_mode;
978 dpdes = 0;
979 cpu = vcpu->vcpu_id & ~(nthreads - 1);
980 for (thr = 0; thr < nthreads; ++thr, ++cpu) {
981 v = kvmppc_find_vcpu(vcpu->kvm, cpu);
982 if (!v)
983 continue;
984 /*
985 * If the vcpu is currently running on a physical cpu thread,
986 * interrupt it in order to pull it out of the guest briefly,
987 * which will update its vcore->dpdes value.
988 */
989 pcpu = READ_ONCE(v->cpu);
990 if (pcpu >= 0)
991 smp_call_function_single(pcpu, do_nothing, NULL, 1);
992 if (kvmppc_doorbell_pending(v))
993 dpdes |= 1 << thr;
994 }
995 return dpdes;
996}
997
998/*
999 * On POWER9, emulate doorbell-related instructions in order to
1000 * give the guest the illusion of running on a multi-threaded core.
1001 * The instructions emulated are msgsndp, msgclrp, mfspr TIR,
1002 * and mfspr DPDES.
1003 */
1004static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu)
1005{
1006 u32 inst, rb, thr;
1007 unsigned long arg;
1008 struct kvm *kvm = vcpu->kvm;
1009 struct kvm_vcpu *tvcpu;
1010
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1011 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE)
1012 return RESUME_GUEST;
1013 if (get_op(inst) != 31)
1014 return EMULATE_FAIL;
1015 rb = get_rb(inst);
1016 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1);
1017 switch (get_xop(inst)) {
1018 case OP_31_XOP_MSGSNDP:
1019 arg = kvmppc_get_gpr(vcpu, rb);
1020 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1021 break;
1022 arg &= 0x3f;
1023 if (arg >= kvm->arch.emul_smt_mode)
1024 break;
1025 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg);
1026 if (!tvcpu)
1027 break;
1028 if (!tvcpu->arch.doorbell_request) {
1029 tvcpu->arch.doorbell_request = 1;
1030 kvmppc_fast_vcpu_kick_hv(tvcpu);
1031 }
1032 break;
1033 case OP_31_XOP_MSGCLRP:
1034 arg = kvmppc_get_gpr(vcpu, rb);
1035 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1036 break;
1037 vcpu->arch.vcore->dpdes = 0;
1038 vcpu->arch.doorbell_request = 0;
1039 break;
1040 case OP_31_XOP_MFSPR:
1041 switch (get_sprn(inst)) {
1042 case SPRN_TIR:
1043 arg = thr;
1044 break;
1045 case SPRN_DPDES:
1046 arg = kvmppc_read_dpdes(vcpu);
1047 break;
1048 default:
1049 return EMULATE_FAIL;
1050 }
1051 kvmppc_set_gpr(vcpu, get_rt(inst), arg);
1052 break;
1053 default:
1054 return EMULATE_FAIL;
1055 }
1056 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
1057 return RESUME_GUEST;
1058}
1059
36ee41d1 1060/* Called with vcpu->arch.vcore->lock held */
3a167bea
AK
1061static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
1062 struct task_struct *tsk)
de56a948
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1063{
1064 int r = RESUME_HOST;
1065
1066 vcpu->stat.sum_exits++;
1067
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1068 /*
1069 * This can happen if an interrupt occurs in the last stages
1070 * of guest entry or the first stages of guest exit (i.e. after
1071 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV
1072 * and before setting it to KVM_GUEST_MODE_HOST_HV).
1073 * That can happen due to a bug, or due to a machine check
1074 * occurring at just the wrong time.
1075 */
1076 if (vcpu->arch.shregs.msr & MSR_HV) {
1077 printk(KERN_EMERG "KVM trap in HV mode!\n");
1078 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1079 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1080 vcpu->arch.shregs.msr);
1081 kvmppc_dump_regs(vcpu);
1082 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1083 run->hw.hardware_exit_reason = vcpu->arch.trap;
1084 return RESUME_HOST;
1085 }
de56a948
PM
1086 run->exit_reason = KVM_EXIT_UNKNOWN;
1087 run->ready_for_interrupt_injection = 1;
1088 switch (vcpu->arch.trap) {
1089 /* We're good on these - the host merely wanted to get our attention */
1090 case BOOK3S_INTERRUPT_HV_DECREMENTER:
1091 vcpu->stat.dec_exits++;
1092 r = RESUME_GUEST;
1093 break;
1094 case BOOK3S_INTERRUPT_EXTERNAL:
5d00f66b 1095 case BOOK3S_INTERRUPT_H_DOORBELL:
84f7139c 1096 case BOOK3S_INTERRUPT_H_VIRT:
de56a948
PM
1097 vcpu->stat.ext_intr_exits++;
1098 r = RESUME_GUEST;
1099 break;
6de6638b 1100 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/
dee6f24c 1101 case BOOK3S_INTERRUPT_HMI:
de56a948 1102 case BOOK3S_INTERRUPT_PERFMON:
6de6638b 1103 case BOOK3S_INTERRUPT_SYSTEM_RESET:
de56a948
PM
1104 r = RESUME_GUEST;
1105 break;
b4072df4 1106 case BOOK3S_INTERRUPT_MACHINE_CHECK:
e20bbd3d
AP
1107 /* Exit to guest with KVM_EXIT_NMI as exit reason */
1108 run->exit_reason = KVM_EXIT_NMI;
1109 run->hw.hardware_exit_reason = vcpu->arch.trap;
1110 /* Clear out the old NMI status from run->flags */
1111 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK;
1112 /* Now set the NMI status */
1113 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED)
1114 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV;
1115 else
1116 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV;
1117
1118 r = RESUME_HOST;
1119 /* Print the MCE event to host console. */
1120 machine_check_print_event_info(&vcpu->arch.mce_evt, false);
b4072df4 1121 break;
de56a948
PM
1122 case BOOK3S_INTERRUPT_PROGRAM:
1123 {
1124 ulong flags;
1125 /*
1126 * Normally program interrupts are delivered directly
1127 * to the guest by the hardware, but we can get here
1128 * as a result of a hypervisor emulation interrupt
1129 * (e40) getting turned into a 700 by BML RTAS.
1130 */
1131 flags = vcpu->arch.shregs.msr & 0x1f0000ull;
1132 kvmppc_core_queue_program(vcpu, flags);
1133 r = RESUME_GUEST;
1134 break;
1135 }
1136 case BOOK3S_INTERRUPT_SYSCALL:
1137 {
1138 /* hcall - punt to userspace */
1139 int i;
1140
27025a60
LPF
1141 /* hypercall with MSR_PR has already been handled in rmode,
1142 * and never reaches here.
1143 */
1144
de56a948
PM
1145 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3);
1146 for (i = 0; i < 9; ++i)
1147 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i);
1148 run->exit_reason = KVM_EXIT_PAPR_HCALL;
1149 vcpu->arch.hcall_needed = 1;
1150 r = RESUME_HOST;
1151 break;
1152 }
1153 /*
342d3db7
PM
1154 * We get these next two if the guest accesses a page which it thinks
1155 * it has mapped but which is not actually present, either because
1156 * it is for an emulated I/O device or because the corresonding
1157 * host page has been paged out. Any other HDSI/HISI interrupts
1158 * have been handled already.
de56a948
PM
1159 */
1160 case BOOK3S_INTERRUPT_H_DATA_STORAGE:
913d3ff9 1161 r = RESUME_PAGE_FAULT;
de56a948
PM
1162 break;
1163 case BOOK3S_INTERRUPT_H_INST_STORAGE:
913d3ff9
PM
1164 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu);
1165 vcpu->arch.fault_dsisr = 0;
1166 r = RESUME_PAGE_FAULT;
de56a948
PM
1167 break;
1168 /*
1169 * This occurs if the guest executes an illegal instruction.
a59c1d9e
MS
1170 * If the guest debug is disabled, generate a program interrupt
1171 * to the guest. If guest debug is enabled, we need to check
1172 * whether the instruction is a software breakpoint instruction.
1173 * Accordingly return to Guest or Host.
de56a948
PM
1174 */
1175 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
4a157d61
PM
1176 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED)
1177 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ?
1178 swab32(vcpu->arch.emul_inst) :
1179 vcpu->arch.emul_inst;
a59c1d9e 1180 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) {
36ee41d1
PM
1181 /* Need vcore unlocked to call kvmppc_get_last_inst */
1182 spin_unlock(&vcpu->arch.vcore->lock);
a59c1d9e 1183 r = kvmppc_emulate_debug_inst(run, vcpu);
36ee41d1 1184 spin_lock(&vcpu->arch.vcore->lock);
a59c1d9e
MS
1185 } else {
1186 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1187 r = RESUME_GUEST;
1188 }
bd3048b8
ME
1189 break;
1190 /*
1191 * This occurs if the guest (kernel or userspace), does something that
57900694
PM
1192 * is prohibited by HFSCR.
1193 * On POWER9, this could be a doorbell instruction that we need
1194 * to emulate.
1195 * Otherwise, we just generate a program interrupt to the guest.
bd3048b8
ME
1196 */
1197 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL:
57900694 1198 r = EMULATE_FAIL;
36ee41d1
PM
1199 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) &&
1200 cpu_has_feature(CPU_FTR_ARCH_300)) {
1201 /* Need vcore unlocked to call kvmppc_get_last_inst */
1202 spin_unlock(&vcpu->arch.vcore->lock);
57900694 1203 r = kvmppc_emulate_doorbell_instr(vcpu);
36ee41d1
PM
1204 spin_lock(&vcpu->arch.vcore->lock);
1205 }
57900694
PM
1206 if (r == EMULATE_FAIL) {
1207 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1208 r = RESUME_GUEST;
1209 }
de56a948 1210 break;
4bb3c7a0
PM
1211
1212#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1213 case BOOK3S_INTERRUPT_HV_SOFTPATCH:
1214 /*
1215 * This occurs for various TM-related instructions that
1216 * we need to emulate on POWER9 DD2.2. We have already
1217 * handled the cases where the guest was in real-suspend
1218 * mode and was transitioning to transactional state.
1219 */
1220 r = kvmhv_p9_tm_emulation(vcpu);
1221 break;
1222#endif
1223
f7af5209
SW
1224 case BOOK3S_INTERRUPT_HV_RM_HARD:
1225 r = RESUME_PASSTHROUGH;
1226 break;
de56a948
PM
1227 default:
1228 kvmppc_dump_regs(vcpu);
1229 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1230 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1231 vcpu->arch.shregs.msr);
f3271d4c 1232 run->hw.hardware_exit_reason = vcpu->arch.trap;
de56a948 1233 r = RESUME_HOST;
de56a948
PM
1234 break;
1235 }
1236
de56a948
PM
1237 return r;
1238}
1239
3a167bea
AK
1240static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu,
1241 struct kvm_sregs *sregs)
de56a948
PM
1242{
1243 int i;
1244
de56a948 1245 memset(sregs, 0, sizeof(struct kvm_sregs));
87916442 1246 sregs->pvr = vcpu->arch.pvr;
de56a948
PM
1247 for (i = 0; i < vcpu->arch.slb_max; i++) {
1248 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige;
1249 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
1250 }
1251
1252 return 0;
1253}
1254
3a167bea
AK
1255static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu,
1256 struct kvm_sregs *sregs)
de56a948
PM
1257{
1258 int i, j;
1259
9333e6c4
PM
1260 /* Only accept the same PVR as the host's, since we can't spoof it */
1261 if (sregs->pvr != vcpu->arch.pvr)
1262 return -EINVAL;
de56a948
PM
1263
1264 j = 0;
1265 for (i = 0; i < vcpu->arch.slb_nr; i++) {
1266 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) {
1267 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe;
1268 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv;
1269 ++j;
1270 }
1271 }
1272 vcpu->arch.slb_max = j;
1273
1274 return 0;
1275}
1276
a0840240
AK
1277static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr,
1278 bool preserve_top32)
a0144e2a 1279{
8f902b00 1280 struct kvm *kvm = vcpu->kvm;
a0144e2a
PM
1281 struct kvmppc_vcore *vc = vcpu->arch.vcore;
1282 u64 mask;
1283
8f902b00 1284 mutex_lock(&kvm->lock);
a0144e2a 1285 spin_lock(&vc->lock);
d682916a
AB
1286 /*
1287 * If ILE (interrupt little-endian) has changed, update the
1288 * MSR_LE bit in the intr_msr for each vcpu in this vcore.
1289 */
1290 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) {
d682916a
AB
1291 struct kvm_vcpu *vcpu;
1292 int i;
1293
d682916a
AB
1294 kvm_for_each_vcpu(i, vcpu, kvm) {
1295 if (vcpu->arch.vcore != vc)
1296 continue;
1297 if (new_lpcr & LPCR_ILE)
1298 vcpu->arch.intr_msr |= MSR_LE;
1299 else
1300 vcpu->arch.intr_msr &= ~MSR_LE;
1301 }
d682916a
AB
1302 }
1303
a0144e2a
PM
1304 /*
1305 * Userspace can only modify DPFD (default prefetch depth),
1306 * ILE (interrupt little-endian) and TC (translation control).
8cf4ecc0 1307 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.).
a0144e2a
PM
1308 */
1309 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC;
e0622bd9
PM
1310 if (cpu_has_feature(CPU_FTR_ARCH_207S))
1311 mask |= LPCR_AIL;
1bc3fe81
PM
1312 /*
1313 * On POWER9, allow userspace to enable large decrementer for the
1314 * guest, whether or not the host has it enabled.
1315 */
1316 if (cpu_has_feature(CPU_FTR_ARCH_300))
1317 mask |= LPCR_LD;
a0840240
AK
1318
1319 /* Broken 32-bit version of LPCR must not clear top bits */
1320 if (preserve_top32)
1321 mask &= 0xFFFFFFFF;
a0144e2a
PM
1322 vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask);
1323 spin_unlock(&vc->lock);
8f902b00 1324 mutex_unlock(&kvm->lock);
a0144e2a
PM
1325}
1326
3a167bea
AK
1327static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1328 union kvmppc_one_reg *val)
31f3438e 1329{
a136a8bd
PM
1330 int r = 0;
1331 long int i;
31f3438e 1332
a136a8bd 1333 switch (id) {
a59c1d9e
MS
1334 case KVM_REG_PPC_DEBUG_INST:
1335 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1336 break;
31f3438e 1337 case KVM_REG_PPC_HIOR:
a136a8bd
PM
1338 *val = get_reg_val(id, 0);
1339 break;
1340 case KVM_REG_PPC_DABR:
1341 *val = get_reg_val(id, vcpu->arch.dabr);
1342 break;
8563bf52
PM
1343 case KVM_REG_PPC_DABRX:
1344 *val = get_reg_val(id, vcpu->arch.dabrx);
1345 break;
a136a8bd
PM
1346 case KVM_REG_PPC_DSCR:
1347 *val = get_reg_val(id, vcpu->arch.dscr);
1348 break;
1349 case KVM_REG_PPC_PURR:
1350 *val = get_reg_val(id, vcpu->arch.purr);
1351 break;
1352 case KVM_REG_PPC_SPURR:
1353 *val = get_reg_val(id, vcpu->arch.spurr);
1354 break;
1355 case KVM_REG_PPC_AMR:
1356 *val = get_reg_val(id, vcpu->arch.amr);
1357 break;
1358 case KVM_REG_PPC_UAMOR:
1359 *val = get_reg_val(id, vcpu->arch.uamor);
1360 break;
b005255e 1361 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
a136a8bd
PM
1362 i = id - KVM_REG_PPC_MMCR0;
1363 *val = get_reg_val(id, vcpu->arch.mmcr[i]);
1364 break;
1365 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1366 i = id - KVM_REG_PPC_PMC1;
1367 *val = get_reg_val(id, vcpu->arch.pmc[i]);
31f3438e 1368 break;
b005255e
MN
1369 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1370 i = id - KVM_REG_PPC_SPMC1;
1371 *val = get_reg_val(id, vcpu->arch.spmc[i]);
1372 break;
14941789
PM
1373 case KVM_REG_PPC_SIAR:
1374 *val = get_reg_val(id, vcpu->arch.siar);
1375 break;
1376 case KVM_REG_PPC_SDAR:
1377 *val = get_reg_val(id, vcpu->arch.sdar);
1378 break;
b005255e
MN
1379 case KVM_REG_PPC_SIER:
1380 *val = get_reg_val(id, vcpu->arch.sier);
a8bd19ef 1381 break;
b005255e
MN
1382 case KVM_REG_PPC_IAMR:
1383 *val = get_reg_val(id, vcpu->arch.iamr);
1384 break;
b005255e
MN
1385 case KVM_REG_PPC_PSPB:
1386 *val = get_reg_val(id, vcpu->arch.pspb);
1387 break;
b005255e
MN
1388 case KVM_REG_PPC_DPDES:
1389 *val = get_reg_val(id, vcpu->arch.vcore->dpdes);
1390 break;
88b02cf9
PM
1391 case KVM_REG_PPC_VTB:
1392 *val = get_reg_val(id, vcpu->arch.vcore->vtb);
1393 break;
b005255e
MN
1394 case KVM_REG_PPC_DAWR:
1395 *val = get_reg_val(id, vcpu->arch.dawr);
1396 break;
1397 case KVM_REG_PPC_DAWRX:
1398 *val = get_reg_val(id, vcpu->arch.dawrx);
1399 break;
1400 case KVM_REG_PPC_CIABR:
1401 *val = get_reg_val(id, vcpu->arch.ciabr);
1402 break;
b005255e
MN
1403 case KVM_REG_PPC_CSIGR:
1404 *val = get_reg_val(id, vcpu->arch.csigr);
1405 break;
1406 case KVM_REG_PPC_TACR:
1407 *val = get_reg_val(id, vcpu->arch.tacr);
1408 break;
1409 case KVM_REG_PPC_TCSCR:
1410 *val = get_reg_val(id, vcpu->arch.tcscr);
1411 break;
1412 case KVM_REG_PPC_PID:
1413 *val = get_reg_val(id, vcpu->arch.pid);
1414 break;
1415 case KVM_REG_PPC_ACOP:
1416 *val = get_reg_val(id, vcpu->arch.acop);
1417 break;
1418 case KVM_REG_PPC_WORT:
1419 *val = get_reg_val(id, vcpu->arch.wort);
a8bd19ef 1420 break;
e9cf1e08
PM
1421 case KVM_REG_PPC_TIDR:
1422 *val = get_reg_val(id, vcpu->arch.tid);
1423 break;
1424 case KVM_REG_PPC_PSSCR:
1425 *val = get_reg_val(id, vcpu->arch.psscr);
1426 break;
55b665b0
PM
1427 case KVM_REG_PPC_VPA_ADDR:
1428 spin_lock(&vcpu->arch.vpa_update_lock);
1429 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa);
1430 spin_unlock(&vcpu->arch.vpa_update_lock);
1431 break;
1432 case KVM_REG_PPC_VPA_SLB:
1433 spin_lock(&vcpu->arch.vpa_update_lock);
1434 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa;
1435 val->vpaval.length = vcpu->arch.slb_shadow.len;
1436 spin_unlock(&vcpu->arch.vpa_update_lock);
1437 break;
1438 case KVM_REG_PPC_VPA_DTL:
1439 spin_lock(&vcpu->arch.vpa_update_lock);
1440 val->vpaval.addr = vcpu->arch.dtl.next_gpa;
1441 val->vpaval.length = vcpu->arch.dtl.len;
1442 spin_unlock(&vcpu->arch.vpa_update_lock);
1443 break;
93b0f4dc
PM
1444 case KVM_REG_PPC_TB_OFFSET:
1445 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset);
1446 break;
a0144e2a 1447 case KVM_REG_PPC_LPCR:
a0840240 1448 case KVM_REG_PPC_LPCR_64:
a0144e2a
PM
1449 *val = get_reg_val(id, vcpu->arch.vcore->lpcr);
1450 break;
4b8473c9
PM
1451 case KVM_REG_PPC_PPR:
1452 *val = get_reg_val(id, vcpu->arch.ppr);
1453 break;
a7d80d01
MN
1454#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1455 case KVM_REG_PPC_TFHAR:
1456 *val = get_reg_val(id, vcpu->arch.tfhar);
1457 break;
1458 case KVM_REG_PPC_TFIAR:
1459 *val = get_reg_val(id, vcpu->arch.tfiar);
1460 break;
1461 case KVM_REG_PPC_TEXASR:
1462 *val = get_reg_val(id, vcpu->arch.texasr);
1463 break;
1464 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1465 i = id - KVM_REG_PPC_TM_GPR0;
1466 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]);
1467 break;
1468 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1469 {
1470 int j;
1471 i = id - KVM_REG_PPC_TM_VSR0;
1472 if (i < 32)
1473 for (j = 0; j < TS_FPRWIDTH; j++)
1474 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j];
1475 else {
1476 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1477 val->vval = vcpu->arch.vr_tm.vr[i-32];
1478 else
1479 r = -ENXIO;
1480 }
1481 break;
1482 }
1483 case KVM_REG_PPC_TM_CR:
1484 *val = get_reg_val(id, vcpu->arch.cr_tm);
1485 break;
0d808df0
PM
1486 case KVM_REG_PPC_TM_XER:
1487 *val = get_reg_val(id, vcpu->arch.xer_tm);
1488 break;
a7d80d01
MN
1489 case KVM_REG_PPC_TM_LR:
1490 *val = get_reg_val(id, vcpu->arch.lr_tm);
1491 break;
1492 case KVM_REG_PPC_TM_CTR:
1493 *val = get_reg_val(id, vcpu->arch.ctr_tm);
1494 break;
1495 case KVM_REG_PPC_TM_FPSCR:
1496 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr);
1497 break;
1498 case KVM_REG_PPC_TM_AMR:
1499 *val = get_reg_val(id, vcpu->arch.amr_tm);
1500 break;
1501 case KVM_REG_PPC_TM_PPR:
1502 *val = get_reg_val(id, vcpu->arch.ppr_tm);
1503 break;
1504 case KVM_REG_PPC_TM_VRSAVE:
1505 *val = get_reg_val(id, vcpu->arch.vrsave_tm);
1506 break;
1507 case KVM_REG_PPC_TM_VSCR:
1508 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1509 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]);
1510 else
1511 r = -ENXIO;
1512 break;
1513 case KVM_REG_PPC_TM_DSCR:
1514 *val = get_reg_val(id, vcpu->arch.dscr_tm);
1515 break;
1516 case KVM_REG_PPC_TM_TAR:
1517 *val = get_reg_val(id, vcpu->arch.tar_tm);
1518 break;
1519#endif
388cc6e1
PM
1520 case KVM_REG_PPC_ARCH_COMPAT:
1521 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat);
1522 break;
5855564c
PM
1523 case KVM_REG_PPC_DEC_EXPIRY:
1524 *val = get_reg_val(id, vcpu->arch.dec_expires +
1525 vcpu->arch.vcore->tb_offset);
1526 break;
31f3438e 1527 default:
a136a8bd 1528 r = -EINVAL;
31f3438e
PM
1529 break;
1530 }
1531
1532 return r;
1533}
1534
3a167bea
AK
1535static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1536 union kvmppc_one_reg *val)
31f3438e 1537{
a136a8bd
PM
1538 int r = 0;
1539 long int i;
55b665b0 1540 unsigned long addr, len;
31f3438e 1541
a136a8bd 1542 switch (id) {
31f3438e 1543 case KVM_REG_PPC_HIOR:
31f3438e 1544 /* Only allow this to be set to zero */
a136a8bd 1545 if (set_reg_val(id, *val))
31f3438e
PM
1546 r = -EINVAL;
1547 break;
a136a8bd
PM
1548 case KVM_REG_PPC_DABR:
1549 vcpu->arch.dabr = set_reg_val(id, *val);
1550 break;
8563bf52
PM
1551 case KVM_REG_PPC_DABRX:
1552 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP;
1553 break;
a136a8bd
PM
1554 case KVM_REG_PPC_DSCR:
1555 vcpu->arch.dscr = set_reg_val(id, *val);
1556 break;
1557 case KVM_REG_PPC_PURR:
1558 vcpu->arch.purr = set_reg_val(id, *val);
1559 break;
1560 case KVM_REG_PPC_SPURR:
1561 vcpu->arch.spurr = set_reg_val(id, *val);
1562 break;
1563 case KVM_REG_PPC_AMR:
1564 vcpu->arch.amr = set_reg_val(id, *val);
1565 break;
1566 case KVM_REG_PPC_UAMOR:
1567 vcpu->arch.uamor = set_reg_val(id, *val);
1568 break;
b005255e 1569 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
a136a8bd
PM
1570 i = id - KVM_REG_PPC_MMCR0;
1571 vcpu->arch.mmcr[i] = set_reg_val(id, *val);
1572 break;
1573 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1574 i = id - KVM_REG_PPC_PMC1;
1575 vcpu->arch.pmc[i] = set_reg_val(id, *val);
1576 break;
b005255e
MN
1577 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1578 i = id - KVM_REG_PPC_SPMC1;
1579 vcpu->arch.spmc[i] = set_reg_val(id, *val);
1580 break;
14941789
PM
1581 case KVM_REG_PPC_SIAR:
1582 vcpu->arch.siar = set_reg_val(id, *val);
1583 break;
1584 case KVM_REG_PPC_SDAR:
1585 vcpu->arch.sdar = set_reg_val(id, *val);
1586 break;
b005255e
MN
1587 case KVM_REG_PPC_SIER:
1588 vcpu->arch.sier = set_reg_val(id, *val);
a8bd19ef 1589 break;
b005255e
MN
1590 case KVM_REG_PPC_IAMR:
1591 vcpu->arch.iamr = set_reg_val(id, *val);
1592 break;
b005255e
MN
1593 case KVM_REG_PPC_PSPB:
1594 vcpu->arch.pspb = set_reg_val(id, *val);
1595 break;
b005255e
MN
1596 case KVM_REG_PPC_DPDES:
1597 vcpu->arch.vcore->dpdes = set_reg_val(id, *val);
1598 break;
88b02cf9
PM
1599 case KVM_REG_PPC_VTB:
1600 vcpu->arch.vcore->vtb = set_reg_val(id, *val);
1601 break;
b005255e
MN
1602 case KVM_REG_PPC_DAWR:
1603 vcpu->arch.dawr = set_reg_val(id, *val);
1604 break;
1605 case KVM_REG_PPC_DAWRX:
1606 vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP;
1607 break;
1608 case KVM_REG_PPC_CIABR:
1609 vcpu->arch.ciabr = set_reg_val(id, *val);
1610 /* Don't allow setting breakpoints in hypervisor code */
1611 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER)
1612 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */
1613 break;
b005255e
MN
1614 case KVM_REG_PPC_CSIGR:
1615 vcpu->arch.csigr = set_reg_val(id, *val);
1616 break;
1617 case KVM_REG_PPC_TACR:
1618 vcpu->arch.tacr = set_reg_val(id, *val);
1619 break;
1620 case KVM_REG_PPC_TCSCR:
1621 vcpu->arch.tcscr = set_reg_val(id, *val);
1622 break;
1623 case KVM_REG_PPC_PID:
1624 vcpu->arch.pid = set_reg_val(id, *val);
1625 break;
1626 case KVM_REG_PPC_ACOP:
1627 vcpu->arch.acop = set_reg_val(id, *val);
1628 break;
1629 case KVM_REG_PPC_WORT:
1630 vcpu->arch.wort = set_reg_val(id, *val);
a8bd19ef 1631 break;
e9cf1e08
PM
1632 case KVM_REG_PPC_TIDR:
1633 vcpu->arch.tid = set_reg_val(id, *val);
1634 break;
1635 case KVM_REG_PPC_PSSCR:
1636 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS;
1637 break;
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PM
1638 case KVM_REG_PPC_VPA_ADDR:
1639 addr = set_reg_val(id, *val);
1640 r = -EINVAL;
1641 if (!addr && (vcpu->arch.slb_shadow.next_gpa ||
1642 vcpu->arch.dtl.next_gpa))
1643 break;
1644 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca));
1645 break;
1646 case KVM_REG_PPC_VPA_SLB:
1647 addr = val->vpaval.addr;
1648 len = val->vpaval.length;
1649 r = -EINVAL;
1650 if (addr && !vcpu->arch.vpa.next_gpa)
1651 break;
1652 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len);
1653 break;
1654 case KVM_REG_PPC_VPA_DTL:
1655 addr = val->vpaval.addr;
1656 len = val->vpaval.length;
1657 r = -EINVAL;
9f8c8c78
PM
1658 if (addr && (len < sizeof(struct dtl_entry) ||
1659 !vcpu->arch.vpa.next_gpa))
55b665b0
PM
1660 break;
1661 len -= len % sizeof(struct dtl_entry);
1662 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len);
1663 break;
93b0f4dc 1664 case KVM_REG_PPC_TB_OFFSET:
3d3efb68
PM
1665 /*
1666 * POWER9 DD1 has an erratum where writing TBU40 causes
1667 * the timebase to lose ticks. So we don't let the
1668 * timebase offset be changed on P9 DD1. (It is
1669 * initialized to zero.)
1670 */
1671 if (cpu_has_feature(CPU_FTR_POWER9_DD1))
1672 break;
93b0f4dc
PM
1673 /* round up to multiple of 2^24 */
1674 vcpu->arch.vcore->tb_offset =
1675 ALIGN(set_reg_val(id, *val), 1UL << 24);
1676 break;
a0144e2a 1677 case KVM_REG_PPC_LPCR:
a0840240
AK
1678 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true);
1679 break;
1680 case KVM_REG_PPC_LPCR_64:
1681 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false);
a0144e2a 1682 break;
4b8473c9
PM
1683 case KVM_REG_PPC_PPR:
1684 vcpu->arch.ppr = set_reg_val(id, *val);
1685 break;
a7d80d01
MN
1686#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1687 case KVM_REG_PPC_TFHAR:
1688 vcpu->arch.tfhar = set_reg_val(id, *val);
1689 break;
1690 case KVM_REG_PPC_TFIAR:
1691 vcpu->arch.tfiar = set_reg_val(id, *val);
1692 break;
1693 case KVM_REG_PPC_TEXASR:
1694 vcpu->arch.texasr = set_reg_val(id, *val);
1695 break;
1696 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1697 i = id - KVM_REG_PPC_TM_GPR0;
1698 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val);
1699 break;
1700 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1701 {
1702 int j;
1703 i = id - KVM_REG_PPC_TM_VSR0;
1704 if (i < 32)
1705 for (j = 0; j < TS_FPRWIDTH; j++)
1706 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j];
1707 else
1708 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1709 vcpu->arch.vr_tm.vr[i-32] = val->vval;
1710 else
1711 r = -ENXIO;
1712 break;
1713 }
1714 case KVM_REG_PPC_TM_CR:
1715 vcpu->arch.cr_tm = set_reg_val(id, *val);
1716 break;
0d808df0
PM
1717 case KVM_REG_PPC_TM_XER:
1718 vcpu->arch.xer_tm = set_reg_val(id, *val);
1719 break;
a7d80d01
MN
1720 case KVM_REG_PPC_TM_LR:
1721 vcpu->arch.lr_tm = set_reg_val(id, *val);
1722 break;
1723 case KVM_REG_PPC_TM_CTR:
1724 vcpu->arch.ctr_tm = set_reg_val(id, *val);
1725 break;
1726 case KVM_REG_PPC_TM_FPSCR:
1727 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val);
1728 break;
1729 case KVM_REG_PPC_TM_AMR:
1730 vcpu->arch.amr_tm = set_reg_val(id, *val);
1731 break;
1732 case KVM_REG_PPC_TM_PPR:
1733 vcpu->arch.ppr_tm = set_reg_val(id, *val);
1734 break;
1735 case KVM_REG_PPC_TM_VRSAVE:
1736 vcpu->arch.vrsave_tm = set_reg_val(id, *val);
1737 break;
1738 case KVM_REG_PPC_TM_VSCR:
1739 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1740 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val);
1741 else
1742 r = - ENXIO;
1743 break;
1744 case KVM_REG_PPC_TM_DSCR:
1745 vcpu->arch.dscr_tm = set_reg_val(id, *val);
1746 break;
1747 case KVM_REG_PPC_TM_TAR:
1748 vcpu->arch.tar_tm = set_reg_val(id, *val);
1749 break;
1750#endif
388cc6e1
PM
1751 case KVM_REG_PPC_ARCH_COMPAT:
1752 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val));
1753 break;
5855564c
PM
1754 case KVM_REG_PPC_DEC_EXPIRY:
1755 vcpu->arch.dec_expires = set_reg_val(id, *val) -
1756 vcpu->arch.vcore->tb_offset;
1757 break;
31f3438e 1758 default:
a136a8bd 1759 r = -EINVAL;
31f3438e
PM
1760 break;
1761 }
1762
1763 return r;
1764}
1765
45c940ba
PM
1766/*
1767 * On POWER9, threads are independent and can be in different partitions.
1768 * Therefore we consider each thread to be a subcore.
1769 * There is a restriction that all threads have to be in the same
1770 * MMU mode (radix or HPT), unfortunately, but since we only support
1771 * HPT guests on a HPT host so far, that isn't an impediment yet.
1772 */
516f7898 1773static int threads_per_vcore(struct kvm *kvm)
45c940ba 1774{
516f7898 1775 if (kvm->arch.threads_indep)
45c940ba
PM
1776 return 1;
1777 return threads_per_subcore;
1778}
1779
de9bdd1a
SS
1780static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int core)
1781{
1782 struct kvmppc_vcore *vcore;
1783
1784 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL);
1785
1786 if (vcore == NULL)
1787 return NULL;
1788
de9bdd1a 1789 spin_lock_init(&vcore->lock);
2711e248 1790 spin_lock_init(&vcore->stoltb_lock);
8577370f 1791 init_swait_queue_head(&vcore->wq);
de9bdd1a
SS
1792 vcore->preempt_tb = TB_NIL;
1793 vcore->lpcr = kvm->arch.lpcr;
3c313524 1794 vcore->first_vcpuid = core * kvm->arch.smt_mode;
de9bdd1a 1795 vcore->kvm = kvm;
ec257165 1796 INIT_LIST_HEAD(&vcore->preempt_list);
de9bdd1a
SS
1797
1798 return vcore;
1799}
1800
b6c295df
PM
1801#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
1802static struct debugfs_timings_element {
1803 const char *name;
1804 size_t offset;
1805} timings[] = {
1806 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)},
1807 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)},
1808 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)},
1809 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)},
1810 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)},
1811};
1812
4bb817ed 1813#define N_TIMINGS (ARRAY_SIZE(timings))
b6c295df
PM
1814
1815struct debugfs_timings_state {
1816 struct kvm_vcpu *vcpu;
1817 unsigned int buflen;
1818 char buf[N_TIMINGS * 100];
1819};
1820
1821static int debugfs_timings_open(struct inode *inode, struct file *file)
1822{
1823 struct kvm_vcpu *vcpu = inode->i_private;
1824 struct debugfs_timings_state *p;
1825
1826 p = kzalloc(sizeof(*p), GFP_KERNEL);
1827 if (!p)
1828 return -ENOMEM;
1829
1830 kvm_get_kvm(vcpu->kvm);
1831 p->vcpu = vcpu;
1832 file->private_data = p;
1833
1834 return nonseekable_open(inode, file);
1835}
1836
1837static int debugfs_timings_release(struct inode *inode, struct file *file)
1838{
1839 struct debugfs_timings_state *p = file->private_data;
1840
1841 kvm_put_kvm(p->vcpu->kvm);
1842 kfree(p);
1843 return 0;
1844}
1845
1846static ssize_t debugfs_timings_read(struct file *file, char __user *buf,
1847 size_t len, loff_t *ppos)
1848{
1849 struct debugfs_timings_state *p = file->private_data;
1850 struct kvm_vcpu *vcpu = p->vcpu;
1851 char *s, *buf_end;
1852 struct kvmhv_tb_accumulator tb;
1853 u64 count;
1854 loff_t pos;
1855 ssize_t n;
1856 int i, loops;
1857 bool ok;
1858
1859 if (!p->buflen) {
1860 s = p->buf;
1861 buf_end = s + sizeof(p->buf);
1862 for (i = 0; i < N_TIMINGS; ++i) {
1863 struct kvmhv_tb_accumulator *acc;
1864
1865 acc = (struct kvmhv_tb_accumulator *)
1866 ((unsigned long)vcpu + timings[i].offset);
1867 ok = false;
1868 for (loops = 0; loops < 1000; ++loops) {
1869 count = acc->seqcount;
1870 if (!(count & 1)) {
1871 smp_rmb();
1872 tb = *acc;
1873 smp_rmb();
1874 if (count == acc->seqcount) {
1875 ok = true;
1876 break;
1877 }
1878 }
1879 udelay(1);
1880 }
1881 if (!ok)
1882 snprintf(s, buf_end - s, "%s: stuck\n",
1883 timings[i].name);
1884 else
1885 snprintf(s, buf_end - s,
1886 "%s: %llu %llu %llu %llu\n",
1887 timings[i].name, count / 2,
1888 tb_to_ns(tb.tb_total),
1889 tb_to_ns(tb.tb_min),
1890 tb_to_ns(tb.tb_max));
1891 s += strlen(s);
1892 }
1893 p->buflen = s - p->buf;
1894 }
1895
1896 pos = *ppos;
1897 if (pos >= p->buflen)
1898 return 0;
1899 if (len > p->buflen - pos)
1900 len = p->buflen - pos;
1901 n = copy_to_user(buf, p->buf + pos, len);
1902 if (n) {
1903 if (n == len)
1904 return -EFAULT;
1905 len -= n;
1906 }
1907 *ppos = pos + len;
1908 return len;
1909}
1910
1911static ssize_t debugfs_timings_write(struct file *file, const char __user *buf,
1912 size_t len, loff_t *ppos)
1913{
1914 return -EACCES;
1915}
1916
1917static const struct file_operations debugfs_timings_ops = {
1918 .owner = THIS_MODULE,
1919 .open = debugfs_timings_open,
1920 .release = debugfs_timings_release,
1921 .read = debugfs_timings_read,
1922 .write = debugfs_timings_write,
1923 .llseek = generic_file_llseek,
1924};
1925
1926/* Create a debugfs directory for the vcpu */
1927static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
1928{
1929 char buf[16];
1930 struct kvm *kvm = vcpu->kvm;
1931
1932 snprintf(buf, sizeof(buf), "vcpu%u", id);
1933 if (IS_ERR_OR_NULL(kvm->arch.debugfs_dir))
1934 return;
1935 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir);
1936 if (IS_ERR_OR_NULL(vcpu->arch.debugfs_dir))
1937 return;
1938 vcpu->arch.debugfs_timings =
1939 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir,
1940 vcpu, &debugfs_timings_ops);
1941}
1942
1943#else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
1944static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
1945{
1946}
1947#endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
1948
3a167bea
AK
1949static struct kvm_vcpu *kvmppc_core_vcpu_create_hv(struct kvm *kvm,
1950 unsigned int id)
de56a948
PM
1951{
1952 struct kvm_vcpu *vcpu;
3c313524 1953 int err;
371fefd6
PM
1954 int core;
1955 struct kvmppc_vcore *vcore;
de56a948 1956
371fefd6 1957 err = -ENOMEM;
6b75e6bf 1958 vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
de56a948
PM
1959 if (!vcpu)
1960 goto out;
1961
1962 err = kvm_vcpu_init(vcpu, kvm, id);
1963 if (err)
1964 goto free_vcpu;
1965
1966 vcpu->arch.shared = &vcpu->arch.shregs;
5deb8e7a
AG
1967#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
1968 /*
1969 * The shared struct is never shared on HV,
1970 * so we can always use host endianness
1971 */
1972#ifdef __BIG_ENDIAN__
1973 vcpu->arch.shared_big_endian = true;
1974#else
1975 vcpu->arch.shared_big_endian = false;
1976#endif
1977#endif
de56a948
PM
1978 vcpu->arch.mmcr[0] = MMCR0_FC;
1979 vcpu->arch.ctrl = CTRL_RUNLATCH;
1980 /* default to host PVR, since we can't spoof it */
3a167bea 1981 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR));
2e25aa5f 1982 spin_lock_init(&vcpu->arch.vpa_update_lock);
c7b67670
PM
1983 spin_lock_init(&vcpu->arch.tbacct_lock);
1984 vcpu->arch.busy_preempt = TB_NIL;
d682916a 1985 vcpu->arch.intr_msr = MSR_SF | MSR_ME;
de56a948 1986
769377f7
PM
1987 /*
1988 * Set the default HFSCR for the guest from the host value.
1989 * This value is only used on POWER9.
1990 * On POWER9 DD1, TM doesn't work, so we make sure to
1991 * prevent the guest from using it.
57900694
PM
1992 * On POWER9, we want to virtualize the doorbell facility, so we
1993 * turn off the HFSCR bit, which causes those instructions to trap.
769377f7
PM
1994 */
1995 vcpu->arch.hfscr = mfspr(SPRN_HFSCR);
4bb3c7a0
PM
1996 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
1997 vcpu->arch.hfscr |= HFSCR_TM;
1998 else if (!cpu_has_feature(CPU_FTR_TM_COMP))
769377f7 1999 vcpu->arch.hfscr &= ~HFSCR_TM;
57900694
PM
2000 if (cpu_has_feature(CPU_FTR_ARCH_300))
2001 vcpu->arch.hfscr &= ~HFSCR_MSGP;
769377f7 2002
de56a948
PM
2003 kvmppc_mmu_book3s_hv_init(vcpu);
2004
8455d79e 2005 vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
371fefd6
PM
2006
2007 init_waitqueue_head(&vcpu->arch.cpu_run);
2008
2009 mutex_lock(&kvm->lock);
3c313524
PM
2010 vcore = NULL;
2011 err = -EINVAL;
2012 core = id / kvm->arch.smt_mode;
2013 if (core < KVM_MAX_VCORES) {
2014 vcore = kvm->arch.vcores[core];
2015 if (!vcore) {
2016 err = -ENOMEM;
2017 vcore = kvmppc_vcore_create(kvm, core);
2018 kvm->arch.vcores[core] = vcore;
2019 kvm->arch.online_vcores++;
2020 }
371fefd6
PM
2021 }
2022 mutex_unlock(&kvm->lock);
2023
2024 if (!vcore)
2025 goto free_vcpu;
2026
2027 spin_lock(&vcore->lock);
2028 ++vcore->num_threads;
371fefd6
PM
2029 spin_unlock(&vcore->lock);
2030 vcpu->arch.vcore = vcore;
e0b7ec05 2031 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid;
ec257165 2032 vcpu->arch.thread_cpu = -1;
a29ebeaf 2033 vcpu->arch.prev_cpu = -1;
371fefd6 2034
af8f38b3
AG
2035 vcpu->arch.cpu_type = KVM_CPU_3S_64;
2036 kvmppc_sanity_check(vcpu);
2037
b6c295df
PM
2038 debugfs_vcpu_init(vcpu, id);
2039
de56a948
PM
2040 return vcpu;
2041
2042free_vcpu:
6b75e6bf 2043 kmem_cache_free(kvm_vcpu_cache, vcpu);
de56a948
PM
2044out:
2045 return ERR_PTR(err);
2046}
2047
3c313524
PM
2048static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode,
2049 unsigned long flags)
2050{
2051 int err;
57900694 2052 int esmt = 0;
3c313524
PM
2053
2054 if (flags)
2055 return -EINVAL;
2056 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode))
2057 return -EINVAL;
2058 if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
2059 /*
2060 * On POWER8 (or POWER7), the threading mode is "strict",
2061 * so we pack smt_mode vcpus per vcore.
2062 */
2063 if (smt_mode > threads_per_subcore)
2064 return -EINVAL;
2065 } else {
2066 /*
2067 * On POWER9, the threading mode is "loose",
2068 * so each vcpu gets its own vcore.
2069 */
57900694 2070 esmt = smt_mode;
3c313524
PM
2071 smt_mode = 1;
2072 }
2073 mutex_lock(&kvm->lock);
2074 err = -EBUSY;
2075 if (!kvm->arch.online_vcores) {
2076 kvm->arch.smt_mode = smt_mode;
57900694 2077 kvm->arch.emul_smt_mode = esmt;
3c313524
PM
2078 err = 0;
2079 }
2080 mutex_unlock(&kvm->lock);
2081
2082 return err;
2083}
2084
c35635ef
PM
2085static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa)
2086{
2087 if (vpa->pinned_addr)
2088 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa,
2089 vpa->dirty);
2090}
2091
3a167bea 2092static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu)
de56a948 2093{
2e25aa5f 2094 spin_lock(&vcpu->arch.vpa_update_lock);
c35635ef
PM
2095 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl);
2096 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow);
2097 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa);
2e25aa5f 2098 spin_unlock(&vcpu->arch.vpa_update_lock);
de56a948 2099 kvm_vcpu_uninit(vcpu);
6b75e6bf 2100 kmem_cache_free(kvm_vcpu_cache, vcpu);
de56a948
PM
2101}
2102
3a167bea
AK
2103static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu)
2104{
2105 /* Indicate we want to get back into the guest */
2106 return 1;
2107}
2108
19ccb76a 2109static void kvmppc_set_timer(struct kvm_vcpu *vcpu)
371fefd6 2110{
19ccb76a 2111 unsigned long dec_nsec, now;
371fefd6 2112
19ccb76a
PM
2113 now = get_tb();
2114 if (now > vcpu->arch.dec_expires) {
2115 /* decrementer has already gone negative */
2116 kvmppc_core_queue_dec(vcpu);
7e28e60e 2117 kvmppc_core_prepare_to_enter(vcpu);
19ccb76a 2118 return;
371fefd6 2119 }
19ccb76a
PM
2120 dec_nsec = (vcpu->arch.dec_expires - now) * NSEC_PER_SEC
2121 / tb_ticks_per_sec;
8b0e1953 2122 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL);
19ccb76a 2123 vcpu->arch.timer_running = 1;
371fefd6
PM
2124}
2125
19ccb76a 2126static void kvmppc_end_cede(struct kvm_vcpu *vcpu)
371fefd6 2127{
19ccb76a
PM
2128 vcpu->arch.ceded = 0;
2129 if (vcpu->arch.timer_running) {
2130 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2131 vcpu->arch.timer_running = 0;
2132 }
371fefd6
PM
2133}
2134
8b24e69f 2135extern int __kvmppc_vcore_entry(void);
de56a948 2136
371fefd6
PM
2137static void kvmppc_remove_runnable(struct kvmppc_vcore *vc,
2138 struct kvm_vcpu *vcpu)
de56a948 2139{
c7b67670
PM
2140 u64 now;
2141
371fefd6
PM
2142 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
2143 return;
bf3d32e1 2144 spin_lock_irq(&vcpu->arch.tbacct_lock);
c7b67670
PM
2145 now = mftb();
2146 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) -
2147 vcpu->arch.stolen_logged;
2148 vcpu->arch.busy_preempt = now;
2149 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
bf3d32e1 2150 spin_unlock_irq(&vcpu->arch.tbacct_lock);
371fefd6 2151 --vc->n_runnable;
7b5f8272 2152 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL);
371fefd6
PM
2153}
2154
f0888f70
PM
2155static int kvmppc_grab_hwthread(int cpu)
2156{
2157 struct paca_struct *tpaca;
b754c739 2158 long timeout = 10000;
f0888f70
PM
2159
2160 tpaca = &paca[cpu];
2161
2162 /* Ensure the thread won't go into the kernel if it wakes */
7b444c67 2163 tpaca->kvm_hstate.kvm_vcpu = NULL;
b4deba5c 2164 tpaca->kvm_hstate.kvm_vcore = NULL;
5d5b99cd
PM
2165 tpaca->kvm_hstate.napping = 0;
2166 smp_wmb();
2167 tpaca->kvm_hstate.hwthread_req = 1;
f0888f70
PM
2168
2169 /*
2170 * If the thread is already executing in the kernel (e.g. handling
2171 * a stray interrupt), wait for it to get back to nap mode.
2172 * The smp_mb() is to ensure that our setting of hwthread_req
2173 * is visible before we look at hwthread_state, so if this
2174 * races with the code at system_reset_pSeries and the thread
2175 * misses our setting of hwthread_req, we are sure to see its
2176 * setting of hwthread_state, and vice versa.
2177 */
2178 smp_mb();
2179 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) {
2180 if (--timeout <= 0) {
2181 pr_err("KVM: couldn't grab cpu %d\n", cpu);
2182 return -EBUSY;
2183 }
2184 udelay(1);
2185 }
2186 return 0;
2187}
2188
2189static void kvmppc_release_hwthread(int cpu)
2190{
2191 struct paca_struct *tpaca;
2192
2193 tpaca = &paca[cpu];
31a4d448 2194 tpaca->kvm_hstate.hwthread_req = 0;
f0888f70 2195 tpaca->kvm_hstate.kvm_vcpu = NULL;
b4deba5c
PM
2196 tpaca->kvm_hstate.kvm_vcore = NULL;
2197 tpaca->kvm_hstate.kvm_split_mode = NULL;
f0888f70
PM
2198}
2199
a29ebeaf
PM
2200static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu)
2201{
2202 int i;
2203
2204 cpu = cpu_first_thread_sibling(cpu);
2205 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush);
2206 /*
2207 * Make sure setting of bit in need_tlb_flush precedes
2208 * testing of cpu_in_guest bits. The matching barrier on
2209 * the other side is the first smp_mb() in kvmppc_run_core().
2210 */
2211 smp_mb();
2212 for (i = 0; i < threads_per_core; ++i)
2213 if (cpumask_test_cpu(cpu + i, &kvm->arch.cpu_in_guest))
2214 smp_call_function_single(cpu + i, do_nothing, NULL, 1);
2215}
2216
8b24e69f
PM
2217static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu)
2218{
2219 struct kvm *kvm = vcpu->kvm;
2220
2221 /*
2222 * With radix, the guest can do TLB invalidations itself,
2223 * and it could choose to use the local form (tlbiel) if
2224 * it is invalidating a translation that has only ever been
2225 * used on one vcpu. However, that doesn't mean it has
2226 * only ever been used on one physical cpu, since vcpus
2227 * can move around between pcpus. To cope with this, when
2228 * a vcpu moves from one pcpu to another, we need to tell
2229 * any vcpus running on the same core as this vcpu previously
2230 * ran to flush the TLB. The TLB is shared between threads,
2231 * so we use a single bit in .need_tlb_flush for all 4 threads.
2232 */
2233 if (vcpu->arch.prev_cpu != pcpu) {
2234 if (vcpu->arch.prev_cpu >= 0 &&
2235 cpu_first_thread_sibling(vcpu->arch.prev_cpu) !=
2236 cpu_first_thread_sibling(pcpu))
2237 radix_flush_cpu(kvm, vcpu->arch.prev_cpu, vcpu);
2238 vcpu->arch.prev_cpu = pcpu;
2239 }
2240}
2241
b4deba5c 2242static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc)
371fefd6
PM
2243{
2244 int cpu;
2245 struct paca_struct *tpaca;
a29ebeaf 2246 struct kvm *kvm = vc->kvm;
371fefd6 2247
b4deba5c
PM
2248 cpu = vc->pcpu;
2249 if (vcpu) {
2250 if (vcpu->arch.timer_running) {
2251 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2252 vcpu->arch.timer_running = 0;
2253 }
2254 cpu += vcpu->arch.ptid;
898b25b2 2255 vcpu->cpu = vc->pcpu;
b4deba5c 2256 vcpu->arch.thread_cpu = cpu;
a29ebeaf 2257 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest);
19ccb76a 2258 }
371fefd6 2259 tpaca = &paca[cpu];
5d5b99cd 2260 tpaca->kvm_hstate.kvm_vcpu = vcpu;
898b25b2 2261 tpaca->kvm_hstate.ptid = cpu - vc->pcpu;
4bb3c7a0 2262 tpaca->kvm_hstate.fake_suspend = 0;
ec257165 2263 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */
371fefd6 2264 smp_wmb();
898b25b2 2265 tpaca->kvm_hstate.kvm_vcore = vc;
5d5b99cd 2266 if (cpu != smp_processor_id())
66feed61 2267 kvmppc_ipi_thread(cpu);
371fefd6 2268}
de56a948 2269
516f7898 2270static void kvmppc_wait_for_nap(int n_threads)
371fefd6 2271{
5d5b99cd
PM
2272 int cpu = smp_processor_id();
2273 int i, loops;
371fefd6 2274
45c940ba
PM
2275 if (n_threads <= 1)
2276 return;
5d5b99cd
PM
2277 for (loops = 0; loops < 1000000; ++loops) {
2278 /*
2279 * Check if all threads are finished.
b4deba5c 2280 * We set the vcore pointer when starting a thread
5d5b99cd 2281 * and the thread clears it when finished, so we look
b4deba5c 2282 * for any threads that still have a non-NULL vcore ptr.
5d5b99cd 2283 */
45c940ba 2284 for (i = 1; i < n_threads; ++i)
b4deba5c 2285 if (paca[cpu + i].kvm_hstate.kvm_vcore)
5d5b99cd 2286 break;
45c940ba 2287 if (i == n_threads) {
5d5b99cd
PM
2288 HMT_medium();
2289 return;
371fefd6 2290 }
5d5b99cd 2291 HMT_low();
371fefd6
PM
2292 }
2293 HMT_medium();
45c940ba 2294 for (i = 1; i < n_threads; ++i)
b4deba5c 2295 if (paca[cpu + i].kvm_hstate.kvm_vcore)
5d5b99cd 2296 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i);
371fefd6
PM
2297}
2298
2299/*
2300 * Check that we are on thread 0 and that any other threads in
7b444c67
PM
2301 * this core are off-line. Then grab the threads so they can't
2302 * enter the kernel.
371fefd6
PM
2303 */
2304static int on_primary_thread(void)
2305{
2306 int cpu = smp_processor_id();
3102f784 2307 int thr;
371fefd6 2308
3102f784
ME
2309 /* Are we on a primary subcore? */
2310 if (cpu_thread_in_subcore(cpu))
371fefd6 2311 return 0;
3102f784
ME
2312
2313 thr = 0;
2314 while (++thr < threads_per_subcore)
371fefd6
PM
2315 if (cpu_online(cpu + thr))
2316 return 0;
7b444c67
PM
2317
2318 /* Grab all hw threads so they can't go into the kernel */
3102f784 2319 for (thr = 1; thr < threads_per_subcore; ++thr) {
7b444c67
PM
2320 if (kvmppc_grab_hwthread(cpu + thr)) {
2321 /* Couldn't grab one; let the others go */
2322 do {
2323 kvmppc_release_hwthread(cpu + thr);
2324 } while (--thr > 0);
2325 return 0;
2326 }
2327 }
371fefd6
PM
2328 return 1;
2329}
2330
ec257165
PM
2331/*
2332 * A list of virtual cores for each physical CPU.
2333 * These are vcores that could run but their runner VCPU tasks are
2334 * (or may be) preempted.
2335 */
2336struct preempted_vcore_list {
2337 struct list_head list;
2338 spinlock_t lock;
2339};
2340
2341static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores);
2342
2343static void init_vcore_lists(void)
2344{
2345 int cpu;
2346
2347 for_each_possible_cpu(cpu) {
2348 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu);
2349 spin_lock_init(&lp->lock);
2350 INIT_LIST_HEAD(&lp->list);
2351 }
2352}
2353
2354static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc)
2355{
2356 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2357
2358 vc->vcore_state = VCORE_PREEMPT;
2359 vc->pcpu = smp_processor_id();
516f7898 2360 if (vc->num_threads < threads_per_vcore(vc->kvm)) {
ec257165
PM
2361 spin_lock(&lp->lock);
2362 list_add_tail(&vc->preempt_list, &lp->list);
2363 spin_unlock(&lp->lock);
2364 }
2365
2366 /* Start accumulating stolen time */
2367 kvmppc_core_start_stolen(vc);
2368}
2369
2370static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc)
2371{
402813fe 2372 struct preempted_vcore_list *lp;
ec257165
PM
2373
2374 kvmppc_core_end_stolen(vc);
2375 if (!list_empty(&vc->preempt_list)) {
402813fe 2376 lp = &per_cpu(preempted_vcores, vc->pcpu);
ec257165
PM
2377 spin_lock(&lp->lock);
2378 list_del_init(&vc->preempt_list);
2379 spin_unlock(&lp->lock);
2380 }
2381 vc->vcore_state = VCORE_INACTIVE;
2382}
2383
b4deba5c
PM
2384/*
2385 * This stores information about the virtual cores currently
2386 * assigned to a physical core.
2387 */
ec257165 2388struct core_info {
b4deba5c
PM
2389 int n_subcores;
2390 int max_subcore_threads;
ec257165 2391 int total_threads;
b4deba5c 2392 int subcore_threads[MAX_SUBCORES];
898b25b2 2393 struct kvmppc_vcore *vc[MAX_SUBCORES];
ec257165
PM
2394};
2395
b4deba5c
PM
2396/*
2397 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7
516f7898 2398 * respectively in 2-way micro-threading (split-core) mode on POWER8.
b4deba5c
PM
2399 */
2400static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 };
2401
ec257165
PM
2402static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc)
2403{
2404 memset(cip, 0, sizeof(*cip));
b4deba5c
PM
2405 cip->n_subcores = 1;
2406 cip->max_subcore_threads = vc->num_threads;
ec257165 2407 cip->total_threads = vc->num_threads;
b4deba5c 2408 cip->subcore_threads[0] = vc->num_threads;
898b25b2 2409 cip->vc[0] = vc;
b4deba5c
PM
2410}
2411
2412static bool subcore_config_ok(int n_subcores, int n_threads)
2413{
516f7898 2414 /*
00608e1f
PM
2415 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way
2416 * split-core mode, with one thread per subcore.
516f7898
PM
2417 */
2418 if (cpu_has_feature(CPU_FTR_ARCH_300))
2419 return n_subcores <= 4 && n_threads == 1;
2420
2421 /* On POWER8, can only dynamically split if unsplit to begin with */
b4deba5c
PM
2422 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS)
2423 return false;
2424 if (n_subcores > MAX_SUBCORES)
2425 return false;
2426 if (n_subcores > 1) {
2427 if (!(dynamic_mt_modes & 2))
2428 n_subcores = 4;
2429 if (n_subcores > 2 && !(dynamic_mt_modes & 4))
2430 return false;
2431 }
2432
2433 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS;
ec257165
PM
2434}
2435
898b25b2 2436static void init_vcore_to_run(struct kvmppc_vcore *vc)
ec257165 2437{
ec257165
PM
2438 vc->entry_exit_map = 0;
2439 vc->in_guest = 0;
2440 vc->napping_threads = 0;
2441 vc->conferring_threads = 0;
2442}
2443
b4deba5c
PM
2444static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip)
2445{
2446 int n_threads = vc->num_threads;
2447 int sub;
2448
2449 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
2450 return false;
2451
00608e1f
PM
2452 /* Some POWER9 chips require all threads to be in the same MMU mode */
2453 if (no_mixing_hpt_and_radix &&
c0101509
PM
2454 kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm))
2455 return false;
2456
b4deba5c
PM
2457 if (n_threads < cip->max_subcore_threads)
2458 n_threads = cip->max_subcore_threads;
b009031f 2459 if (!subcore_config_ok(cip->n_subcores + 1, n_threads))
b4deba5c 2460 return false;
b009031f 2461 cip->max_subcore_threads = n_threads;
b4deba5c
PM
2462
2463 sub = cip->n_subcores;
2464 ++cip->n_subcores;
2465 cip->total_threads += vc->num_threads;
2466 cip->subcore_threads[sub] = vc->num_threads;
898b25b2
PM
2467 cip->vc[sub] = vc;
2468 init_vcore_to_run(vc);
2469 list_del_init(&vc->preempt_list);
b4deba5c
PM
2470
2471 return true;
2472}
2473
b4deba5c
PM
2474/*
2475 * Work out whether it is possible to piggyback the execution of
2476 * vcore *pvc onto the execution of the other vcores described in *cip.
2477 */
2478static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip,
2479 int target_threads)
2480{
b4deba5c
PM
2481 if (cip->total_threads + pvc->num_threads > target_threads)
2482 return false;
b4deba5c 2483
b009031f 2484 return can_dynamic_split(pvc, cip);
b4deba5c
PM
2485}
2486
d911f0be
PM
2487static void prepare_threads(struct kvmppc_vcore *vc)
2488{
7b5f8272
SJS
2489 int i;
2490 struct kvm_vcpu *vcpu;
d911f0be 2491
7b5f8272 2492 for_each_runnable_thread(i, vcpu, vc) {
d911f0be
PM
2493 if (signal_pending(vcpu->arch.run_task))
2494 vcpu->arch.ret = -EINTR;
2495 else if (vcpu->arch.vpa.update_pending ||
2496 vcpu->arch.slb_shadow.update_pending ||
2497 vcpu->arch.dtl.update_pending)
2498 vcpu->arch.ret = RESUME_GUEST;
2499 else
2500 continue;
2501 kvmppc_remove_runnable(vc, vcpu);
2502 wake_up(&vcpu->arch.cpu_run);
2503 }
2504}
2505
ec257165
PM
2506static void collect_piggybacks(struct core_info *cip, int target_threads)
2507{
2508 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2509 struct kvmppc_vcore *pvc, *vcnext;
2510
2511 spin_lock(&lp->lock);
2512 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) {
2513 if (!spin_trylock(&pvc->lock))
2514 continue;
2515 prepare_threads(pvc);
2516 if (!pvc->n_runnable) {
2517 list_del_init(&pvc->preempt_list);
2518 if (pvc->runner == NULL) {
2519 pvc->vcore_state = VCORE_INACTIVE;
2520 kvmppc_core_end_stolen(pvc);
2521 }
2522 spin_unlock(&pvc->lock);
2523 continue;
2524 }
2525 if (!can_piggyback(pvc, cip, target_threads)) {
2526 spin_unlock(&pvc->lock);
2527 continue;
2528 }
2529 kvmppc_core_end_stolen(pvc);
2530 pvc->vcore_state = VCORE_PIGGYBACK;
2531 if (cip->total_threads >= target_threads)
2532 break;
2533 }
2534 spin_unlock(&lp->lock);
2535}
2536
8b24e69f
PM
2537static bool recheck_signals(struct core_info *cip)
2538{
2539 int sub, i;
2540 struct kvm_vcpu *vcpu;
2541
2542 for (sub = 0; sub < cip->n_subcores; ++sub)
2543 for_each_runnable_thread(i, vcpu, cip->vc[sub])
2544 if (signal_pending(vcpu->arch.run_task))
2545 return true;
2546 return false;
2547}
2548
ec257165 2549static void post_guest_process(struct kvmppc_vcore *vc, bool is_master)
25fedfca 2550{
7b5f8272 2551 int still_running = 0, i;
25fedfca
PM
2552 u64 now;
2553 long ret;
7b5f8272 2554 struct kvm_vcpu *vcpu;
25fedfca 2555
ec257165 2556 spin_lock(&vc->lock);
25fedfca 2557 now = get_tb();
7b5f8272 2558 for_each_runnable_thread(i, vcpu, vc) {
25fedfca
PM
2559 /* cancel pending dec exception if dec is positive */
2560 if (now < vcpu->arch.dec_expires &&
2561 kvmppc_core_pending_dec(vcpu))
2562 kvmppc_core_dequeue_dec(vcpu);
2563
2564 trace_kvm_guest_exit(vcpu);
2565
2566 ret = RESUME_GUEST;
2567 if (vcpu->arch.trap)
2568 ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu,
2569 vcpu->arch.run_task);
2570
2571 vcpu->arch.ret = ret;
2572 vcpu->arch.trap = 0;
2573
ec257165
PM
2574 if (is_kvmppc_resume_guest(vcpu->arch.ret)) {
2575 if (vcpu->arch.pending_exceptions)
2576 kvmppc_core_prepare_to_enter(vcpu);
2577 if (vcpu->arch.ceded)
25fedfca 2578 kvmppc_set_timer(vcpu);
ec257165
PM
2579 else
2580 ++still_running;
2581 } else {
25fedfca
PM
2582 kvmppc_remove_runnable(vc, vcpu);
2583 wake_up(&vcpu->arch.cpu_run);
2584 }
2585 }
ec257165 2586 if (!is_master) {
563a1e93 2587 if (still_running > 0) {
ec257165 2588 kvmppc_vcore_preempt(vc);
563a1e93
PM
2589 } else if (vc->runner) {
2590 vc->vcore_state = VCORE_PREEMPT;
2591 kvmppc_core_start_stolen(vc);
2592 } else {
2593 vc->vcore_state = VCORE_INACTIVE;
2594 }
ec257165
PM
2595 if (vc->n_runnable > 0 && vc->runner == NULL) {
2596 /* make sure there's a candidate runner awake */
7b5f8272
SJS
2597 i = -1;
2598 vcpu = next_runnable_thread(vc, &i);
ec257165
PM
2599 wake_up(&vcpu->arch.cpu_run);
2600 }
2601 }
2602 spin_unlock(&vc->lock);
25fedfca
PM
2603}
2604
b8e6a87c
SW
2605/*
2606 * Clear core from the list of active host cores as we are about to
2607 * enter the guest. Only do this if it is the primary thread of the
2608 * core (not if a subcore) that is entering the guest.
2609 */
3f7cd919 2610static inline int kvmppc_clear_host_core(unsigned int cpu)
b8e6a87c
SW
2611{
2612 int core;
2613
2614 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
3f7cd919 2615 return 0;
b8e6a87c
SW
2616 /*
2617 * Memory barrier can be omitted here as we will do a smp_wmb()
2618 * later in kvmppc_start_thread and we need ensure that state is
2619 * visible to other CPUs only after we enter guest.
2620 */
2621 core = cpu >> threads_shift;
2622 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0;
3f7cd919 2623 return 0;
b8e6a87c
SW
2624}
2625
2626/*
2627 * Advertise this core as an active host core since we exited the guest
2628 * Only need to do this if it is the primary thread of the core that is
2629 * exiting.
2630 */
3f7cd919 2631static inline int kvmppc_set_host_core(unsigned int cpu)
b8e6a87c
SW
2632{
2633 int core;
2634
2635 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
3f7cd919 2636 return 0;
b8e6a87c
SW
2637
2638 /*
2639 * Memory barrier can be omitted here because we do a spin_unlock
2640 * immediately after this which provides the memory barrier.
2641 */
2642 core = cpu >> threads_shift;
2643 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1;
3f7cd919 2644 return 0;
b8e6a87c
SW
2645}
2646
8b24e69f
PM
2647static void set_irq_happened(int trap)
2648{
2649 switch (trap) {
2650 case BOOK3S_INTERRUPT_EXTERNAL:
2651 local_paca->irq_happened |= PACA_IRQ_EE;
2652 break;
2653 case BOOK3S_INTERRUPT_H_DOORBELL:
2654 local_paca->irq_happened |= PACA_IRQ_DBELL;
2655 break;
2656 case BOOK3S_INTERRUPT_HMI:
2657 local_paca->irq_happened |= PACA_IRQ_HMI;
2658 break;
6de6638b
NP
2659 case BOOK3S_INTERRUPT_SYSTEM_RESET:
2660 replay_system_reset();
2661 break;
8b24e69f
PM
2662 }
2663}
2664
371fefd6
PM
2665/*
2666 * Run a set of guest threads on a physical core.
2667 * Called with vc->lock held.
2668 */
66feed61 2669static noinline void kvmppc_run_core(struct kvmppc_vcore *vc)
371fefd6 2670{
7b5f8272 2671 struct kvm_vcpu *vcpu;
d911f0be 2672 int i;
2c9097e4 2673 int srcu_idx;
ec257165 2674 struct core_info core_info;
898b25b2 2675 struct kvmppc_vcore *pvc;
b4deba5c
PM
2676 struct kvm_split_mode split_info, *sip;
2677 int split, subcore_size, active;
2678 int sub;
2679 bool thr0_done;
2680 unsigned long cmd_bit, stat_bit;
ec257165
PM
2681 int pcpu, thr;
2682 int target_threads;
45c940ba 2683 int controlled_threads;
8b24e69f 2684 int trap;
516f7898 2685 bool is_power8;
c0101509 2686 bool hpt_on_radix;
371fefd6 2687
d911f0be
PM
2688 /*
2689 * Remove from the list any threads that have a signal pending
2690 * or need a VPA update done
2691 */
2692 prepare_threads(vc);
2693
2694 /* if the runner is no longer runnable, let the caller pick a new one */
2695 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE)
2696 return;
081f323b
PM
2697
2698 /*
d911f0be 2699 * Initialize *vc.
081f323b 2700 */
898b25b2 2701 init_vcore_to_run(vc);
2711e248 2702 vc->preempt_tb = TB_NIL;
081f323b 2703
45c940ba
PM
2704 /*
2705 * Number of threads that we will be controlling: the same as
2706 * the number of threads per subcore, except on POWER9,
2707 * where it's 1 because the threads are (mostly) independent.
2708 */
516f7898 2709 controlled_threads = threads_per_vcore(vc->kvm);
45c940ba 2710
7b444c67 2711 /*
3102f784
ME
2712 * Make sure we are running on primary threads, and that secondary
2713 * threads are offline. Also check if the number of threads in this
2714 * guest are greater than the current system threads per guest.
c0101509 2715 * On POWER9, we need to be not in independent-threads mode if
00608e1f
PM
2716 * this is a HPT guest on a radix host machine where the
2717 * CPU threads may not be in different MMU modes.
7b444c67 2718 */
00608e1f
PM
2719 hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() &&
2720 !kvm_is_radix(vc->kvm);
c0101509
PM
2721 if (((controlled_threads > 1) &&
2722 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) ||
2723 (hpt_on_radix && vc->kvm->arch.threads_indep)) {
7b5f8272 2724 for_each_runnable_thread(i, vcpu, vc) {
7b444c67 2725 vcpu->arch.ret = -EBUSY;
25fedfca
PM
2726 kvmppc_remove_runnable(vc, vcpu);
2727 wake_up(&vcpu->arch.cpu_run);
2728 }
7b444c67
PM
2729 goto out;
2730 }
2731
ec257165
PM
2732 /*
2733 * See if we could run any other vcores on the physical core
2734 * along with this one.
2735 */
2736 init_core_info(&core_info, vc);
2737 pcpu = smp_processor_id();
45c940ba 2738 target_threads = controlled_threads;
ec257165
PM
2739 if (target_smt_mode && target_smt_mode < target_threads)
2740 target_threads = target_smt_mode;
2741 if (vc->num_threads < target_threads)
2742 collect_piggybacks(&core_info, target_threads);
3102f784 2743
8b24e69f
PM
2744 /*
2745 * On radix, arrange for TLB flushing if necessary.
2746 * This has to be done before disabling interrupts since
2747 * it uses smp_call_function().
2748 */
2749 pcpu = smp_processor_id();
2750 if (kvm_is_radix(vc->kvm)) {
2751 for (sub = 0; sub < core_info.n_subcores; ++sub)
2752 for_each_runnable_thread(i, vcpu, core_info.vc[sub])
2753 kvmppc_prepare_radix_vcpu(vcpu, pcpu);
2754 }
2755
2756 /*
2757 * Hard-disable interrupts, and check resched flag and signals.
2758 * If we need to reschedule or deliver a signal, clean up
2759 * and return without going into the guest(s).
072df813 2760 * If the mmu_ready flag has been cleared, don't go into the
38c53af8 2761 * guest because that means a HPT resize operation is in progress.
8b24e69f
PM
2762 */
2763 local_irq_disable();
2764 hard_irq_disable();
2765 if (lazy_irq_pending() || need_resched() ||
072df813 2766 recheck_signals(&core_info) || !vc->kvm->arch.mmu_ready) {
8b24e69f
PM
2767 local_irq_enable();
2768 vc->vcore_state = VCORE_INACTIVE;
2769 /* Unlock all except the primary vcore */
2770 for (sub = 1; sub < core_info.n_subcores; ++sub) {
2771 pvc = core_info.vc[sub];
2772 /* Put back on to the preempted vcores list */
2773 kvmppc_vcore_preempt(pvc);
2774 spin_unlock(&pvc->lock);
2775 }
2776 for (i = 0; i < controlled_threads; ++i)
2777 kvmppc_release_hwthread(pcpu + i);
2778 return;
2779 }
2780
2781 kvmppc_clear_host_core(pcpu);
2782
b4deba5c
PM
2783 /* Decide on micro-threading (split-core) mode */
2784 subcore_size = threads_per_subcore;
2785 cmd_bit = stat_bit = 0;
2786 split = core_info.n_subcores;
2787 sip = NULL;
516f7898
PM
2788 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S)
2789 && !cpu_has_feature(CPU_FTR_ARCH_300);
2790
c0101509 2791 if (split > 1 || hpt_on_radix) {
b4deba5c
PM
2792 sip = &split_info;
2793 memset(&split_info, 0, sizeof(split_info));
b4deba5c 2794 for (sub = 0; sub < core_info.n_subcores; ++sub)
898b25b2 2795 split_info.vc[sub] = core_info.vc[sub];
516f7898
PM
2796
2797 if (is_power8) {
2798 if (split == 2 && (dynamic_mt_modes & 2)) {
2799 cmd_bit = HID0_POWER8_1TO2LPAR;
2800 stat_bit = HID0_POWER8_2LPARMODE;
2801 } else {
2802 split = 4;
2803 cmd_bit = HID0_POWER8_1TO4LPAR;
2804 stat_bit = HID0_POWER8_4LPARMODE;
2805 }
2806 subcore_size = MAX_SMT_THREADS / split;
2807 split_info.rpr = mfspr(SPRN_RPR);
2808 split_info.pmmar = mfspr(SPRN_PMMAR);
2809 split_info.ldbar = mfspr(SPRN_LDBAR);
2810 split_info.subcore_size = subcore_size;
2811 } else {
2812 split_info.subcore_size = 1;
c0101509
PM
2813 if (hpt_on_radix) {
2814 /* Use the split_info for LPCR/LPIDR changes */
2815 split_info.lpcr_req = vc->lpcr;
2816 split_info.lpidr_req = vc->kvm->arch.lpid;
2817 split_info.host_lpcr = vc->kvm->arch.host_lpcr;
2818 split_info.do_set = 1;
2819 }
516f7898
PM
2820 }
2821
b4deba5c
PM
2822 /* order writes to split_info before kvm_split_mode pointer */
2823 smp_wmb();
2824 }
c0101509
PM
2825
2826 for (thr = 0; thr < controlled_threads; ++thr) {
2827 paca[pcpu + thr].kvm_hstate.tid = thr;
2828 paca[pcpu + thr].kvm_hstate.napping = 0;
b4deba5c 2829 paca[pcpu + thr].kvm_hstate.kvm_split_mode = sip;
c0101509 2830 }
b4deba5c 2831
516f7898 2832 /* Initiate micro-threading (split-core) on POWER8 if required */
b4deba5c
PM
2833 if (cmd_bit) {
2834 unsigned long hid0 = mfspr(SPRN_HID0);
2835
2836 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS;
2837 mb();
2838 mtspr(SPRN_HID0, hid0);
2839 isync();
2840 for (;;) {
2841 hid0 = mfspr(SPRN_HID0);
2842 if (hid0 & stat_bit)
2843 break;
2844 cpu_relax();
ec257165 2845 }
2e25aa5f 2846 }
3102f784 2847
b4deba5c
PM
2848 /* Start all the threads */
2849 active = 0;
2850 for (sub = 0; sub < core_info.n_subcores; ++sub) {
516f7898 2851 thr = is_power8 ? subcore_thread_map[sub] : sub;
b4deba5c
PM
2852 thr0_done = false;
2853 active |= 1 << thr;
898b25b2
PM
2854 pvc = core_info.vc[sub];
2855 pvc->pcpu = pcpu + thr;
2856 for_each_runnable_thread(i, vcpu, pvc) {
2857 kvmppc_start_thread(vcpu, pvc);
2858 kvmppc_create_dtl_entry(vcpu, pvc);
2859 trace_kvm_guest_enter(vcpu);
2860 if (!vcpu->arch.ptid)
2861 thr0_done = true;
2862 active |= 1 << (thr + vcpu->arch.ptid);
b4deba5c 2863 }
898b25b2
PM
2864 /*
2865 * We need to start the first thread of each subcore
2866 * even if it doesn't have a vcpu.
2867 */
2868 if (!thr0_done)
2869 kvmppc_start_thread(NULL, pvc);
2e25aa5f 2870 }
371fefd6 2871
7f235328
GS
2872 /*
2873 * Ensure that split_info.do_nap is set after setting
2874 * the vcore pointer in the PACA of the secondaries.
2875 */
2876 smp_mb();
7f235328 2877
b4deba5c
PM
2878 /*
2879 * When doing micro-threading, poke the inactive threads as well.
2880 * This gets them to the nap instruction after kvm_do_nap,
2881 * which reduces the time taken to unsplit later.
c0101509
PM
2882 * For POWER9 HPT guest on radix host, we need all the secondary
2883 * threads woken up so they can do the LPCR/LPIDR change.
b4deba5c 2884 */
c0101509 2885 if (cmd_bit || hpt_on_radix) {
516f7898 2886 split_info.do_nap = 1; /* ask secondaries to nap when done */
b4deba5c
PM
2887 for (thr = 1; thr < threads_per_subcore; ++thr)
2888 if (!(active & (1 << thr)))
2889 kvmppc_ipi_thread(pcpu + thr);
516f7898 2890 }
e0b7ec05 2891
2f12f034 2892 vc->vcore_state = VCORE_RUNNING;
19ccb76a 2893 preempt_disable();
3c78f78a
SW
2894
2895 trace_kvmppc_run_core(vc, 0);
2896
b4deba5c 2897 for (sub = 0; sub < core_info.n_subcores; ++sub)
898b25b2 2898 spin_unlock(&core_info.vc[sub]->lock);
de56a948 2899
8b24e69f
PM
2900 /*
2901 * Interrupts will be enabled once we get into the guest,
2902 * so tell lockdep that we're about to enable interrupts.
2903 */
2904 trace_hardirqs_on();
de56a948 2905
6edaa530 2906 guest_enter();
2c9097e4 2907
e0b7ec05 2908 srcu_idx = srcu_read_lock(&vc->kvm->srcu);
2c9097e4 2909
8b24e69f 2910 trap = __kvmppc_vcore_entry();
de56a948 2911
ec257165
PM
2912 srcu_read_unlock(&vc->kvm->srcu, srcu_idx);
2913
8b24e69f
PM
2914 guest_exit();
2915
2916 trace_hardirqs_off();
2917 set_irq_happened(trap);
2918
ec257165 2919 spin_lock(&vc->lock);
371fefd6 2920 /* prevent other vcpu threads from doing kvmppc_start_thread() now */
19ccb76a 2921 vc->vcore_state = VCORE_EXITING;
371fefd6 2922
19ccb76a 2923 /* wait for secondary threads to finish writing their state to memory */
516f7898 2924 kvmppc_wait_for_nap(controlled_threads);
b4deba5c
PM
2925
2926 /* Return to whole-core mode if we split the core earlier */
516f7898 2927 if (cmd_bit) {
b4deba5c
PM
2928 unsigned long hid0 = mfspr(SPRN_HID0);
2929 unsigned long loops = 0;
2930
2931 hid0 &= ~HID0_POWER8_DYNLPARDIS;
2932 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE;
2933 mb();
2934 mtspr(SPRN_HID0, hid0);
2935 isync();
2936 for (;;) {
2937 hid0 = mfspr(SPRN_HID0);
2938 if (!(hid0 & stat_bit))
2939 break;
2940 cpu_relax();
2941 ++loops;
2942 }
c0101509
PM
2943 } else if (hpt_on_radix) {
2944 /* Wait for all threads to have seen final sync */
2945 for (thr = 1; thr < controlled_threads; ++thr) {
2946 while (paca[pcpu + thr].kvm_hstate.kvm_split_mode) {
2947 HMT_low();
2948 barrier();
2949 }
2950 HMT_medium();
2951 }
b4deba5c 2952 }
c0101509 2953 split_info.do_nap = 0;
b4deba5c 2954
8b24e69f
PM
2955 kvmppc_set_host_core(pcpu);
2956
2957 local_irq_enable();
2958
b4deba5c 2959 /* Let secondaries go back to the offline loop */
45c940ba 2960 for (i = 0; i < controlled_threads; ++i) {
b4deba5c
PM
2961 kvmppc_release_hwthread(pcpu + i);
2962 if (sip && sip->napped[i])
2963 kvmppc_ipi_thread(pcpu + i);
a29ebeaf 2964 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest);
b4deba5c
PM
2965 }
2966
371fefd6 2967 spin_unlock(&vc->lock);
2c9097e4 2968
371fefd6
PM
2969 /* make sure updates to secondary vcpu structs are visible now */
2970 smp_mb();
de56a948 2971
36ee41d1
PM
2972 preempt_enable();
2973
898b25b2
PM
2974 for (sub = 0; sub < core_info.n_subcores; ++sub) {
2975 pvc = core_info.vc[sub];
2976 post_guest_process(pvc, pvc == vc);
2977 }
de56a948 2978
913d3ff9 2979 spin_lock(&vc->lock);
de56a948
PM
2980
2981 out:
19ccb76a 2982 vc->vcore_state = VCORE_INACTIVE;
3c78f78a 2983 trace_kvmppc_run_core(vc, 1);
371fefd6
PM
2984}
2985
19ccb76a
PM
2986/*
2987 * Wait for some other vcpu thread to execute us, and
2988 * wake us up when we need to handle something in the host.
2989 */
ec257165
PM
2990static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc,
2991 struct kvm_vcpu *vcpu, int wait_state)
371fefd6 2992{
371fefd6
PM
2993 DEFINE_WAIT(wait);
2994
19ccb76a 2995 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state);
ec257165
PM
2996 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
2997 spin_unlock(&vc->lock);
19ccb76a 2998 schedule();
ec257165
PM
2999 spin_lock(&vc->lock);
3000 }
19ccb76a
PM
3001 finish_wait(&vcpu->arch.cpu_run, &wait);
3002}
3003
0cda69dd
SJS
3004static void grow_halt_poll_ns(struct kvmppc_vcore *vc)
3005{
3006 /* 10us base */
3007 if (vc->halt_poll_ns == 0 && halt_poll_ns_grow)
3008 vc->halt_poll_ns = 10000;
3009 else
3010 vc->halt_poll_ns *= halt_poll_ns_grow;
0cda69dd
SJS
3011}
3012
3013static void shrink_halt_poll_ns(struct kvmppc_vcore *vc)
3014{
3015 if (halt_poll_ns_shrink == 0)
3016 vc->halt_poll_ns = 0;
3017 else
3018 vc->halt_poll_ns /= halt_poll_ns_shrink;
3019}
3020
ee3308a2
PM
3021#ifdef CONFIG_KVM_XICS
3022static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3023{
3024 if (!xive_enabled())
3025 return false;
2267ea76 3026 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr <
ee3308a2
PM
3027 vcpu->arch.xive_saved_state.cppr;
3028}
3029#else
3030static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3031{
3032 return false;
3033}
3034#endif /* CONFIG_KVM_XICS */
3035
1da4e2f4
PM
3036static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu)
3037{
3038 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded ||
ee3308a2 3039 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu))
1da4e2f4
PM
3040 return true;
3041
3042 return false;
3043}
3044
908a0935
SJS
3045/*
3046 * Check to see if any of the runnable vcpus on the vcore have pending
0cda69dd
SJS
3047 * exceptions or are no longer ceded
3048 */
3049static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc)
3050{
3051 struct kvm_vcpu *vcpu;
3052 int i;
3053
3054 for_each_runnable_thread(i, vcpu, vc) {
1da4e2f4 3055 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu))
0cda69dd
SJS
3056 return 1;
3057 }
3058
3059 return 0;
3060}
3061
19ccb76a
PM
3062/*
3063 * All the vcpus in this vcore are idle, so wait for a decrementer
3064 * or external interrupt to one of the vcpus. vc->lock is held.
3065 */
3066static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc)
3067{
2a27f514 3068 ktime_t cur, start_poll, start_wait;
0cda69dd 3069 int do_sleep = 1;
0cda69dd 3070 u64 block_ns;
8577370f 3071 DECLARE_SWAITQUEUE(wait);
1bc5d59c 3072
0cda69dd 3073 /* Poll for pending exceptions and ceded state */
2a27f514 3074 cur = start_poll = ktime_get();
0cda69dd 3075 if (vc->halt_poll_ns) {
2a27f514
SJS
3076 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns);
3077 ++vc->runner->stat.halt_attempted_poll;
1bc5d59c 3078
0cda69dd
SJS
3079 vc->vcore_state = VCORE_POLLING;
3080 spin_unlock(&vc->lock);
3081
3082 do {
3083 if (kvmppc_vcore_check_block(vc)) {
3084 do_sleep = 0;
3085 break;
3086 }
3087 cur = ktime_get();
3088 } while (single_task_running() && ktime_before(cur, stop));
3089
3090 spin_lock(&vc->lock);
3091 vc->vcore_state = VCORE_INACTIVE;
3092
2a27f514
SJS
3093 if (!do_sleep) {
3094 ++vc->runner->stat.halt_successful_poll;
0cda69dd 3095 goto out;
2a27f514 3096 }
1bc5d59c
SW
3097 }
3098
0cda69dd
SJS
3099 prepare_to_swait(&vc->wq, &wait, TASK_INTERRUPTIBLE);
3100
3101 if (kvmppc_vcore_check_block(vc)) {
8577370f 3102 finish_swait(&vc->wq, &wait);
0cda69dd 3103 do_sleep = 0;
2a27f514
SJS
3104 /* If we polled, count this as a successful poll */
3105 if (vc->halt_poll_ns)
3106 ++vc->runner->stat.halt_successful_poll;
0cda69dd 3107 goto out;
1bc5d59c
SW
3108 }
3109
2a27f514
SJS
3110 start_wait = ktime_get();
3111
19ccb76a 3112 vc->vcore_state = VCORE_SLEEPING;
3c78f78a 3113 trace_kvmppc_vcore_blocked(vc, 0);
19ccb76a 3114 spin_unlock(&vc->lock);
913d3ff9 3115 schedule();
8577370f 3116 finish_swait(&vc->wq, &wait);
19ccb76a
PM
3117 spin_lock(&vc->lock);
3118 vc->vcore_state = VCORE_INACTIVE;
3c78f78a 3119 trace_kvmppc_vcore_blocked(vc, 1);
2a27f514 3120 ++vc->runner->stat.halt_successful_wait;
0cda69dd
SJS
3121
3122 cur = ktime_get();
3123
3124out:
2a27f514
SJS
3125 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll);
3126
3127 /* Attribute wait time */
3128 if (do_sleep) {
3129 vc->runner->stat.halt_wait_ns +=
3130 ktime_to_ns(cur) - ktime_to_ns(start_wait);
3131 /* Attribute failed poll time */
3132 if (vc->halt_poll_ns)
3133 vc->runner->stat.halt_poll_fail_ns +=
3134 ktime_to_ns(start_wait) -
3135 ktime_to_ns(start_poll);
3136 } else {
3137 /* Attribute successful poll time */
3138 if (vc->halt_poll_ns)
3139 vc->runner->stat.halt_poll_success_ns +=
3140 ktime_to_ns(cur) -
3141 ktime_to_ns(start_poll);
3142 }
0cda69dd
SJS
3143
3144 /* Adjust poll time */
307d93e4 3145 if (halt_poll_ns) {
0cda69dd
SJS
3146 if (block_ns <= vc->halt_poll_ns)
3147 ;
3148 /* We slept and blocked for longer than the max halt time */
307d93e4 3149 else if (vc->halt_poll_ns && block_ns > halt_poll_ns)
0cda69dd
SJS
3150 shrink_halt_poll_ns(vc);
3151 /* We slept and our poll time is too small */
307d93e4
SJS
3152 else if (vc->halt_poll_ns < halt_poll_ns &&
3153 block_ns < halt_poll_ns)
0cda69dd 3154 grow_halt_poll_ns(vc);
e03f3921
SJS
3155 if (vc->halt_poll_ns > halt_poll_ns)
3156 vc->halt_poll_ns = halt_poll_ns;
0cda69dd
SJS
3157 } else
3158 vc->halt_poll_ns = 0;
3159
3160 trace_kvmppc_vcore_wakeup(do_sleep, block_ns);
19ccb76a 3161}
371fefd6 3162
432953b4
PM
3163static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu)
3164{
3165 int r = 0;
3166 struct kvm *kvm = vcpu->kvm;
3167
3168 mutex_lock(&kvm->lock);
3169 if (!kvm->arch.mmu_ready) {
3170 if (!kvm_is_radix(kvm))
3171 r = kvmppc_hv_setup_htab_rma(vcpu);
3172 if (!r) {
3173 if (cpu_has_feature(CPU_FTR_ARCH_300))
3174 kvmppc_setup_partition_table(kvm);
3175 kvm->arch.mmu_ready = 1;
3176 }
3177 }
3178 mutex_unlock(&kvm->lock);
3179 return r;
3180}
3181
19ccb76a
PM
3182static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
3183{
38c53af8 3184 int n_ceded, i, r;
19ccb76a 3185 struct kvmppc_vcore *vc;
7b5f8272 3186 struct kvm_vcpu *v;
9e368f29 3187
3c78f78a
SW
3188 trace_kvmppc_run_vcpu_enter(vcpu);
3189
371fefd6
PM
3190 kvm_run->exit_reason = 0;
3191 vcpu->arch.ret = RESUME_GUEST;
3192 vcpu->arch.trap = 0;
2f12f034 3193 kvmppc_update_vpas(vcpu);
371fefd6 3194
371fefd6
PM
3195 /*
3196 * Synchronize with other threads in this virtual core
3197 */
3198 vc = vcpu->arch.vcore;
3199 spin_lock(&vc->lock);
19ccb76a 3200 vcpu->arch.ceded = 0;
371fefd6
PM
3201 vcpu->arch.run_task = current;
3202 vcpu->arch.kvm_run = kvm_run;
c7b67670 3203 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb());
19ccb76a 3204 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE;
c7b67670 3205 vcpu->arch.busy_preempt = TB_NIL;
7b5f8272 3206 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu);
371fefd6
PM
3207 ++vc->n_runnable;
3208
19ccb76a
PM
3209 /*
3210 * This happens the first time this is called for a vcpu.
3211 * If the vcore is already running, we may be able to start
3212 * this thread straight away and have it join in.
3213 */
8455d79e 3214 if (!signal_pending(current)) {
c0093f1a
PM
3215 if ((vc->vcore_state == VCORE_PIGGYBACK ||
3216 vc->vcore_state == VCORE_RUNNING) &&
ec257165 3217 !VCORE_IS_EXITING(vc)) {
2f12f034 3218 kvmppc_create_dtl_entry(vcpu, vc);
b4deba5c 3219 kvmppc_start_thread(vcpu, vc);
3c78f78a 3220 trace_kvm_guest_enter(vcpu);
8455d79e 3221 } else if (vc->vcore_state == VCORE_SLEEPING) {
8577370f 3222 swake_up(&vc->wq);
371fefd6
PM
3223 }
3224
8455d79e 3225 }
371fefd6 3226
19ccb76a
PM
3227 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
3228 !signal_pending(current)) {
072df813
PM
3229 /* See if the MMU is ready to go */
3230 if (!vcpu->kvm->arch.mmu_ready) {
38c53af8 3231 spin_unlock(&vc->lock);
432953b4 3232 r = kvmhv_setup_mmu(vcpu);
38c53af8
PM
3233 spin_lock(&vc->lock);
3234 if (r) {
3235 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
432953b4
PM
3236 kvm_run->fail_entry.
3237 hardware_entry_failure_reason = 0;
38c53af8
PM
3238 vcpu->arch.ret = r;
3239 break;
3240 }
3241 }
3242
ec257165
PM
3243 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
3244 kvmppc_vcore_end_preempt(vc);
3245
8455d79e 3246 if (vc->vcore_state != VCORE_INACTIVE) {
ec257165 3247 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE);
19ccb76a
PM
3248 continue;
3249 }
7b5f8272 3250 for_each_runnable_thread(i, v, vc) {
7e28e60e 3251 kvmppc_core_prepare_to_enter(v);
19ccb76a
PM
3252 if (signal_pending(v->arch.run_task)) {
3253 kvmppc_remove_runnable(vc, v);
3254 v->stat.signal_exits++;
3255 v->arch.kvm_run->exit_reason = KVM_EXIT_INTR;
3256 v->arch.ret = -EINTR;
3257 wake_up(&v->arch.cpu_run);
3258 }
3259 }
8455d79e
PM
3260 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
3261 break;
8455d79e 3262 n_ceded = 0;
7b5f8272 3263 for_each_runnable_thread(i, v, vc) {
1da4e2f4 3264 if (!kvmppc_vcpu_woken(v))
8455d79e 3265 n_ceded += v->arch.ceded;
4619ac88
PM
3266 else
3267 v->arch.ceded = 0;
3268 }
25fedfca
PM
3269 vc->runner = vcpu;
3270 if (n_ceded == vc->n_runnable) {
8455d79e 3271 kvmppc_vcore_blocked(vc);
c56dadf3 3272 } else if (need_resched()) {
ec257165 3273 kvmppc_vcore_preempt(vc);
25fedfca
PM
3274 /* Let something else run */
3275 cond_resched_lock(&vc->lock);
ec257165
PM
3276 if (vc->vcore_state == VCORE_PREEMPT)
3277 kvmppc_vcore_end_preempt(vc);
25fedfca 3278 } else {
8455d79e 3279 kvmppc_run_core(vc);
25fedfca 3280 }
0456ec4f 3281 vc->runner = NULL;
19ccb76a 3282 }
371fefd6 3283
8455d79e
PM
3284 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
3285 (vc->vcore_state == VCORE_RUNNING ||
5fc3e64f
PM
3286 vc->vcore_state == VCORE_EXITING ||
3287 vc->vcore_state == VCORE_PIGGYBACK))
ec257165 3288 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE);
8455d79e 3289
5fc3e64f
PM
3290 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
3291 kvmppc_vcore_end_preempt(vc);
3292
8455d79e
PM
3293 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
3294 kvmppc_remove_runnable(vc, vcpu);
3295 vcpu->stat.signal_exits++;
3296 kvm_run->exit_reason = KVM_EXIT_INTR;
3297 vcpu->arch.ret = -EINTR;
3298 }
3299
3300 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) {
3301 /* Wake up some vcpu to run the core */
7b5f8272
SJS
3302 i = -1;
3303 v = next_runnable_thread(vc, &i);
8455d79e 3304 wake_up(&v->arch.cpu_run);
371fefd6
PM
3305 }
3306
3c78f78a 3307 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run);
371fefd6 3308 spin_unlock(&vc->lock);
371fefd6 3309 return vcpu->arch.ret;
de56a948
PM
3310}
3311
3a167bea 3312static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
a8606e20
PM
3313{
3314 int r;
913d3ff9 3315 int srcu_idx;
ca8efa1d 3316 unsigned long ebb_regs[3] = {}; /* shut up GCC */
4c3bb4cc
PM
3317 unsigned long user_tar = 0;
3318 unsigned int user_vrsave;
1b151ce4 3319 struct kvm *kvm;
a8606e20 3320
af8f38b3
AG
3321 if (!vcpu->arch.sane) {
3322 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
3323 return -EINVAL;
3324 }
3325
46a704f8
PM
3326 /*
3327 * Don't allow entry with a suspended transaction, because
3328 * the guest entry/exit code will lose it.
3329 * If the guest has TM enabled, save away their TM-related SPRs
3330 * (they will get restored by the TM unavailable interrupt).
3331 */
3332#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
3333 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs &&
3334 (current->thread.regs->msr & MSR_TM)) {
3335 if (MSR_TM_ACTIVE(current->thread.regs->msr)) {
3336 run->exit_reason = KVM_EXIT_FAIL_ENTRY;
3337 run->fail_entry.hardware_entry_failure_reason = 0;
3338 return -EINVAL;
3339 }
e4705715
PM
3340 /* Enable TM so we can read the TM SPRs */
3341 mtmsr(mfmsr() | MSR_TM);
46a704f8
PM
3342 current->thread.tm_tfhar = mfspr(SPRN_TFHAR);
3343 current->thread.tm_tfiar = mfspr(SPRN_TFIAR);
3344 current->thread.tm_texasr = mfspr(SPRN_TEXASR);
3345 current->thread.regs->msr &= ~MSR_TM;
3346 }
3347#endif
3348
25051b5a
SW
3349 kvmppc_core_prepare_to_enter(vcpu);
3350
19ccb76a
PM
3351 /* No need to go into the guest when all we'll do is come back out */
3352 if (signal_pending(current)) {
3353 run->exit_reason = KVM_EXIT_INTR;
3354 return -EINTR;
3355 }
3356
1b151ce4
PM
3357 kvm = vcpu->kvm;
3358 atomic_inc(&kvm->arch.vcpus_running);
3359 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */
32fad281
PM
3360 smp_mb();
3361
579e633e
AB
3362 flush_all_to_thread(current);
3363
4c3bb4cc 3364 /* Save userspace EBB and other register values */
ca8efa1d
PM
3365 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
3366 ebb_regs[0] = mfspr(SPRN_EBBHR);
3367 ebb_regs[1] = mfspr(SPRN_EBBRR);
3368 ebb_regs[2] = mfspr(SPRN_BESCR);
4c3bb4cc 3369 user_tar = mfspr(SPRN_TAR);
ca8efa1d 3370 }
4c3bb4cc 3371 user_vrsave = mfspr(SPRN_VRSAVE);
ca8efa1d 3372
19ccb76a 3373 vcpu->arch.wqp = &vcpu->arch.vcore->wq;
342d3db7 3374 vcpu->arch.pgdir = current->mm->pgd;
c7b67670 3375 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
19ccb76a 3376
a8606e20
PM
3377 do {
3378 r = kvmppc_run_vcpu(run, vcpu);
3379
3380 if (run->exit_reason == KVM_EXIT_PAPR_HCALL &&
3381 !(vcpu->arch.shregs.msr & MSR_PR)) {
3c78f78a 3382 trace_kvm_hcall_enter(vcpu);
a8606e20 3383 r = kvmppc_pseries_do_hcall(vcpu);
3c78f78a 3384 trace_kvm_hcall_exit(vcpu, r);
7e28e60e 3385 kvmppc_core_prepare_to_enter(vcpu);
913d3ff9 3386 } else if (r == RESUME_PAGE_FAULT) {
432953b4 3387 srcu_idx = srcu_read_lock(&kvm->srcu);
913d3ff9
PM
3388 r = kvmppc_book3s_hv_page_fault(run, vcpu,
3389 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
432953b4 3390 srcu_read_unlock(&kvm->srcu, srcu_idx);
5af50993
BH
3391 } else if (r == RESUME_PASSTHROUGH) {
3392 if (WARN_ON(xive_enabled()))
3393 r = H_SUCCESS;
3394 else
3395 r = kvmppc_xics_rm_complete(vcpu, 0);
3396 }
e59d24e6 3397 } while (is_kvmppc_resume_guest(r));
32fad281 3398
4c3bb4cc 3399 /* Restore userspace EBB and other register values */
ca8efa1d
PM
3400 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
3401 mtspr(SPRN_EBBHR, ebb_regs[0]);
3402 mtspr(SPRN_EBBRR, ebb_regs[1]);
3403 mtspr(SPRN_BESCR, ebb_regs[2]);
4c3bb4cc
PM
3404 mtspr(SPRN_TAR, user_tar);
3405 mtspr(SPRN_FSCR, current->thread.fscr);
ca8efa1d 3406 }
4c3bb4cc 3407 mtspr(SPRN_VRSAVE, user_vrsave);
ca8efa1d 3408
c7b67670 3409 vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
432953b4 3410 atomic_dec(&kvm->arch.vcpus_running);
a8606e20
PM
3411 return r;
3412}
3413
5b74716e 3414static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps,
8dc6cca5 3415 int shift, int sllp)
5b74716e 3416{
8dc6cca5
PM
3417 (*sps)->page_shift = shift;
3418 (*sps)->slb_enc = sllp;
3419 (*sps)->enc[0].page_shift = shift;
3420 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift);
1f365bb0 3421 /*
8dc6cca5 3422 * Add 16MB MPSS support (may get filtered out by userspace)
1f365bb0 3423 */
8dc6cca5
PM
3424 if (shift != 24) {
3425 int penc = kvmppc_pgsize_lp_encoding(shift, 24);
3426 if (penc != -1) {
3427 (*sps)->enc[1].page_shift = 24;
3428 (*sps)->enc[1].pte_enc = penc;
3429 }
1f365bb0 3430 }
5b74716e
BH
3431 (*sps)++;
3432}
3433
3a167bea
AK
3434static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm,
3435 struct kvm_ppc_smmu_info *info)
5b74716e
BH
3436{
3437 struct kvm_ppc_one_seg_page_size *sps;
3438
e3bfed1d
PM
3439 /*
3440 * POWER7, POWER8 and POWER9 all support 32 storage keys for data.
3441 * POWER7 doesn't support keys for instruction accesses,
3442 * POWER8 and POWER9 do.
3443 */
3444 info->data_keys = 32;
3445 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0;
3446
8dc6cca5
PM
3447 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */
3448 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS;
3449 info->slb_size = 32;
5b74716e
BH
3450
3451 /* We only support these sizes for now, and no muti-size segments */
3452 sps = &info->sps[0];
8dc6cca5
PM
3453 kvmppc_add_seg_page_size(&sps, 12, 0);
3454 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01);
3455 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L);
5b74716e
BH
3456
3457 return 0;
3458}
3459
82ed3616
PM
3460/*
3461 * Get (and clear) the dirty memory log for a memory slot.
3462 */
3a167bea
AK
3463static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm,
3464 struct kvm_dirty_log *log)
82ed3616 3465{
9f6b8029 3466 struct kvm_memslots *slots;
82ed3616 3467 struct kvm_memory_slot *memslot;
8f7b79b8 3468 int i, r;
82ed3616 3469 unsigned long n;
e641a317 3470 unsigned long *buf, *p;
8f7b79b8 3471 struct kvm_vcpu *vcpu;
82ed3616
PM
3472
3473 mutex_lock(&kvm->slots_lock);
3474
3475 r = -EINVAL;
bbacc0c1 3476 if (log->slot >= KVM_USER_MEM_SLOTS)
82ed3616
PM
3477 goto out;
3478
9f6b8029
PB
3479 slots = kvm_memslots(kvm);
3480 memslot = id_to_memslot(slots, log->slot);
82ed3616
PM
3481 r = -ENOENT;
3482 if (!memslot->dirty_bitmap)
3483 goto out;
3484
8f7b79b8 3485 /*
e641a317
PM
3486 * Use second half of bitmap area because both HPT and radix
3487 * accumulate bits in the first half.
8f7b79b8 3488 */
82ed3616 3489 n = kvm_dirty_bitmap_bytes(memslot);
8f7b79b8
PM
3490 buf = memslot->dirty_bitmap + n / sizeof(long);
3491 memset(buf, 0, n);
82ed3616 3492
8f7b79b8
PM
3493 if (kvm_is_radix(kvm))
3494 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf);
3495 else
3496 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf);
82ed3616
PM
3497 if (r)
3498 goto out;
3499
e641a317
PM
3500 /*
3501 * We accumulate dirty bits in the first half of the
3502 * memslot's dirty_bitmap area, for when pages are paged
3503 * out or modified by the host directly. Pick up these
3504 * bits and add them to the map.
3505 */
3506 p = memslot->dirty_bitmap;
3507 for (i = 0; i < n / sizeof(long); ++i)
3508 buf[i] |= xchg(&p[i], 0);
3509
8f7b79b8
PM
3510 /* Harvest dirty bits from VPA and DTL updates */
3511 /* Note: we never modify the SLB shadow buffer areas */
3512 kvm_for_each_vcpu(i, vcpu, kvm) {
3513 spin_lock(&vcpu->arch.vpa_update_lock);
3514 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf);
3515 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf);
3516 spin_unlock(&vcpu->arch.vpa_update_lock);
3517 }
3518
82ed3616 3519 r = -EFAULT;
8f7b79b8 3520 if (copy_to_user(log->dirty_bitmap, buf, n))
82ed3616
PM
3521 goto out;
3522
3523 r = 0;
3524out:
3525 mutex_unlock(&kvm->slots_lock);
3526 return r;
3527}
3528
3a167bea
AK
3529static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *free,
3530 struct kvm_memory_slot *dont)
a66b48c3
PM
3531{
3532 if (!dont || free->arch.rmap != dont->arch.rmap) {
3533 vfree(free->arch.rmap);
3534 free->arch.rmap = NULL;
b2b2f165 3535 }
a66b48c3
PM
3536}
3537
3a167bea
AK
3538static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot,
3539 unsigned long npages)
a66b48c3
PM
3540{
3541 slot->arch.rmap = vzalloc(npages * sizeof(*slot->arch.rmap));
3542 if (!slot->arch.rmap)
3543 return -ENOMEM;
aa04b4cc 3544
c77162de
PM
3545 return 0;
3546}
aa04b4cc 3547
3a167bea
AK
3548static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm,
3549 struct kvm_memory_slot *memslot,
09170a49 3550 const struct kvm_userspace_memory_region *mem)
c77162de 3551{
a66b48c3 3552 return 0;
c77162de
PM
3553}
3554
3a167bea 3555static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm,
09170a49 3556 const struct kvm_userspace_memory_region *mem,
f36f3f28
PB
3557 const struct kvm_memory_slot *old,
3558 const struct kvm_memory_slot *new)
c77162de 3559{
dfe49dbd 3560 unsigned long npages = mem->memory_size >> PAGE_SHIFT;
dfe49dbd 3561
a56ee9f8
YX
3562 /*
3563 * If we are making a new memslot, it might make
3564 * some address that was previously cached as emulated
3565 * MMIO be no longer emulated MMIO, so invalidate
3566 * all the caches of emulated MMIO translations.
3567 */
3568 if (npages)
3569 atomic64_inc(&kvm->arch.mmio_update);
c77162de
PM
3570}
3571
a0144e2a
PM
3572/*
3573 * Update LPCR values in kvm->arch and in vcores.
3574 * Caller must hold kvm->lock.
3575 */
3576void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask)
3577{
3578 long int i;
3579 u32 cores_done = 0;
3580
3581 if ((kvm->arch.lpcr & mask) == lpcr)
3582 return;
3583
3584 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr;
3585
3586 for (i = 0; i < KVM_MAX_VCORES; ++i) {
3587 struct kvmppc_vcore *vc = kvm->arch.vcores[i];
3588 if (!vc)
3589 continue;
3590 spin_lock(&vc->lock);
3591 vc->lpcr = (vc->lpcr & ~mask) | lpcr;
3592 spin_unlock(&vc->lock);
3593 if (++cores_done >= kvm->arch.online_vcores)
3594 break;
3595 }
3596}
3597
3a167bea
AK
3598static void kvmppc_mmu_destroy_hv(struct kvm_vcpu *vcpu)
3599{
3600 return;
3601}
3602
ded13fc1 3603void kvmppc_setup_partition_table(struct kvm *kvm)
7a84084c
PM
3604{
3605 unsigned long dw0, dw1;
3606
8cf4ecc0
PM
3607 if (!kvm_is_radix(kvm)) {
3608 /* PS field - page size for VRMA */
3609 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) |
3610 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1);
3611 /* HTABSIZE and HTABORG fields */
3612 dw0 |= kvm->arch.sdr1;
7a84084c 3613
8cf4ecc0
PM
3614 /* Second dword as set by userspace */
3615 dw1 = kvm->arch.process_table;
3616 } else {
3617 dw0 = PATB_HR | radix__get_tree_size() |
3618 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE;
3619 dw1 = PATB_GR | kvm->arch.process_table;
3620 }
7a84084c
PM
3621
3622 mmu_partition_table_set_entry(kvm->arch.lpid, dw0, dw1);
3623}
3624
1b151ce4
PM
3625/*
3626 * Set up HPT (hashed page table) and RMA (real-mode area).
3627 * Must be called with kvm->lock held.
3628 */
32fad281 3629static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu)
c77162de
PM
3630{
3631 int err = 0;
3632 struct kvm *kvm = vcpu->kvm;
c77162de
PM
3633 unsigned long hva;
3634 struct kvm_memory_slot *memslot;
3635 struct vm_area_struct *vma;
a0144e2a 3636 unsigned long lpcr = 0, senc;
c77162de 3637 unsigned long psize, porder;
2c9097e4 3638 int srcu_idx;
c77162de 3639
32fad281 3640 /* Allocate hashed page table (if not done already) and reset it */
3f9d4f5a 3641 if (!kvm->arch.hpt.virt) {
aae0777f
DG
3642 int order = KVM_DEFAULT_HPT_ORDER;
3643 struct kvm_hpt_info info;
3644
3645 err = kvmppc_allocate_hpt(&info, order);
3646 /* If we get here, it means userspace didn't specify a
3647 * size explicitly. So, try successively smaller
3648 * sizes if the default failed. */
3649 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER)
3650 err = kvmppc_allocate_hpt(&info, order);
3651
3652 if (err < 0) {
32fad281
PM
3653 pr_err("KVM: Couldn't alloc HPT\n");
3654 goto out;
3655 }
aae0777f
DG
3656
3657 kvmppc_set_hpt(kvm, &info);
32fad281
PM
3658 }
3659
c77162de 3660 /* Look up the memslot for guest physical address 0 */
2c9097e4 3661 srcu_idx = srcu_read_lock(&kvm->srcu);
c77162de 3662 memslot = gfn_to_memslot(kvm, 0);
aa04b4cc 3663
c77162de
PM
3664 /* We must have some memory at 0 by now */
3665 err = -EINVAL;
3666 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
2c9097e4 3667 goto out_srcu;
c77162de
PM
3668
3669 /* Look up the VMA for the start of this memory slot */
3670 hva = memslot->userspace_addr;
3671 down_read(&current->mm->mmap_sem);
3672 vma = find_vma(current->mm, hva);
3673 if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO))
3674 goto up_out;
3675
3676 psize = vma_kernel_pagesize(vma);
da9d1d7f 3677 porder = __ilog2(psize);
c77162de 3678
c77162de
PM
3679 up_read(&current->mm->mmap_sem);
3680
c17b98cf
PM
3681 /* We can handle 4k, 64k or 16M pages in the VRMA */
3682 err = -EINVAL;
3683 if (!(psize == 0x1000 || psize == 0x10000 ||
3684 psize == 0x1000000))
3685 goto out_srcu;
c77162de 3686
c17b98cf
PM
3687 senc = slb_pgsize_encoding(psize);
3688 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T |
3689 (VRMA_VSID << SLB_VSID_SHIFT_1T);
c17b98cf
PM
3690 /* Create HPTEs in the hash page table for the VRMA */
3691 kvmppc_map_vrma(vcpu, memslot, porder);
aa04b4cc 3692
7a84084c
PM
3693 /* Update VRMASD field in the LPCR */
3694 if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
3695 /* the -4 is to account for senc values starting at 0x10 */
3696 lpcr = senc << (LPCR_VRMASD_SH - 4);
3697 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD);
7a84084c 3698 }
a0144e2a 3699
1b151ce4 3700 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */
c77162de 3701 smp_wmb();
c77162de 3702 err = 0;
2c9097e4
PM
3703 out_srcu:
3704 srcu_read_unlock(&kvm->srcu, srcu_idx);
c77162de 3705 out:
c77162de 3706 return err;
b2b2f165 3707
c77162de
PM
3708 up_out:
3709 up_read(&current->mm->mmap_sem);
505d6421 3710 goto out_srcu;
de56a948
PM
3711}
3712
18c3640c
PM
3713/* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */
3714int kvmppc_switch_mmu_to_hpt(struct kvm *kvm)
3715{
3716 kvmppc_free_radix(kvm);
3717 kvmppc_update_lpcr(kvm, LPCR_VPM1,
3718 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR);
3719 kvmppc_rmap_reset(kvm);
3720 kvm->arch.radix = 0;
3721 kvm->arch.process_table = 0;
3722 return 0;
3723}
3724
3725/* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */
3726int kvmppc_switch_mmu_to_radix(struct kvm *kvm)
3727{
3728 int err;
3729
3730 err = kvmppc_init_vm_radix(kvm);
3731 if (err)
3732 return err;
3733
3734 kvmppc_free_hpt(&kvm->arch.hpt);
3735 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR,
3736 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR);
3737 kvm->arch.radix = 1;
3738 return 0;
3739}
3740
79b6c247
SW
3741#ifdef CONFIG_KVM_XICS
3742/*
3743 * Allocate a per-core structure for managing state about which cores are
3744 * running in the host versus the guest and for exchanging data between
3745 * real mode KVM and CPU running in the host.
3746 * This is only done for the first VM.
3747 * The allocated structure stays even if all VMs have stopped.
3748 * It is only freed when the kvm-hv module is unloaded.
3749 * It's OK for this routine to fail, we just don't support host
3750 * core operations like redirecting H_IPI wakeups.
3751 */
3752void kvmppc_alloc_host_rm_ops(void)
3753{
3754 struct kvmppc_host_rm_ops *ops;
3755 unsigned long l_ops;
3756 int cpu, core;
3757 int size;
3758
3759 /* Not the first time here ? */
3760 if (kvmppc_host_rm_ops_hv != NULL)
3761 return;
3762
3763 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL);
3764 if (!ops)
3765 return;
3766
3767 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core);
3768 ops->rm_core = kzalloc(size, GFP_KERNEL);
3769
3770 if (!ops->rm_core) {
3771 kfree(ops);
3772 return;
3773 }
3774
419af25f 3775 cpus_read_lock();
6f3bb809 3776
79b6c247
SW
3777 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) {
3778 if (!cpu_online(cpu))
3779 continue;
3780
3781 core = cpu >> threads_shift;
3782 ops->rm_core[core].rm_state.in_host = 1;
3783 }
3784
0c2a6606
SW
3785 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv;
3786
79b6c247
SW
3787 /*
3788 * Make the contents of the kvmppc_host_rm_ops structure visible
3789 * to other CPUs before we assign it to the global variable.
3790 * Do an atomic assignment (no locks used here), but if someone
3791 * beats us to it, just free our copy and return.
3792 */
3793 smp_wmb();
3794 l_ops = (unsigned long) ops;
3795
3796 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) {
419af25f 3797 cpus_read_unlock();
79b6c247
SW
3798 kfree(ops->rm_core);
3799 kfree(ops);
6f3bb809 3800 return;
79b6c247 3801 }
6f3bb809 3802
419af25f
SAS
3803 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE,
3804 "ppc/kvm_book3s:prepare",
3805 kvmppc_set_host_core,
3806 kvmppc_clear_host_core);
3807 cpus_read_unlock();
79b6c247
SW
3808}
3809
3810void kvmppc_free_host_rm_ops(void)
3811{
3812 if (kvmppc_host_rm_ops_hv) {
3f7cd919 3813 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE);
79b6c247
SW
3814 kfree(kvmppc_host_rm_ops_hv->rm_core);
3815 kfree(kvmppc_host_rm_ops_hv);
3816 kvmppc_host_rm_ops_hv = NULL;
3817 }
3818}
3819#endif
3820
3a167bea 3821static int kvmppc_core_init_vm_hv(struct kvm *kvm)
de56a948 3822{
32fad281 3823 unsigned long lpcr, lpid;
e23a808b 3824 char buf[32];
8cf4ecc0 3825 int ret;
de56a948 3826
32fad281
PM
3827 /* Allocate the guest's logical partition ID */
3828
3829 lpid = kvmppc_alloc_lpid();
5d226ae5 3830 if ((long)lpid < 0)
32fad281
PM
3831 return -ENOMEM;
3832 kvm->arch.lpid = lpid;
de56a948 3833
79b6c247
SW
3834 kvmppc_alloc_host_rm_ops();
3835
1b400ba0
PM
3836 /*
3837 * Since we don't flush the TLB when tearing down a VM,
3838 * and this lpid might have previously been used,
3839 * make sure we flush on each core before running the new VM.
7c5b06ca
PM
3840 * On POWER9, the tlbie in mmu_partition_table_set_entry()
3841 * does this flush for us.
1b400ba0 3842 */
7c5b06ca
PM
3843 if (!cpu_has_feature(CPU_FTR_ARCH_300))
3844 cpumask_setall(&kvm->arch.need_tlb_flush);
1b400ba0 3845
699a0ea0
PM
3846 /* Start out with the default set of hcalls enabled */
3847 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls,
3848 sizeof(kvm->arch.enabled_hcalls));
3849
7a84084c
PM
3850 if (!cpu_has_feature(CPU_FTR_ARCH_300))
3851 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1);
aa04b4cc 3852
c17b98cf
PM
3853 /* Init LPCR for virtual RMA mode */
3854 kvm->arch.host_lpid = mfspr(SPRN_LPID);
3855 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR);
3856 lpcr &= LPCR_PECE | LPCR_LPES;
3857 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE |
3858 LPCR_VPM0 | LPCR_VPM1;
3859 kvm->arch.vrma_slb_v = SLB_VSID_B_1T |
3860 (VRMA_VSID << SLB_VSID_SHIFT_1T);
3861 /* On POWER8 turn on online bit to enable PURR/SPURR */
3862 if (cpu_has_feature(CPU_FTR_ARCH_207S))
3863 lpcr |= LPCR_ONL;
84f7139c
PM
3864 /*
3865 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed)
3866 * Set HVICE bit to enable hypervisor virtualization interrupts.
5af50993
BH
3867 * Set HEIC to prevent OS interrupts to go to hypervisor (should
3868 * be unnecessary but better safe than sorry in case we re-enable
3869 * EE in HV mode with this LPCR still set)
84f7139c
PM
3870 */
3871 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
7a84084c 3872 lpcr &= ~LPCR_VPM0;
5af50993
BH
3873 lpcr |= LPCR_HVICE | LPCR_HEIC;
3874
3875 /*
3876 * If xive is enabled, we route 0x500 interrupts directly
3877 * to the guest.
3878 */
3879 if (xive_enabled())
3880 lpcr |= LPCR_LPES;
84f7139c
PM
3881 }
3882
8cf4ecc0 3883 /*
18c3640c 3884 * If the host uses radix, the guest starts out as radix.
8cf4ecc0
PM
3885 */
3886 if (radix_enabled()) {
3887 kvm->arch.radix = 1;
1b151ce4 3888 kvm->arch.mmu_ready = 1;
8cf4ecc0
PM
3889 lpcr &= ~LPCR_VPM1;
3890 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR;
3891 ret = kvmppc_init_vm_radix(kvm);
3892 if (ret) {
3893 kvmppc_free_lpid(kvm->arch.lpid);
3894 return ret;
3895 }
3896 kvmppc_setup_partition_table(kvm);
3897 }
3898
9e368f29 3899 kvm->arch.lpcr = lpcr;
aa04b4cc 3900
5e985969
DG
3901 /* Initialization for future HPT resizes */
3902 kvm->arch.resize_hpt = NULL;
3903
7c5b06ca
PM
3904 /*
3905 * Work out how many sets the TLB has, for the use of
3906 * the TLB invalidation loop in book3s_hv_rmhandlers.S.
3907 */
18c3640c 3908 if (radix_enabled())
8cf4ecc0
PM
3909 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */
3910 else if (cpu_has_feature(CPU_FTR_ARCH_300))
7c5b06ca
PM
3911 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */
3912 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
3913 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */
3914 else
3915 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */
3916
512691d4 3917 /*
441c19c8
ME
3918 * Track that we now have a HV mode VM active. This blocks secondary
3919 * CPU threads from coming online.
516f7898
PM
3920 * On POWER9, we only need to do this if the "indep_threads_mode"
3921 * module parameter has been set to N.
512691d4 3922 */
516f7898
PM
3923 if (cpu_has_feature(CPU_FTR_ARCH_300))
3924 kvm->arch.threads_indep = indep_threads_mode;
3925 if (!kvm->arch.threads_indep)
8cf4ecc0 3926 kvm_hv_vm_activated();
512691d4 3927
3c313524
PM
3928 /*
3929 * Initialize smt_mode depending on processor.
3930 * POWER8 and earlier have to use "strict" threading, where
3931 * all vCPUs in a vcore have to run on the same (sub)core,
3932 * whereas on POWER9 the threads can each run a different
3933 * guest.
3934 */
3935 if (!cpu_has_feature(CPU_FTR_ARCH_300))
3936 kvm->arch.smt_mode = threads_per_subcore;
3937 else
3938 kvm->arch.smt_mode = 1;
57900694 3939 kvm->arch.emul_smt_mode = 1;
3c313524 3940
e23a808b
PM
3941 /*
3942 * Create a debugfs directory for the VM
3943 */
3944 snprintf(buf, sizeof(buf), "vm%d", current->pid);
3945 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir);
3946 if (!IS_ERR_OR_NULL(kvm->arch.debugfs_dir))
3947 kvmppc_mmu_debugfs_init(kvm);
3948
54738c09 3949 return 0;
de56a948
PM
3950}
3951
f1378b1c
PM
3952static void kvmppc_free_vcores(struct kvm *kvm)
3953{
3954 long int i;
3955
23316316 3956 for (i = 0; i < KVM_MAX_VCORES; ++i)
f1378b1c
PM
3957 kfree(kvm->arch.vcores[i]);
3958 kvm->arch.online_vcores = 0;
3959}
3960
3a167bea 3961static void kvmppc_core_destroy_vm_hv(struct kvm *kvm)
de56a948 3962{
e23a808b
PM
3963 debugfs_remove_recursive(kvm->arch.debugfs_dir);
3964
516f7898 3965 if (!kvm->arch.threads_indep)
8cf4ecc0 3966 kvm_hv_vm_deactivated();
512691d4 3967
f1378b1c 3968 kvmppc_free_vcores(kvm);
aa04b4cc 3969
8cf4ecc0
PM
3970 kvmppc_free_lpid(kvm->arch.lpid);
3971
5a319350
PM
3972 if (kvm_is_radix(kvm))
3973 kvmppc_free_radix(kvm);
3974 else
aae0777f 3975 kvmppc_free_hpt(&kvm->arch.hpt);
c57875f5
SW
3976
3977 kvmppc_free_pimap(kvm);
de56a948
PM
3978}
3979
3a167bea
AK
3980/* We don't need to emulate any privileged instructions or dcbz */
3981static int kvmppc_core_emulate_op_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
3982 unsigned int inst, int *advance)
de56a948 3983{
3a167bea 3984 return EMULATE_FAIL;
de56a948
PM
3985}
3986
3a167bea
AK
3987static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn,
3988 ulong spr_val)
de56a948
PM
3989{
3990 return EMULATE_FAIL;
3991}
3992
3a167bea
AK
3993static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn,
3994 ulong *spr_val)
de56a948
PM
3995{
3996 return EMULATE_FAIL;
3997}
3998
3a167bea 3999static int kvmppc_core_check_processor_compat_hv(void)
de56a948 4000{
c17b98cf
PM
4001 if (!cpu_has_feature(CPU_FTR_HVMODE) ||
4002 !cpu_has_feature(CPU_FTR_ARCH_206))
3a167bea 4003 return -EIO;
50de596d 4004
3a167bea 4005 return 0;
de56a948
PM
4006}
4007
8daaafc8
SW
4008#ifdef CONFIG_KVM_XICS
4009
4010void kvmppc_free_pimap(struct kvm *kvm)
4011{
4012 kfree(kvm->arch.pimap);
4013}
4014
c57875f5 4015static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void)
8daaafc8
SW
4016{
4017 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL);
4018}
c57875f5
SW
4019
4020static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
4021{
4022 struct irq_desc *desc;
4023 struct kvmppc_irq_map *irq_map;
4024 struct kvmppc_passthru_irqmap *pimap;
4025 struct irq_chip *chip;
5af50993 4026 int i, rc = 0;
c57875f5 4027
644abbb2
SW
4028 if (!kvm_irq_bypass)
4029 return 1;
4030
c57875f5
SW
4031 desc = irq_to_desc(host_irq);
4032 if (!desc)
4033 return -EIO;
4034
4035 mutex_lock(&kvm->lock);
4036
4037 pimap = kvm->arch.pimap;
4038 if (pimap == NULL) {
4039 /* First call, allocate structure to hold IRQ map */
4040 pimap = kvmppc_alloc_pimap();
4041 if (pimap == NULL) {
4042 mutex_unlock(&kvm->lock);
4043 return -ENOMEM;
4044 }
4045 kvm->arch.pimap = pimap;
4046 }
4047
4048 /*
4049 * For now, we only support interrupts for which the EOI operation
4050 * is an OPAL call followed by a write to XIRR, since that's
5af50993 4051 * what our real-mode EOI code does, or a XIVE interrupt
c57875f5
SW
4052 */
4053 chip = irq_data_get_irq_chip(&desc->irq_data);
5af50993 4054 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) {
c57875f5
SW
4055 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n",
4056 host_irq, guest_gsi);
4057 mutex_unlock(&kvm->lock);
4058 return -ENOENT;
4059 }
4060
4061 /*
4062 * See if we already have an entry for this guest IRQ number.
4063 * If it's mapped to a hardware IRQ number, that's an error,
4064 * otherwise re-use this entry.
4065 */
4066 for (i = 0; i < pimap->n_mapped; i++) {
4067 if (guest_gsi == pimap->mapped[i].v_hwirq) {
4068 if (pimap->mapped[i].r_hwirq) {
4069 mutex_unlock(&kvm->lock);
4070 return -EINVAL;
4071 }
4072 break;
4073 }
4074 }
4075
4076 if (i == KVMPPC_PIRQ_MAPPED) {
4077 mutex_unlock(&kvm->lock);
4078 return -EAGAIN; /* table is full */
4079 }
4080
4081 irq_map = &pimap->mapped[i];
4082
4083 irq_map->v_hwirq = guest_gsi;
c57875f5
SW
4084 irq_map->desc = desc;
4085
e3c13e56
SW
4086 /*
4087 * Order the above two stores before the next to serialize with
4088 * the KVM real mode handler.
4089 */
4090 smp_wmb();
4091 irq_map->r_hwirq = desc->irq_data.hwirq;
4092
c57875f5
SW
4093 if (i == pimap->n_mapped)
4094 pimap->n_mapped++;
4095
5af50993
BH
4096 if (xive_enabled())
4097 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc);
4098 else
4099 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq);
4100 if (rc)
4101 irq_map->r_hwirq = 0;
5d375199 4102
c57875f5
SW
4103 mutex_unlock(&kvm->lock);
4104
4105 return 0;
4106}
4107
4108static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
4109{
4110 struct irq_desc *desc;
4111 struct kvmppc_passthru_irqmap *pimap;
5af50993 4112 int i, rc = 0;
c57875f5 4113
644abbb2
SW
4114 if (!kvm_irq_bypass)
4115 return 0;
4116
c57875f5
SW
4117 desc = irq_to_desc(host_irq);
4118 if (!desc)
4119 return -EIO;
4120
4121 mutex_lock(&kvm->lock);
a1c52e1c
ME
4122 if (!kvm->arch.pimap)
4123 goto unlock;
c57875f5 4124
c57875f5
SW
4125 pimap = kvm->arch.pimap;
4126
4127 for (i = 0; i < pimap->n_mapped; i++) {
4128 if (guest_gsi == pimap->mapped[i].v_hwirq)
4129 break;
4130 }
4131
4132 if (i == pimap->n_mapped) {
4133 mutex_unlock(&kvm->lock);
4134 return -ENODEV;
4135 }
4136
5af50993
BH
4137 if (xive_enabled())
4138 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc);
4139 else
4140 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq);
5d375199 4141
5af50993 4142 /* invalidate the entry (what do do on error from the above ?) */
c57875f5
SW
4143 pimap->mapped[i].r_hwirq = 0;
4144
4145 /*
4146 * We don't free this structure even when the count goes to
4147 * zero. The structure is freed when we destroy the VM.
4148 */
a1c52e1c 4149 unlock:
c57875f5 4150 mutex_unlock(&kvm->lock);
5af50993 4151 return rc;
c57875f5
SW
4152}
4153
4154static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons,
4155 struct irq_bypass_producer *prod)
4156{
4157 int ret = 0;
4158 struct kvm_kernel_irqfd *irqfd =
4159 container_of(cons, struct kvm_kernel_irqfd, consumer);
4160
4161 irqfd->producer = prod;
4162
4163 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
4164 if (ret)
4165 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n",
4166 prod->irq, irqfd->gsi, ret);
4167
4168 return ret;
4169}
4170
4171static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons,
4172 struct irq_bypass_producer *prod)
4173{
4174 int ret;
4175 struct kvm_kernel_irqfd *irqfd =
4176 container_of(cons, struct kvm_kernel_irqfd, consumer);
4177
4178 irqfd->producer = NULL;
4179
4180 /*
4181 * When producer of consumer is unregistered, we change back to
4182 * default external interrupt handling mode - KVM real mode
4183 * will switch back to host.
4184 */
4185 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
4186 if (ret)
4187 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n",
4188 prod->irq, irqfd->gsi, ret);
4189}
8daaafc8
SW
4190#endif
4191
3a167bea
AK
4192static long kvm_arch_vm_ioctl_hv(struct file *filp,
4193 unsigned int ioctl, unsigned long arg)
4194{
4195 struct kvm *kvm __maybe_unused = filp->private_data;
4196 void __user *argp = (void __user *)arg;
4197 long r;
4198
4199 switch (ioctl) {
4200
3a167bea
AK
4201 case KVM_PPC_ALLOCATE_HTAB: {
4202 u32 htab_order;
4203
4204 r = -EFAULT;
4205 if (get_user(htab_order, (u32 __user *)argp))
4206 break;
f98a8bf9 4207 r = kvmppc_alloc_reset_hpt(kvm, htab_order);
3a167bea
AK
4208 if (r)
4209 break;
3a167bea
AK
4210 r = 0;
4211 break;
4212 }
4213
4214 case KVM_PPC_GET_HTAB_FD: {
4215 struct kvm_get_htab_fd ghf;
4216
4217 r = -EFAULT;
4218 if (copy_from_user(&ghf, argp, sizeof(ghf)))
4219 break;
4220 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf);
4221 break;
4222 }
4223
5e985969
DG
4224 case KVM_PPC_RESIZE_HPT_PREPARE: {
4225 struct kvm_ppc_resize_hpt rhpt;
4226
4227 r = -EFAULT;
4228 if (copy_from_user(&rhpt, argp, sizeof(rhpt)))
4229 break;
4230
4231 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt);
4232 break;
4233 }
4234
4235 case KVM_PPC_RESIZE_HPT_COMMIT: {
4236 struct kvm_ppc_resize_hpt rhpt;
4237
4238 r = -EFAULT;
4239 if (copy_from_user(&rhpt, argp, sizeof(rhpt)))
4240 break;
4241
4242 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt);
4243 break;
4244 }
4245
3a167bea
AK
4246 default:
4247 r = -ENOTTY;
4248 }
4249
4250 return r;
4251}
4252
699a0ea0
PM
4253/*
4254 * List of hcall numbers to enable by default.
4255 * For compatibility with old userspace, we enable by default
4256 * all hcalls that were implemented before the hcall-enabling
4257 * facility was added. Note this list should not include H_RTAS.
4258 */
4259static unsigned int default_hcall_list[] = {
4260 H_REMOVE,
4261 H_ENTER,
4262 H_READ,
4263 H_PROTECT,
4264 H_BULK_REMOVE,
4265 H_GET_TCE,
4266 H_PUT_TCE,
4267 H_SET_DABR,
4268 H_SET_XDABR,
4269 H_CEDE,
4270 H_PROD,
4271 H_CONFER,
4272 H_REGISTER_VPA,
4273#ifdef CONFIG_KVM_XICS
4274 H_EOI,
4275 H_CPPR,
4276 H_IPI,
4277 H_IPOLL,
4278 H_XIRR,
4279 H_XIRR_X,
4280#endif
4281 0
4282};
4283
4284static void init_default_hcalls(void)
4285{
4286 int i;
ae2113a4 4287 unsigned int hcall;
699a0ea0 4288
ae2113a4
PM
4289 for (i = 0; default_hcall_list[i]; ++i) {
4290 hcall = default_hcall_list[i];
4291 WARN_ON(!kvmppc_hcall_impl_hv(hcall));
4292 __set_bit(hcall / 4, default_enabled_hcalls);
4293 }
699a0ea0
PM
4294}
4295
c9270132
PM
4296static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg)
4297{
468808bd 4298 unsigned long lpcr;
8cf4ecc0 4299 int radix;
18c3640c 4300 int err;
468808bd
PM
4301
4302 /* If not on a POWER9, reject it */
4303 if (!cpu_has_feature(CPU_FTR_ARCH_300))
4304 return -ENODEV;
4305
4306 /* If any unknown flags set, reject it */
4307 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE))
4308 return -EINVAL;
4309
468808bd 4310 /* GR (guest radix) bit in process_table field must match */
18c3640c 4311 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX);
8cf4ecc0 4312 if (!!(cfg->process_table & PATB_GR) != radix)
468808bd
PM
4313 return -EINVAL;
4314
4315 /* Process table size field must be reasonable, i.e. <= 24 */
4316 if ((cfg->process_table & PRTS_MASK) > 24)
4317 return -EINVAL;
4318
18c3640c
PM
4319 /* We can change a guest to/from radix now, if the host is radix */
4320 if (radix && !radix_enabled())
4321 return -EINVAL;
4322
cf5f6f31 4323 mutex_lock(&kvm->lock);
18c3640c
PM
4324 if (radix != kvm_is_radix(kvm)) {
4325 if (kvm->arch.mmu_ready) {
4326 kvm->arch.mmu_ready = 0;
4327 /* order mmu_ready vs. vcpus_running */
4328 smp_mb();
4329 if (atomic_read(&kvm->arch.vcpus_running)) {
4330 kvm->arch.mmu_ready = 1;
4331 err = -EBUSY;
4332 goto out_unlock;
4333 }
4334 }
4335 if (radix)
4336 err = kvmppc_switch_mmu_to_radix(kvm);
4337 else
4338 err = kvmppc_switch_mmu_to_hpt(kvm);
4339 if (err)
4340 goto out_unlock;
4341 }
4342
468808bd
PM
4343 kvm->arch.process_table = cfg->process_table;
4344 kvmppc_setup_partition_table(kvm);
4345
4346 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0;
4347 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE);
18c3640c 4348 err = 0;
468808bd 4349
18c3640c
PM
4350 out_unlock:
4351 mutex_unlock(&kvm->lock);
4352 return err;
c9270132
PM
4353}
4354
cbbc58d4 4355static struct kvmppc_ops kvm_ops_hv = {
3a167bea
AK
4356 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv,
4357 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv,
4358 .get_one_reg = kvmppc_get_one_reg_hv,
4359 .set_one_reg = kvmppc_set_one_reg_hv,
4360 .vcpu_load = kvmppc_core_vcpu_load_hv,
4361 .vcpu_put = kvmppc_core_vcpu_put_hv,
4362 .set_msr = kvmppc_set_msr_hv,
4363 .vcpu_run = kvmppc_vcpu_run_hv,
4364 .vcpu_create = kvmppc_core_vcpu_create_hv,
4365 .vcpu_free = kvmppc_core_vcpu_free_hv,
4366 .check_requests = kvmppc_core_check_requests_hv,
4367 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv,
4368 .flush_memslot = kvmppc_core_flush_memslot_hv,
4369 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv,
4370 .commit_memory_region = kvmppc_core_commit_memory_region_hv,
4371 .unmap_hva = kvm_unmap_hva_hv,
4372 .unmap_hva_range = kvm_unmap_hva_range_hv,
4373 .age_hva = kvm_age_hva_hv,
4374 .test_age_hva = kvm_test_age_hva_hv,
4375 .set_spte_hva = kvm_set_spte_hva_hv,
4376 .mmu_destroy = kvmppc_mmu_destroy_hv,
4377 .free_memslot = kvmppc_core_free_memslot_hv,
4378 .create_memslot = kvmppc_core_create_memslot_hv,
4379 .init_vm = kvmppc_core_init_vm_hv,
4380 .destroy_vm = kvmppc_core_destroy_vm_hv,
3a167bea
AK
4381 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv,
4382 .emulate_op = kvmppc_core_emulate_op_hv,
4383 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv,
4384 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv,
4385 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv,
4386 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv,
ae2113a4 4387 .hcall_implemented = kvmppc_hcall_impl_hv,
c57875f5
SW
4388#ifdef CONFIG_KVM_XICS
4389 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv,
4390 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv,
4391#endif
c9270132
PM
4392 .configure_mmu = kvmhv_configure_mmu,
4393 .get_rmmu_info = kvmhv_get_rmmu_info,
3c313524 4394 .set_smt_mode = kvmhv_set_smt_mode,
3a167bea
AK
4395};
4396
fd7bacbc
MS
4397static int kvm_init_subcore_bitmap(void)
4398{
4399 int i, j;
4400 int nr_cores = cpu_nr_cores();
4401 struct sibling_subcore_state *sibling_subcore_state;
4402
4403 for (i = 0; i < nr_cores; i++) {
4404 int first_cpu = i * threads_per_core;
4405 int node = cpu_to_node(first_cpu);
4406
4407 /* Ignore if it is already allocated. */
4408 if (paca[first_cpu].sibling_subcore_state)
4409 continue;
4410
4411 sibling_subcore_state =
4412 kmalloc_node(sizeof(struct sibling_subcore_state),
4413 GFP_KERNEL, node);
4414 if (!sibling_subcore_state)
4415 return -ENOMEM;
4416
4417 memset(sibling_subcore_state, 0,
4418 sizeof(struct sibling_subcore_state));
4419
4420 for (j = 0; j < threads_per_core; j++) {
4421 int cpu = first_cpu + j;
4422
4423 paca[cpu].sibling_subcore_state = sibling_subcore_state;
4424 }
4425 }
4426 return 0;
4427}
4428
5a319350
PM
4429static int kvmppc_radix_possible(void)
4430{
4431 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled();
4432}
4433
3a167bea 4434static int kvmppc_book3s_init_hv(void)
de56a948
PM
4435{
4436 int r;
cbbc58d4
AK
4437 /*
4438 * FIXME!! Do we need to check on all cpus ?
4439 */
4440 r = kvmppc_core_check_processor_compat_hv();
4441 if (r < 0)
739e2425 4442 return -ENODEV;
de56a948 4443
fd7bacbc
MS
4444 r = kvm_init_subcore_bitmap();
4445 if (r)
4446 return r;
4447
f725758b
PM
4448 /*
4449 * We need a way of accessing the XICS interrupt controller,
4450 * either directly, via paca[cpu].kvm_hstate.xics_phys, or
4451 * indirectly, via OPAL.
4452 */
4453#ifdef CONFIG_SMP
fb7dcf72 4454 if (!xive_enabled() && !local_paca->kvm_hstate.xics_phys) {
f725758b
PM
4455 struct device_node *np;
4456
4457 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc");
4458 if (!np) {
4459 pr_err("KVM-HV: Cannot determine method for accessing XICS\n");
4460 return -ENODEV;
4461 }
4462 }
4463#endif
4464
cbbc58d4
AK
4465 kvm_ops_hv.owner = THIS_MODULE;
4466 kvmppc_hv_ops = &kvm_ops_hv;
de56a948 4467
699a0ea0
PM
4468 init_default_hcalls();
4469
ec257165
PM
4470 init_vcore_lists();
4471
cbbc58d4 4472 r = kvmppc_mmu_hv_init();
5a319350
PM
4473 if (r)
4474 return r;
4475
4476 if (kvmppc_radix_possible())
4477 r = kvmppc_radix_init();
00608e1f
PM
4478
4479 /*
4480 * POWER9 chips before version 2.02 can't have some threads in
4481 * HPT mode and some in radix mode on the same core.
4482 */
4483 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
4484 unsigned int pvr = mfspr(SPRN_PVR);
4485 if ((pvr >> 16) == PVR_POWER9 &&
4486 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) ||
4487 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101)))
4488 no_mixing_hpt_and_radix = true;
4489 }
4490
de56a948
PM
4491 return r;
4492}
4493
3a167bea 4494static void kvmppc_book3s_exit_hv(void)
de56a948 4495{
79b6c247 4496 kvmppc_free_host_rm_ops();
5a319350
PM
4497 if (kvmppc_radix_possible())
4498 kvmppc_radix_exit();
cbbc58d4 4499 kvmppc_hv_ops = NULL;
de56a948
PM
4500}
4501
3a167bea
AK
4502module_init(kvmppc_book3s_init_hv);
4503module_exit(kvmppc_book3s_exit_hv);
2ba9f0d8 4504MODULE_LICENSE("GPL");
398a76c6
AG
4505MODULE_ALIAS_MISCDEV(KVM_MINOR);
4506MODULE_ALIAS("devname:kvm");