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KVM: PPC: Book3S HV: Nested guest entry via hypercall
[linux-2.6-block.git] / arch / powerpc / kvm / book3s_hv.c
CommitLineData
de56a948
PM		 1/*
2 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
4 *
5 * Authors:
6 * Paul Mackerras <paulus@au1.ibm.com>
7 * Alexander Graf <agraf@suse.de>
8 * Kevin Wolf <mail@kevin-wolf.de>
9 *
10 * Description: KVM functions specific to running on Book 3S
11 * processors in hypervisor mode (specifically POWER7 and later).
12 *
13 * This file is derived from arch/powerpc/kvm/book3s.c,
14 * by Alexander Graf <agraf@suse.de>.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License, version 2, as
18 * published by the Free Software Foundation.
19 */
20
21#include <linux/kvm_host.h>
4bb817ed 22#include <linux/kernel.h>
de56a948
PM		 23#include <linux/err.h>
24#include <linux/slab.h>
25#include <linux/preempt.h>
174cd4b1 26#include <linux/sched/signal.h>
03441a34 27#include <linux/sched/stat.h>
de56a948 28#include <linux/delay.h>
66b15db6 29#include <linux/export.h>
de56a948
PM		 30#include <linux/fs.h>
31#include <linux/anon_inodes.h>
07f8ab25 32#include <linux/cpu.h>
de56a948 33#include <linux/cpumask.h>
aa04b4cc
PM		 34#include <linux/spinlock.h>
35#include <linux/page-flags.h>
2c9097e4 36#include <linux/srcu.h>
398a76c6 37#include <linux/miscdevice.h>
e23a808b 38#include <linux/debugfs.h>
d3989143
BH		 39#include <linux/gfp.h>
40#include <linux/vmalloc.h>
41#include <linux/highmem.h>
42#include <linux/hugetlb.h>
43#include <linux/kvm_irqfd.h>
44#include <linux/irqbypass.h>
45#include <linux/module.h>
46#include <linux/compiler.h>
47#include <linux/of.h>
de56a948 48
d6ee76d3 49#include <asm/ftrace.h>
de56a948 50#include <asm/reg.h>
57900694 51#include <asm/ppc-opcode.h>
6de6638b 52#include <asm/asm-prototypes.h>
e303c087 53#include <asm/debug.h>
57900694 54#include <asm/disassemble.h>
de56a948
PM		 55#include <asm/cputable.h>
56#include <asm/cacheflush.h>
7c0f6ba6 57#include <linux/uaccess.h>
de56a948
PM		 58#include <asm/io.h>
59#include <asm/kvm_ppc.h>
60#include <asm/kvm_book3s.h>
61#include <asm/mmu_context.h>
62#include <asm/lppaca.h>
63#include <asm/processor.h>
371fefd6 64#include <asm/cputhreads.h>
aa04b4cc 65#include <asm/page.h>
de1d9248 66#include <asm/hvcall.h>
ae3a197e 67#include <asm/switch_to.h>
512691d4 68#include <asm/smp.h>
66feed61 69#include <asm/dbell.h>
fd7bacbc 70#include <asm/hmi.h>
c57875f5 71#include <asm/pnv-pci.h>
7a84084c 72#include <asm/mmu.h>
f725758b
PM		 73#include <asm/opal.h>
74#include <asm/xics.h>
5af50993 75#include <asm/xive.h>
de56a948 76
3a167bea
AK		 77#include "book3s.h"
78
3c78f78a
SW		 79#define CREATE_TRACE_POINTS
80#include "trace_hv.h"
81
de56a948
PM		 82/* #define EXIT_DEBUG */
83/* #define EXIT_DEBUG_SIMPLE */
84/* #define EXIT_DEBUG_INT */
85
913d3ff9
PM		 86/* Used to indicate that a guest page fault needs to be handled */
87#define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1)
f7af5209
SW		 88/* Used to indicate that a guest passthrough interrupt needs to be handled */
89#define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2)
913d3ff9 90
c7b67670
PM		 91/* Used as a "null" value for timebase values */
92#define TB_NIL (~(u64)0)
93
699a0ea0
PM		 94static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
95
b4deba5c 96static int dynamic_mt_modes = 6;
57ad583f 97module_param(dynamic_mt_modes, int, 0644);
b4deba5c 98MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)");
ec257165 99static int target_smt_mode;
57ad583f 100module_param(target_smt_mode, int, 0644);
ec257165 101MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)");
9678cdaa 102
516f7898
PM		 103static bool indep_threads_mode = true;
104module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR);
105MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)");
106
520fe9c6
SW		 107#ifdef CONFIG_KVM_XICS
108static struct kernel_param_ops module_param_ops = {
109 .set = param_set_int,
110 .get = param_get_int,
111};
112
57ad583f 113module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644);
644abbb2
SW		 114MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization");
115
57ad583f 116module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644);
520fe9c6
SW		 117MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core");
118#endif
119
00608e1f
PM		 120/* If set, the threads on each CPU core have to be in the same MMU mode */
121static bool no_mixing_hpt_and_radix;
122
19ccb76a 123static void kvmppc_end_cede(struct kvm_vcpu *vcpu);
32fad281 124static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu);
19ccb76a 125
7aa15842
PM		 126/*
127 * RWMR values for POWER8. These control the rate at which PURR
128 * and SPURR count and should be set according to the number of
129 * online threads in the vcore being run.
130 */
0abb75b7
NMG		 131#define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL
132#define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL
133#define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL
134#define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL
135#define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL
136#define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL
137#define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL
138#define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL
7aa15842
PM		 139
140static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = {
141 RWMR_RPA_P8_1THREAD,
142 RWMR_RPA_P8_1THREAD,
143 RWMR_RPA_P8_2THREAD,
144 RWMR_RPA_P8_3THREAD,
145 RWMR_RPA_P8_4THREAD,
146 RWMR_RPA_P8_5THREAD,
147 RWMR_RPA_P8_6THREAD,
148 RWMR_RPA_P8_7THREAD,
149 RWMR_RPA_P8_8THREAD,
150};
151
7b5f8272
SJS		 152static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc,
153 int *ip)
154{
155 int i = *ip;
156 struct kvm_vcpu *vcpu;
157
158 while (++i < MAX_SMT_THREADS) {
159 vcpu = READ_ONCE(vc->runnable_threads[i]);
160 if (vcpu) {
161 *ip = i;
162 return vcpu;
163 }
164 }
165 return NULL;
166}
167
168/* Used to traverse the list of runnable threads for a given vcore */
169#define for_each_runnable_thread(i, vcpu, vc) \
170 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); )
171
66feed61
PM		 172static bool kvmppc_ipi_thread(int cpu)
173{
1704a81c
PM		 174 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
175
176 /* On POWER9 we can use msgsnd to IPI any cpu */
177 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
178 msg |= get_hard_smp_processor_id(cpu);
179 smp_mb();
180 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
181 return true;
182 }
183
66feed61
PM		 184 /* On POWER8 for IPIs to threads in the same core, use msgsnd */
185 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
186 preempt_disable();
187 if (cpu_first_thread_sibling(cpu) ==
188 cpu_first_thread_sibling(smp_processor_id())) {
66feed61
PM		 189 msg |= cpu_thread_in_core(cpu);
190 smp_mb();
191 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
192 preempt_enable();
193 return true;
194 }
195 preempt_enable();
196 }
197
198#if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
f725758b 199 if (cpu >= 0 && cpu < nr_cpu_ids) {
d2e60075 200 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) {
f725758b
PM		 201 xics_wake_cpu(cpu);
202 return true;
203 }
204 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY);
66feed61
PM		 205 return true;
206 }
207#endif
208
209 return false;
210}
211
3a167bea 212static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu)
54695c30 213{
ec257165 214 int cpu;
8577370f 215 struct swait_queue_head *wqp;
54695c30
BH		 216
217 wqp = kvm_arch_vcpu_wq(vcpu);
267ad7bc 218 if (swq_has_sleeper(wqp)) {
b3dae109 219 swake_up_one(wqp);
54695c30
BH		 220 ++vcpu->stat.halt_wakeup;
221 }
222
3deda5e5
PM		 223 cpu = READ_ONCE(vcpu->arch.thread_cpu);
224 if (cpu >= 0 && kvmppc_ipi_thread(cpu))
66feed61 225 return;
54695c30
BH		 226
227 /* CPU points to the first thread of the core */
ec257165 228 cpu = vcpu->cpu;
66feed61
PM		 229 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu))
230 smp_send_reschedule(cpu);
54695c30
BH		 231}
232
c7b67670
PM		 233/*
234 * We use the vcpu_load/put functions to measure stolen time.
235 * Stolen time is counted as time when either the vcpu is able to
236 * run as part of a virtual core, but the task running the vcore
237 * is preempted or sleeping, or when the vcpu needs something done
238 * in the kernel by the task running the vcpu, but that task is
239 * preempted or sleeping. Those two things have to be counted
240 * separately, since one of the vcpu tasks will take on the job
241 * of running the core, and the other vcpu tasks in the vcore will
242 * sleep waiting for it to do that, but that sleep shouldn't count
243 * as stolen time.
244 *
245 * Hence we accumulate stolen time when the vcpu can run as part of
246 * a vcore using vc->stolen_tb, and the stolen time when the vcpu
247 * needs its task to do other things in the kernel (for example,
248 * service a page fault) in busy_stolen. We don't accumulate
249 * stolen time for a vcore when it is inactive, or for a vcpu
250 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of
251 * a misnomer; it means that the vcpu task is not executing in
252 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in
253 * the kernel. We don't have any way of dividing up that time
254 * between time that the vcpu is genuinely stopped, time that
255 * the task is actively working on behalf of the vcpu, and time
256 * that the task is preempted, so we don't count any of it as
257 * stolen.
258 *
259 * Updates to busy_stolen are protected by arch.tbacct_lock;
2711e248
PM		 260 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock
261 * lock. The stolen times are measured in units of timebase ticks.
262 * (Note that the != TB_NIL checks below are purely defensive;
263 * they should never fail.)
c7b67670
PM		 264 */
265
ec257165
PM		 266static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc)
267{
268 unsigned long flags;
269
270 spin_lock_irqsave(&vc->stoltb_lock, flags);
271 vc->preempt_tb = mftb();
272 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
273}
274
275static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc)
276{
277 unsigned long flags;
278
279 spin_lock_irqsave(&vc->stoltb_lock, flags);
280 if (vc->preempt_tb != TB_NIL) {
281 vc->stolen_tb += mftb() - vc->preempt_tb;
282 vc->preempt_tb = TB_NIL;
283 }
284 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
285}
286
3a167bea 287static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu)
de56a948 288{
0456ec4f 289 struct kvmppc_vcore *vc = vcpu->arch.vcore;
bf3d32e1 290 unsigned long flags;
0456ec4f 291
2711e248
PM		 292 /*
293 * We can test vc->runner without taking the vcore lock,
294 * because only this task ever sets vc->runner to this
295 * vcpu, and once it is set to this vcpu, only this task
296 * ever sets it to NULL.
297 */
ec257165
PM		 298 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
299 kvmppc_core_end_stolen(vc);
300
2711e248 301 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
c7b67670
PM		 302 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST &&
303 vcpu->arch.busy_preempt != TB_NIL) {
304 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt;
305 vcpu->arch.busy_preempt = TB_NIL;
306 }
bf3d32e1 307 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
de56a948
PM		 308}
309
3a167bea 310static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu)
de56a948 311{
0456ec4f 312 struct kvmppc_vcore *vc = vcpu->arch.vcore;
bf3d32e1 313 unsigned long flags;
0456ec4f 314
ec257165
PM		 315 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
316 kvmppc_core_start_stolen(vc);
317
2711e248 318 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
c7b67670
PM		 319 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST)
320 vcpu->arch.busy_preempt = mftb();
bf3d32e1 321 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
de56a948
PM		 322}
323
3a167bea 324static void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr)
de56a948 325{
c20875a3
PM		 326 /*
327 * Check for illegal transactional state bit combination
328 * and if we find it, force the TS field to a safe state.
329 */
330 if ((msr & MSR_TS_MASK) == MSR_TS_MASK)
331 msr &= ~MSR_TS_MASK;
de56a948 332 vcpu->arch.shregs.msr = msr;
19ccb76a 333 kvmppc_end_cede(vcpu);
de56a948
PM		 334}
335
5358a963 336static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr)
de56a948
PM		 337{
338 vcpu->arch.pvr = pvr;
339}
340
2ee13be3
SJS		 341/* Dummy value used in computing PCR value below */
342#define PCR_ARCH_300 (PCR_ARCH_207 << 1)
343
5358a963 344static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
388cc6e1 345{
2ee13be3 346 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0;
388cc6e1
PM		 347 struct kvmppc_vcore *vc = vcpu->arch.vcore;
348
2ee13be3
SJS		 349 /* We can (emulate) our own architecture version and anything older */
350 if (cpu_has_feature(CPU_FTR_ARCH_300))
351 host_pcr_bit = PCR_ARCH_300;
352 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
353 host_pcr_bit = PCR_ARCH_207;
354 else if (cpu_has_feature(CPU_FTR_ARCH_206))
355 host_pcr_bit = PCR_ARCH_206;
356 else
357 host_pcr_bit = PCR_ARCH_205;
358
359 /* Determine lowest PCR bit needed to run guest in given PVR level */
360 guest_pcr_bit = host_pcr_bit;
388cc6e1 361 if (arch_compat) {
388cc6e1
PM		 362 switch (arch_compat) {
363 case PVR_ARCH_205:
2ee13be3 364 guest_pcr_bit = PCR_ARCH_205;
388cc6e1
PM		 365 break;
366 case PVR_ARCH_206:
367 case PVR_ARCH_206p:
2ee13be3 368 guest_pcr_bit = PCR_ARCH_206;
5557ae0e
PM		 369 break;
370 case PVR_ARCH_207:
2ee13be3
SJS		 371 guest_pcr_bit = PCR_ARCH_207;
372 break;
373 case PVR_ARCH_300:
374 guest_pcr_bit = PCR_ARCH_300;
388cc6e1
PM		 375 break;
376 default:
377 return -EINVAL;
378 }
379 }
380
2ee13be3
SJS		 381 /* Check requested PCR bits don't exceed our capabilities */
382 if (guest_pcr_bit > host_pcr_bit)
383 return -EINVAL;
384
388cc6e1
PM		 385 spin_lock(&vc->lock);
386 vc->arch_compat = arch_compat;
2ee13be3
SJS		 387 /* Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit */
388 vc->pcr = host_pcr_bit - guest_pcr_bit;
388cc6e1
PM		 389 spin_unlock(&vc->lock);
390
391 return 0;
392}
393
5358a963 394static void kvmppc_dump_regs(struct kvm_vcpu *vcpu)
de56a948
PM		 395{
396 int r;
397
398 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id);
399 pr_err("pc = %.16lx msr = %.16llx trap = %x\n",
173c520a 400 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap);
de56a948
PM		 401 for (r = 0; r < 16; ++r)
402 pr_err("r%2d = %.16lx r%d = %.16lx\n",
403 r, kvmppc_get_gpr(vcpu, r),
404 r+16, kvmppc_get_gpr(vcpu, r+16));
405 pr_err("ctr = %.16lx lr = %.16lx\n",
173c520a 406 vcpu->arch.regs.ctr, vcpu->arch.regs.link);
de56a948
PM		 407 pr_err("srr0 = %.16llx srr1 = %.16llx\n",
408 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1);
409 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n",
410 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1);
411 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n",
412 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3);
fd0944ba
PM		 413 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n",
414 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr);
de56a948
PM		 415 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar);
416 pr_err("fault dar = %.16lx dsisr = %.8x\n",
417 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
418 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max);
419 for (r = 0; r < vcpu->arch.slb_max; ++r)
420 pr_err(" ESID = %.16llx VSID = %.16llx\n",
421 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv);
422 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n",
a0144e2a 423 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1,
de56a948
PM		 424 vcpu->arch.last_inst);
425}
426
5358a963 427static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id)
a8606e20 428{
e09fefde 429 struct kvm_vcpu *ret;
a8606e20
PM		 430
431 mutex_lock(&kvm->lock);
e09fefde 432 ret = kvm_get_vcpu_by_id(kvm, id);
a8606e20
PM		 433 mutex_unlock(&kvm->lock);
434 return ret;
435}
436
437static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa)
438{
f13c13a0 439 vpa->__old_status |= LPPACA_OLD_SHARED_PROC;
02407552 440 vpa->yield_count = cpu_to_be32(1);
a8606e20
PM		 441}
442
55b665b0
PM		 443static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v,
444 unsigned long addr, unsigned long len)
445{
446 /* check address is cacheline aligned */
447 if (addr & (L1_CACHE_BYTES - 1))
448 return -EINVAL;
449 spin_lock(&vcpu->arch.vpa_update_lock);
450 if (v->next_gpa != addr || v->len != len) {
451 v->next_gpa = addr;
452 v->len = addr ? len : 0;
453 v->update_pending = 1;
454 }
455 spin_unlock(&vcpu->arch.vpa_update_lock);
456 return 0;
457}
458
2e25aa5f
PM		 459/* Length for a per-processor buffer is passed in at offset 4 in the buffer */
460struct reg_vpa {
461 u32 dummy;
462 union {
02407552
AG		 463 __be16 hword;
464 __be32 word;
2e25aa5f
PM		 465 } length;
466};
467
468static int vpa_is_registered(struct kvmppc_vpa *vpap)
469{
470 if (vpap->update_pending)
471 return vpap->next_gpa != 0;
472 return vpap->pinned_addr != NULL;
473}
474
a8606e20
PM		 475static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu,
476 unsigned long flags,
477 unsigned long vcpuid, unsigned long vpa)
478{
479 struct kvm *kvm = vcpu->kvm;
93e60249 480 unsigned long len, nb;
a8606e20
PM		 481 void *va;
482 struct kvm_vcpu *tvcpu;
2e25aa5f
PM		 483 int err;
484 int subfunc;
485 struct kvmppc_vpa *vpap;
a8606e20
PM		 486
487 tvcpu = kvmppc_find_vcpu(kvm, vcpuid);
488 if (!tvcpu)
489 return H_PARAMETER;
490
2e25aa5f
PM		 491 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK;
492 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL ||
493 subfunc == H_VPA_REG_SLB) {
494 /* Registering new area - address must be cache-line aligned */
495 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa)
a8606e20 496 return H_PARAMETER;
2e25aa5f
PM		 497
498 /* convert logical addr to kernel addr and read length */
93e60249
PM		 499 va = kvmppc_pin_guest_page(kvm, vpa, &nb);
500 if (va == NULL)
b2b2f165 501 return H_PARAMETER;
2e25aa5f 502 if (subfunc == H_VPA_REG_VPA)
02407552 503 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword);
a8606e20 504 else
02407552 505 len = be32_to_cpu(((struct reg_vpa *)va)->length.word);
c35635ef 506 kvmppc_unpin_guest_page(kvm, va, vpa, false);
2e25aa5f
PM		 507
508 /* Check length */
509 if (len > nb || len < sizeof(struct reg_vpa))
510 return H_PARAMETER;
511 } else {
512 vpa = 0;
513 len = 0;
514 }
515
516 err = H_PARAMETER;
517 vpap = NULL;
518 spin_lock(&tvcpu->arch.vpa_update_lock);
519
520 switch (subfunc) {
521 case H_VPA_REG_VPA: /* register VPA */
eaac112e
NP		 522 /*
523 * The size of our lppaca is 1kB because of the way we align
524 * it for the guest to avoid crossing a 4kB boundary. We only
525 * use 640 bytes of the structure though, so we should accept
526 * clients that set a size of 640.
527 */
499dcd41
NP		 528 BUILD_BUG_ON(sizeof(struct lppaca) != 640);
529 if (len < sizeof(struct lppaca))
a8606e20 530 break;
2e25aa5f
PM		 531 vpap = &tvcpu->arch.vpa;
532 err = 0;
533 break;
534
535 case H_VPA_REG_DTL: /* register DTL */
536 if (len < sizeof(struct dtl_entry))
a8606e20 537 break;
2e25aa5f
PM		 538 len -= len % sizeof(struct dtl_entry);
539
540 /* Check that they have previously registered a VPA */
541 err = H_RESOURCE;
542 if (!vpa_is_registered(&tvcpu->arch.vpa))
a8606e20 543 break;
2e25aa5f
PM		 544
545 vpap = &tvcpu->arch.dtl;
546 err = 0;
547 break;
548
549 case H_VPA_REG_SLB: /* register SLB shadow buffer */
550 /* Check that they have previously registered a VPA */
551 err = H_RESOURCE;
552 if (!vpa_is_registered(&tvcpu->arch.vpa))
a8606e20 553 break;
2e25aa5f
PM		 554
555 vpap = &tvcpu->arch.slb_shadow;
556 err = 0;
557 break;
558
559 case H_VPA_DEREG_VPA: /* deregister VPA */
560 /* Check they don't still have a DTL or SLB buf registered */
561 err = H_RESOURCE;
562 if (vpa_is_registered(&tvcpu->arch.dtl) ||
563 vpa_is_registered(&tvcpu->arch.slb_shadow))
a8606e20 564 break;
2e25aa5f
PM		 565
566 vpap = &tvcpu->arch.vpa;
567 err = 0;
568 break;
569
570 case H_VPA_DEREG_DTL: /* deregister DTL */
571 vpap = &tvcpu->arch.dtl;
572 err = 0;
573 break;
574
575 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */
576 vpap = &tvcpu->arch.slb_shadow;
577 err = 0;
578 break;
579 }
580
581 if (vpap) {
582 vpap->next_gpa = vpa;
583 vpap->len = len;
584 vpap->update_pending = 1;
a8606e20 585 }
93e60249 586
2e25aa5f
PM		 587 spin_unlock(&tvcpu->arch.vpa_update_lock);
588
93e60249 589 return err;
a8606e20
PM		 590}
591
081f323b 592static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap)
2e25aa5f 593{
081f323b 594 struct kvm *kvm = vcpu->kvm;
2e25aa5f
PM		 595 void *va;
596 unsigned long nb;
081f323b 597 unsigned long gpa;
2e25aa5f 598
081f323b
PM		 599 /*
600 * We need to pin the page pointed to by vpap->next_gpa,
601 * but we can't call kvmppc_pin_guest_page under the lock
602 * as it does get_user_pages() and down_read(). So we
603 * have to drop the lock, pin the page, then get the lock
604 * again and check that a new area didn't get registered
605 * in the meantime.
606 */
607 for (;;) {
608 gpa = vpap->next_gpa;
609 spin_unlock(&vcpu->arch.vpa_update_lock);
610 va = NULL;
611 nb = 0;
612 if (gpa)
c35635ef 613 va = kvmppc_pin_guest_page(kvm, gpa, &nb);
081f323b
PM		 614 spin_lock(&vcpu->arch.vpa_update_lock);
615 if (gpa == vpap->next_gpa)
616 break;
617 /* sigh... unpin that one and try again */
618 if (va)
c35635ef 619 kvmppc_unpin_guest_page(kvm, va, gpa, false);
081f323b
PM		 620 }
621
622 vpap->update_pending = 0;
623 if (va && nb < vpap->len) {
624 /*
625 * If it's now too short, it must be that userspace
626 * has changed the mappings underlying guest memory,
627 * so unregister the region.
628 */
c35635ef 629 kvmppc_unpin_guest_page(kvm, va, gpa, false);
081f323b 630 va = NULL;
2e25aa5f
PM		 631 }
632 if (vpap->pinned_addr)
c35635ef
PM		 633 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa,
634 vpap->dirty);
635 vpap->gpa = gpa;
2e25aa5f 636 vpap->pinned_addr = va;
c35635ef 637 vpap->dirty = false;
2e25aa5f
PM		 638 if (va)
639 vpap->pinned_end = va + vpap->len;
640}
641
642static void kvmppc_update_vpas(struct kvm_vcpu *vcpu)
643{
2f12f034
PM		 644 if (!(vcpu->arch.vpa.update_pending ||
645 vcpu->arch.slb_shadow.update_pending ||
646 vcpu->arch.dtl.update_pending))
647 return;
648
2e25aa5f
PM		 649 spin_lock(&vcpu->arch.vpa_update_lock);
650 if (vcpu->arch.vpa.update_pending) {
081f323b 651 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa);
55b665b0
PM		 652 if (vcpu->arch.vpa.pinned_addr)
653 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr);
2e25aa5f
PM		 654 }
655 if (vcpu->arch.dtl.update_pending) {
081f323b 656 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl);
2e25aa5f
PM		 657 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr;
658 vcpu->arch.dtl_index = 0;
659 }
660 if (vcpu->arch.slb_shadow.update_pending)
081f323b 661 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow);
2e25aa5f
PM		 662 spin_unlock(&vcpu->arch.vpa_update_lock);
663}
664
c7b67670
PM		 665/*
666 * Return the accumulated stolen time for the vcore up until `now'.
667 * The caller should hold the vcore lock.
668 */
669static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now)
670{
671 u64 p;
2711e248 672 unsigned long flags;
c7b67670 673
2711e248
PM		 674 spin_lock_irqsave(&vc->stoltb_lock, flags);
675 p = vc->stolen_tb;
c7b67670 676 if (vc->vcore_state != VCORE_INACTIVE &&
2711e248
PM		 677 vc->preempt_tb != TB_NIL)
678 p += now - vc->preempt_tb;
679 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
c7b67670
PM		 680 return p;
681}
682
0456ec4f
PM		 683static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu,
684 struct kvmppc_vcore *vc)
685{
686 struct dtl_entry *dt;
687 struct lppaca *vpa;
c7b67670
PM		 688 unsigned long stolen;
689 unsigned long core_stolen;
690 u64 now;
8b24e69f 691 unsigned long flags;
0456ec4f
PM		 692
693 dt = vcpu->arch.dtl_ptr;
694 vpa = vcpu->arch.vpa.pinned_addr;
c7b67670
PM		 695 now = mftb();
696 core_stolen = vcore_stolen_time(vc, now);
697 stolen = core_stolen - vcpu->arch.stolen_logged;
698 vcpu->arch.stolen_logged = core_stolen;
8b24e69f 699 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
c7b67670
PM		 700 stolen += vcpu->arch.busy_stolen;
701 vcpu->arch.busy_stolen = 0;
8b24e69f 702 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
0456ec4f
PM		 703 if (!dt || !vpa)
704 return;
705 memset(dt, 0, sizeof(struct dtl_entry));
706 dt->dispatch_reason = 7;
02407552
AG		 707 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid);
708 dt->timebase = cpu_to_be64(now + vc->tb_offset);
709 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen);
710 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu));
711 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr);
0456ec4f
PM		 712 ++dt;
713 if (dt == vcpu->arch.dtl.pinned_end)
714 dt = vcpu->arch.dtl.pinned_addr;
715 vcpu->arch.dtl_ptr = dt;
716 /* order writing *dt vs. writing vpa->dtl_idx */
717 smp_wmb();
02407552 718 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index);
c35635ef 719 vcpu->arch.dtl.dirty = true;
0456ec4f
PM		 720}
721
1da4e2f4
PM		 722/* See if there is a doorbell interrupt pending for a vcpu */
723static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu)
724{
725 int thr;
726 struct kvmppc_vcore *vc;
727
57900694
PM		 728 if (vcpu->arch.doorbell_request)
729 return true;
730 /*
731 * Ensure that the read of vcore->dpdes comes after the read
732 * of vcpu->doorbell_request. This barrier matches the
f7035ce9 733 * smb_wmb() in kvmppc_guest_entry_inject().
57900694
PM		 734 */
735 smp_rmb();
1da4e2f4
PM		 736 vc = vcpu->arch.vcore;
737 thr = vcpu->vcpu_id - vc->first_vcpuid;
738 return !!(vc->dpdes & (1 << thr));
739}
740
9642382e
MN		 741static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu)
742{
743 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207)
744 return true;
745 if ((!vcpu->arch.vcore->arch_compat) &&
746 cpu_has_feature(CPU_FTR_ARCH_207S))
747 return true;
748 return false;
749}
750
751static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags,
752 unsigned long resource, unsigned long value1,
753 unsigned long value2)
754{
755 switch (resource) {
756 case H_SET_MODE_RESOURCE_SET_CIABR:
757 if (!kvmppc_power8_compatible(vcpu))
758 return H_P2;
759 if (value2)
760 return H_P4;
761 if (mflags)
762 return H_UNSUPPORTED_FLAG_START;
763 /* Guests can't breakpoint the hypervisor */
764 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER)
765 return H_P3;
766 vcpu->arch.ciabr = value1;
767 return H_SUCCESS;
768 case H_SET_MODE_RESOURCE_SET_DAWR:
769 if (!kvmppc_power8_compatible(vcpu))
770 return H_P2;
398e712c
MN		 771 if (!ppc_breakpoint_available())
772 return H_P2;
9642382e
MN		 773 if (mflags)
774 return H_UNSUPPORTED_FLAG_START;
775 if (value2 & DABRX_HYP)
776 return H_P4;
777 vcpu->arch.dawr = value1;
778 vcpu->arch.dawrx = value2;
779 return H_SUCCESS;
780 default:
781 return H_TOO_HARD;
782 }
783}
784
90fd09f8
SB		 785static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target)
786{
787 struct kvmppc_vcore *vcore = target->arch.vcore;
788
789 /*
790 * We expect to have been called by the real mode handler
791 * (kvmppc_rm_h_confer()) which would have directly returned
792 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may
793 * have useful work to do and should not confer) so we don't
794 * recheck that here.
795 */
796
797 spin_lock(&vcore->lock);
798 if (target->arch.state == KVMPPC_VCPU_RUNNABLE &&
ec257165
PM		 799 vcore->vcore_state != VCORE_INACTIVE &&
800 vcore->runner)
90fd09f8
SB		 801 target = vcore->runner;
802 spin_unlock(&vcore->lock);
803
804 return kvm_vcpu_yield_to(target);
805}
806
807static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
808{
809 int yield_count = 0;
810 struct lppaca *lppaca;
811
812 spin_lock(&vcpu->arch.vpa_update_lock);
813 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr;
814 if (lppaca)
ecb6d618 815 yield_count = be32_to_cpu(lppaca->yield_count);
90fd09f8
SB		 816 spin_unlock(&vcpu->arch.vpa_update_lock);
817 return yield_count;
818}
819
a8606e20
PM		 820int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
821{
822 unsigned long req = kvmppc_get_gpr(vcpu, 3);
823 unsigned long target, ret = H_SUCCESS;
90fd09f8 824 int yield_count;
a8606e20 825 struct kvm_vcpu *tvcpu;
8e591cb7 826 int idx, rc;
a8606e20 827
699a0ea0
PM		 828 if (req <= MAX_HCALL_OPCODE &&
829 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls))
830 return RESUME_HOST;
831
a8606e20
PM		 832 switch (req) {
833 case H_CEDE:
a8606e20
PM		 834 break;
835 case H_PROD:
836 target = kvmppc_get_gpr(vcpu, 4);
837 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
838 if (!tvcpu) {
839 ret = H_PARAMETER;
840 break;
841 }
842 tvcpu->arch.prodded = 1;
843 smp_mb();
8464c884
PM		 844 if (tvcpu->arch.ceded)
845 kvmppc_fast_vcpu_kick_hv(tvcpu);
a8606e20
PM		 846 break;
847 case H_CONFER:
42d7604d
PM		 848 target = kvmppc_get_gpr(vcpu, 4);
849 if (target == -1)
850 break;
851 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
852 if (!tvcpu) {
853 ret = H_PARAMETER;
854 break;
855 }
90fd09f8
SB		 856 yield_count = kvmppc_get_gpr(vcpu, 5);
857 if (kvmppc_get_yield_count(tvcpu) != yield_count)
858 break;
859 kvm_arch_vcpu_yield_to(tvcpu);
a8606e20
PM		 860 break;
861 case H_REGISTER_VPA:
862 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4),
863 kvmppc_get_gpr(vcpu, 5),
864 kvmppc_get_gpr(vcpu, 6));
865 break;
8e591cb7
ME		 866 case H_RTAS:
867 if (list_empty(&vcpu->kvm->arch.rtas_tokens))
868 return RESUME_HOST;
869
c9438092 870 idx = srcu_read_lock(&vcpu->kvm->srcu);
8e591cb7 871 rc = kvmppc_rtas_hcall(vcpu);
c9438092 872 srcu_read_unlock(&vcpu->kvm->srcu, idx);
8e591cb7
ME		 873
874 if (rc == -ENOENT)
875 return RESUME_HOST;
876 else if (rc == 0)
877 break;
878
879 /* Send the error out to userspace via KVM_RUN */
880 return rc;
99342cf8
DG		 881 case H_LOGICAL_CI_LOAD:
882 ret = kvmppc_h_logical_ci_load(vcpu);
883 if (ret == H_TOO_HARD)
884 return RESUME_HOST;
885 break;
886 case H_LOGICAL_CI_STORE:
887 ret = kvmppc_h_logical_ci_store(vcpu);
888 if (ret == H_TOO_HARD)
889 return RESUME_HOST;
890 break;
9642382e
MN		 891 case H_SET_MODE:
892 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4),
893 kvmppc_get_gpr(vcpu, 5),
894 kvmppc_get_gpr(vcpu, 6),
895 kvmppc_get_gpr(vcpu, 7));
896 if (ret == H_TOO_HARD)
897 return RESUME_HOST;
898 break;
bc5ad3f3
BH		 899 case H_XIRR:
900 case H_CPPR:
901 case H_EOI:
902 case H_IPI:
8e44ddc3
PM		 903 case H_IPOLL:
904 case H_XIRR_X:
bc5ad3f3 905 if (kvmppc_xics_enabled(vcpu)) {
5af50993
BH		 906 if (xive_enabled()) {
907 ret = H_NOT_AVAILABLE;
908 return RESUME_GUEST;
909 }
bc5ad3f3
BH		 910 ret = kvmppc_xics_hcall(vcpu, req);
911 break;
d3695aa4
AK		 912 }
913 return RESUME_HOST;
914 case H_PUT_TCE:
915 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
916 kvmppc_get_gpr(vcpu, 5),
917 kvmppc_get_gpr(vcpu, 6));
918 if (ret == H_TOO_HARD)
919 return RESUME_HOST;
920 break;
921 case H_PUT_TCE_INDIRECT:
922 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4),
923 kvmppc_get_gpr(vcpu, 5),
924 kvmppc_get_gpr(vcpu, 6),
925 kvmppc_get_gpr(vcpu, 7));
926 if (ret == H_TOO_HARD)
927 return RESUME_HOST;
928 break;
929 case H_STUFF_TCE:
930 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
931 kvmppc_get_gpr(vcpu, 5),
932 kvmppc_get_gpr(vcpu, 6),
933 kvmppc_get_gpr(vcpu, 7));
934 if (ret == H_TOO_HARD)
935 return RESUME_HOST;
936 break;
8e3f5fc1
PM		 937
938 case H_SET_PARTITION_TABLE:
939 ret = H_FUNCTION;
940 if (vcpu->kvm->arch.nested_enable)
941 ret = kvmhv_set_partition_table(vcpu);
942 break;
943 case H_ENTER_NESTED:
944 ret = H_FUNCTION;
360cae31
PM		 945 if (!vcpu->kvm->arch.nested_enable)
946 break;
947 ret = kvmhv_enter_nested_guest(vcpu);
948 if (ret == H_INTERRUPT) {
949 kvmppc_set_gpr(vcpu, 3, 0);
950 return -EINTR;
951 }
8e3f5fc1
PM		 952 break;
953 case H_TLB_INVALIDATE:
954 ret = H_FUNCTION;
955 break;
956
a8606e20
PM		 957 default:
958 return RESUME_HOST;
959 }
960 kvmppc_set_gpr(vcpu, 3, ret);
961 vcpu->arch.hcall_needed = 0;
962 return RESUME_GUEST;
963}
964
ae2113a4
PM		 965static int kvmppc_hcall_impl_hv(unsigned long cmd)
966{
967 switch (cmd) {
968 case H_CEDE:
969 case H_PROD:
970 case H_CONFER:
971 case H_REGISTER_VPA:
9642382e 972 case H_SET_MODE:
99342cf8
DG		 973 case H_LOGICAL_CI_LOAD:
974 case H_LOGICAL_CI_STORE:
ae2113a4
PM		 975#ifdef CONFIG_KVM_XICS
976 case H_XIRR:
977 case H_CPPR:
978 case H_EOI:
979 case H_IPI:
980 case H_IPOLL:
981 case H_XIRR_X:
982#endif
983 return 1;
984 }
985
986 /* See if it's in the real-mode table */
987 return kvmppc_hcall_impl_hv_realmode(cmd);
988}
989
a59c1d9e
MS		 990static int kvmppc_emulate_debug_inst(struct kvm_run *run,
991 struct kvm_vcpu *vcpu)
992{
993 u32 last_inst;
994
995 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) !=
996 EMULATE_DONE) {
997 /*
998 * Fetch failed, so return to guest and
999 * try executing it again.
1000 */
1001 return RESUME_GUEST;
1002 }
1003
1004 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) {
1005 run->exit_reason = KVM_EXIT_DEBUG;
1006 run->debug.arch.address = kvmppc_get_pc(vcpu);
1007 return RESUME_HOST;
1008 } else {
1009 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1010 return RESUME_GUEST;
1011 }
1012}
1013
57900694
PM		 1014static void do_nothing(void *x)
1015{
1016}
1017
1018static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu)
1019{
1020 int thr, cpu, pcpu, nthreads;
1021 struct kvm_vcpu *v;
1022 unsigned long dpdes;
1023
1024 nthreads = vcpu->kvm->arch.emul_smt_mode;
1025 dpdes = 0;
1026 cpu = vcpu->vcpu_id & ~(nthreads - 1);
1027 for (thr = 0; thr < nthreads; ++thr, ++cpu) {
1028 v = kvmppc_find_vcpu(vcpu->kvm, cpu);
1029 if (!v)
1030 continue;
1031 /*
1032 * If the vcpu is currently running on a physical cpu thread,
1033 * interrupt it in order to pull it out of the guest briefly,
1034 * which will update its vcore->dpdes value.
1035 */
1036 pcpu = READ_ONCE(v->cpu);
1037 if (pcpu >= 0)
1038 smp_call_function_single(pcpu, do_nothing, NULL, 1);
1039 if (kvmppc_doorbell_pending(v))
1040 dpdes |= 1 << thr;
1041 }
1042 return dpdes;
1043}
1044
1045/*
1046 * On POWER9, emulate doorbell-related instructions in order to
1047 * give the guest the illusion of running on a multi-threaded core.
1048 * The instructions emulated are msgsndp, msgclrp, mfspr TIR,
1049 * and mfspr DPDES.
1050 */
1051static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu)
1052{
1053 u32 inst, rb, thr;
1054 unsigned long arg;
1055 struct kvm *kvm = vcpu->kvm;
1056 struct kvm_vcpu *tvcpu;
1057
57900694
PM		 1058 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE)
1059 return RESUME_GUEST;
1060 if (get_op(inst) != 31)
1061 return EMULATE_FAIL;
1062 rb = get_rb(inst);
1063 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1);
1064 switch (get_xop(inst)) {
1065 case OP_31_XOP_MSGSNDP:
1066 arg = kvmppc_get_gpr(vcpu, rb);
1067 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1068 break;
1069 arg &= 0x3f;
1070 if (arg >= kvm->arch.emul_smt_mode)
1071 break;
1072 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg);
1073 if (!tvcpu)
1074 break;
1075 if (!tvcpu->arch.doorbell_request) {
1076 tvcpu->arch.doorbell_request = 1;
1077 kvmppc_fast_vcpu_kick_hv(tvcpu);
1078 }
1079 break;
1080 case OP_31_XOP_MSGCLRP:
1081 arg = kvmppc_get_gpr(vcpu, rb);
1082 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1083 break;
1084 vcpu->arch.vcore->dpdes = 0;
1085 vcpu->arch.doorbell_request = 0;
1086 break;
1087 case OP_31_XOP_MFSPR:
1088 switch (get_sprn(inst)) {
1089 case SPRN_TIR:
1090 arg = thr;
1091 break;
1092 case SPRN_DPDES:
1093 arg = kvmppc_read_dpdes(vcpu);
1094 break;
1095 default:
1096 return EMULATE_FAIL;
1097 }
1098 kvmppc_set_gpr(vcpu, get_rt(inst), arg);
1099 break;
1100 default:
1101 return EMULATE_FAIL;
1102 }
1103 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
1104 return RESUME_GUEST;
1105}
1106
3a167bea
AK		 1107static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
1108 struct task_struct *tsk)
de56a948
PM		 1109{
1110 int r = RESUME_HOST;
1111
1112 vcpu->stat.sum_exits++;
1113
1c9e3d51
PM		 1114 /*
1115 * This can happen if an interrupt occurs in the last stages
1116 * of guest entry or the first stages of guest exit (i.e. after
1117 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV
1118 * and before setting it to KVM_GUEST_MODE_HOST_HV).
1119 * That can happen due to a bug, or due to a machine check
1120 * occurring at just the wrong time.
1121 */
1122 if (vcpu->arch.shregs.msr & MSR_HV) {
1123 printk(KERN_EMERG "KVM trap in HV mode!\n");
1124 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1125 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1126 vcpu->arch.shregs.msr);
1127 kvmppc_dump_regs(vcpu);
1128 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1129 run->hw.hardware_exit_reason = vcpu->arch.trap;
1130 return RESUME_HOST;
1131 }
de56a948
PM		 1132 run->exit_reason = KVM_EXIT_UNKNOWN;
1133 run->ready_for_interrupt_injection = 1;
1134 switch (vcpu->arch.trap) {
1135 /* We're good on these - the host merely wanted to get our attention */
1136 case BOOK3S_INTERRUPT_HV_DECREMENTER:
1137 vcpu->stat.dec_exits++;
1138 r = RESUME_GUEST;
1139 break;
1140 case BOOK3S_INTERRUPT_EXTERNAL:
5d00f66b 1141 case BOOK3S_INTERRUPT_H_DOORBELL:
84f7139c 1142 case BOOK3S_INTERRUPT_H_VIRT:
de56a948
PM		 1143 vcpu->stat.ext_intr_exits++;
1144 r = RESUME_GUEST;
1145 break;
6de6638b 1146 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/
dee6f24c 1147 case BOOK3S_INTERRUPT_HMI:
de56a948 1148 case BOOK3S_INTERRUPT_PERFMON:
6de6638b 1149 case BOOK3S_INTERRUPT_SYSTEM_RESET:
de56a948
PM		 1150 r = RESUME_GUEST;
1151 break;
b4072df4 1152 case BOOK3S_INTERRUPT_MACHINE_CHECK:
e20bbd3d
AP		 1153 /* Exit to guest with KVM_EXIT_NMI as exit reason */
1154 run->exit_reason = KVM_EXIT_NMI;
1155 run->hw.hardware_exit_reason = vcpu->arch.trap;
1156 /* Clear out the old NMI status from run->flags */
1157 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK;
1158 /* Now set the NMI status */
1159 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED)
1160 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV;
1161 else
1162 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV;
1163
1164 r = RESUME_HOST;
1165 /* Print the MCE event to host console. */
1166 machine_check_print_event_info(&vcpu->arch.mce_evt, false);
b4072df4 1167 break;
de56a948
PM		 1168 case BOOK3S_INTERRUPT_PROGRAM:
1169 {
1170 ulong flags;
1171 /*
1172 * Normally program interrupts are delivered directly
1173 * to the guest by the hardware, but we can get here
1174 * as a result of a hypervisor emulation interrupt
1175 * (e40) getting turned into a 700 by BML RTAS.
1176 */
1177 flags = vcpu->arch.shregs.msr & 0x1f0000ull;
1178 kvmppc_core_queue_program(vcpu, flags);
1179 r = RESUME_GUEST;
1180 break;
1181 }
1182 case BOOK3S_INTERRUPT_SYSCALL:
1183 {
1184 /* hcall - punt to userspace */
1185 int i;
1186
27025a60
LPF		 1187 /* hypercall with MSR_PR has already been handled in rmode,
1188 * and never reaches here.
1189 */
1190
de56a948
PM		 1191 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3);
1192 for (i = 0; i < 9; ++i)
1193 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i);
1194 run->exit_reason = KVM_EXIT_PAPR_HCALL;
1195 vcpu->arch.hcall_needed = 1;
1196 r = RESUME_HOST;
1197 break;
1198 }
1199 /*
342d3db7
PM		 1200 * We get these next two if the guest accesses a page which it thinks
1201 * it has mapped but which is not actually present, either because
1202 * it is for an emulated I/O device or because the corresonding
1203 * host page has been paged out. Any other HDSI/HISI interrupts
1204 * have been handled already.
de56a948
PM		 1205 */
1206 case BOOK3S_INTERRUPT_H_DATA_STORAGE:
913d3ff9 1207 r = RESUME_PAGE_FAULT;
de56a948
PM		 1208 break;
1209 case BOOK3S_INTERRUPT_H_INST_STORAGE:
913d3ff9 1210 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu);
32eb150a
PM		 1211 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr &
1212 DSISR_SRR1_MATCH_64S;
1213 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE)
1214 vcpu->arch.fault_dsisr |= DSISR_ISSTORE;
913d3ff9 1215 r = RESUME_PAGE_FAULT;
de56a948
PM		 1216 break;
1217 /*
1218 * This occurs if the guest executes an illegal instruction.
a59c1d9e
MS		 1219 * If the guest debug is disabled, generate a program interrupt
1220 * to the guest. If guest debug is enabled, we need to check
1221 * whether the instruction is a software breakpoint instruction.
1222 * Accordingly return to Guest or Host.
de56a948
PM		 1223 */
1224 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
4a157d61
PM		 1225 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED)
1226 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ?
1227 swab32(vcpu->arch.emul_inst) :
1228 vcpu->arch.emul_inst;
a59c1d9e
MS		 1229 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) {
1230 r = kvmppc_emulate_debug_inst(run, vcpu);
1231 } else {
1232 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1233 r = RESUME_GUEST;
1234 }
bd3048b8
ME		 1235 break;
1236 /*
1237 * This occurs if the guest (kernel or userspace), does something that
57900694
PM		 1238 * is prohibited by HFSCR.
1239 * On POWER9, this could be a doorbell instruction that we need
1240 * to emulate.
1241 * Otherwise, we just generate a program interrupt to the guest.
bd3048b8
ME		 1242 */
1243 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL:
57900694 1244 r = EMULATE_FAIL;
36ee41d1 1245 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) &&
53655ddd 1246 cpu_has_feature(CPU_FTR_ARCH_300))
57900694
PM		 1247 r = kvmppc_emulate_doorbell_instr(vcpu);
1248 if (r == EMULATE_FAIL) {
1249 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1250 r = RESUME_GUEST;
1251 }
de56a948 1252 break;
4bb3c7a0
PM		 1253
1254#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1255 case BOOK3S_INTERRUPT_HV_SOFTPATCH:
1256 /*
1257 * This occurs for various TM-related instructions that
1258 * we need to emulate on POWER9 DD2.2. We have already
1259 * handled the cases where the guest was in real-suspend
1260 * mode and was transitioning to transactional state.
1261 */
1262 r = kvmhv_p9_tm_emulation(vcpu);
1263 break;
1264#endif
1265
f7af5209
SW		 1266 case BOOK3S_INTERRUPT_HV_RM_HARD:
1267 r = RESUME_PASSTHROUGH;
1268 break;
de56a948
PM		 1269 default:
1270 kvmppc_dump_regs(vcpu);
1271 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1272 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1273 vcpu->arch.shregs.msr);
f3271d4c 1274 run->hw.hardware_exit_reason = vcpu->arch.trap;
de56a948 1275 r = RESUME_HOST;
de56a948
PM		 1276 break;
1277 }
1278
de56a948
PM		 1279 return r;
1280}
1281
360cae31
PM		 1282static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu)
1283{
1284 int r;
1285 int srcu_idx;
1286
1287 vcpu->stat.sum_exits++;
1288
1289 /*
1290 * This can happen if an interrupt occurs in the last stages
1291 * of guest entry or the first stages of guest exit (i.e. after
1292 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV
1293 * and before setting it to KVM_GUEST_MODE_HOST_HV).
1294 * That can happen due to a bug, or due to a machine check
1295 * occurring at just the wrong time.
1296 */
1297 if (vcpu->arch.shregs.msr & MSR_HV) {
1298 pr_emerg("KVM trap in HV mode while nested!\n");
1299 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1300 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1301 vcpu->arch.shregs.msr);
1302 kvmppc_dump_regs(vcpu);
1303 return RESUME_HOST;
1304 }
1305 switch (vcpu->arch.trap) {
1306 /* We're good on these - the host merely wanted to get our attention */
1307 case BOOK3S_INTERRUPT_HV_DECREMENTER:
1308 vcpu->stat.dec_exits++;
1309 r = RESUME_GUEST;
1310 break;
1311 case BOOK3S_INTERRUPT_EXTERNAL:
1312 vcpu->stat.ext_intr_exits++;
1313 r = RESUME_HOST;
1314 break;
1315 case BOOK3S_INTERRUPT_H_DOORBELL:
1316 case BOOK3S_INTERRUPT_H_VIRT:
1317 vcpu->stat.ext_intr_exits++;
1318 r = RESUME_GUEST;
1319 break;
1320 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/
1321 case BOOK3S_INTERRUPT_HMI:
1322 case BOOK3S_INTERRUPT_PERFMON:
1323 case BOOK3S_INTERRUPT_SYSTEM_RESET:
1324 r = RESUME_GUEST;
1325 break;
1326 case BOOK3S_INTERRUPT_MACHINE_CHECK:
1327 /* Pass the machine check to the L1 guest */
1328 r = RESUME_HOST;
1329 /* Print the MCE event to host console. */
1330 machine_check_print_event_info(&vcpu->arch.mce_evt, false);
1331 break;
1332 /*
1333 * We get these next two if the guest accesses a page which it thinks
1334 * it has mapped but which is not actually present, either because
1335 * it is for an emulated I/O device or because the corresonding
1336 * host page has been paged out.
1337 */
1338 case BOOK3S_INTERRUPT_H_DATA_STORAGE:
1339 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
1340 r = kvmhv_nested_page_fault(vcpu);
1341 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
1342 break;
1343 case BOOK3S_INTERRUPT_H_INST_STORAGE:
1344 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu);
1345 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) &
1346 DSISR_SRR1_MATCH_64S;
1347 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE)
1348 vcpu->arch.fault_dsisr |= DSISR_ISSTORE;
1349 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
1350 r = kvmhv_nested_page_fault(vcpu);
1351 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
1352 break;
1353
1354#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1355 case BOOK3S_INTERRUPT_HV_SOFTPATCH:
1356 /*
1357 * This occurs for various TM-related instructions that
1358 * we need to emulate on POWER9 DD2.2. We have already
1359 * handled the cases where the guest was in real-suspend
1360 * mode and was transitioning to transactional state.
1361 */
1362 r = kvmhv_p9_tm_emulation(vcpu);
1363 break;
1364#endif
1365
1366 case BOOK3S_INTERRUPT_HV_RM_HARD:
1367 vcpu->arch.trap = 0;
1368 r = RESUME_GUEST;
1369 if (!xive_enabled())
1370 kvmppc_xics_rm_complete(vcpu, 0);
1371 break;
1372 default:
1373 r = RESUME_HOST;
1374 break;
1375 }
1376
1377 return r;
1378}
1379
3a167bea
AK		 1380static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu,
1381 struct kvm_sregs *sregs)
de56a948
PM		 1382{
1383 int i;
1384
de56a948 1385 memset(sregs, 0, sizeof(struct kvm_sregs));
87916442 1386 sregs->pvr = vcpu->arch.pvr;
de56a948
PM		 1387 for (i = 0; i < vcpu->arch.slb_max; i++) {
1388 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige;
1389 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
1390 }
1391
1392 return 0;
1393}
1394
3a167bea
AK		 1395static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu,
1396 struct kvm_sregs *sregs)
de56a948
PM		 1397{
1398 int i, j;
1399
9333e6c4
PM		 1400 /* Only accept the same PVR as the host's, since we can't spoof it */
1401 if (sregs->pvr != vcpu->arch.pvr)
1402 return -EINVAL;
de56a948
PM		 1403
1404 j = 0;
1405 for (i = 0; i < vcpu->arch.slb_nr; i++) {
1406 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) {
1407 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe;
1408 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv;
1409 ++j;
1410 }
1411 }
1412 vcpu->arch.slb_max = j;
1413
1414 return 0;
1415}
1416
a0840240
AK		 1417static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr,
1418 bool preserve_top32)
a0144e2a 1419{
8f902b00 1420 struct kvm *kvm = vcpu->kvm;
a0144e2a
PM		 1421 struct kvmppc_vcore *vc = vcpu->arch.vcore;
1422 u64 mask;
1423
8f902b00 1424 mutex_lock(&kvm->lock);
a0144e2a 1425 spin_lock(&vc->lock);
d682916a
AB		 1426 /*
1427 * If ILE (interrupt little-endian) has changed, update the
1428 * MSR_LE bit in the intr_msr for each vcpu in this vcore.
1429 */
1430 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) {
d682916a
AB		 1431 struct kvm_vcpu *vcpu;
1432 int i;
1433
d682916a
AB		 1434 kvm_for_each_vcpu(i, vcpu, kvm) {
1435 if (vcpu->arch.vcore != vc)
1436 continue;
1437 if (new_lpcr & LPCR_ILE)
1438 vcpu->arch.intr_msr |= MSR_LE;
1439 else
1440 vcpu->arch.intr_msr &= ~MSR_LE;
1441 }
d682916a
AB		 1442 }
1443
a0144e2a
PM		 1444 /*
1445 * Userspace can only modify DPFD (default prefetch depth),
1446 * ILE (interrupt little-endian) and TC (translation control).
8cf4ecc0 1447 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.).
a0144e2a
PM		 1448 */
1449 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC;
e0622bd9
PM		 1450 if (cpu_has_feature(CPU_FTR_ARCH_207S))
1451 mask |= LPCR_AIL;
1bc3fe81
PM		 1452 /*
1453 * On POWER9, allow userspace to enable large decrementer for the
1454 * guest, whether or not the host has it enabled.
1455 */
1456 if (cpu_has_feature(CPU_FTR_ARCH_300))
1457 mask |= LPCR_LD;
a0840240
AK		 1458
1459 /* Broken 32-bit version of LPCR must not clear top bits */
1460 if (preserve_top32)
1461 mask &= 0xFFFFFFFF;
a0144e2a
PM		 1462 vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask);
1463 spin_unlock(&vc->lock);
8f902b00 1464 mutex_unlock(&kvm->lock);
a0144e2a
PM		 1465}
1466
3a167bea
AK		 1467static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1468 union kvmppc_one_reg *val)
31f3438e 1469{
a136a8bd
PM		 1470 int r = 0;
1471 long int i;
31f3438e 1472
a136a8bd 1473 switch (id) {
a59c1d9e
MS		 1474 case KVM_REG_PPC_DEBUG_INST:
1475 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1476 break;
31f3438e 1477 case KVM_REG_PPC_HIOR:
a136a8bd
PM		 1478 *val = get_reg_val(id, 0);
1479 break;
1480 case KVM_REG_PPC_DABR:
1481 *val = get_reg_val(id, vcpu->arch.dabr);
1482 break;
8563bf52
PM		 1483 case KVM_REG_PPC_DABRX:
1484 *val = get_reg_val(id, vcpu->arch.dabrx);
1485 break;
a136a8bd
PM		 1486 case KVM_REG_PPC_DSCR:
1487 *val = get_reg_val(id, vcpu->arch.dscr);
1488 break;
1489 case KVM_REG_PPC_PURR:
1490 *val = get_reg_val(id, vcpu->arch.purr);
1491 break;
1492 case KVM_REG_PPC_SPURR:
1493 *val = get_reg_val(id, vcpu->arch.spurr);
1494 break;
1495 case KVM_REG_PPC_AMR:
1496 *val = get_reg_val(id, vcpu->arch.amr);
1497 break;
1498 case KVM_REG_PPC_UAMOR:
1499 *val = get_reg_val(id, vcpu->arch.uamor);
1500 break;
b005255e 1501 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
a136a8bd
PM		 1502 i = id - KVM_REG_PPC_MMCR0;
1503 *val = get_reg_val(id, vcpu->arch.mmcr[i]);
1504 break;
1505 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1506 i = id - KVM_REG_PPC_PMC1;
1507 *val = get_reg_val(id, vcpu->arch.pmc[i]);
31f3438e 1508 break;
b005255e
MN		 1509 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1510 i = id - KVM_REG_PPC_SPMC1;
1511 *val = get_reg_val(id, vcpu->arch.spmc[i]);
1512 break;
14941789
PM		 1513 case KVM_REG_PPC_SIAR:
1514 *val = get_reg_val(id, vcpu->arch.siar);
1515 break;
1516 case KVM_REG_PPC_SDAR:
1517 *val = get_reg_val(id, vcpu->arch.sdar);
1518 break;
b005255e
MN		 1519 case KVM_REG_PPC_SIER:
1520 *val = get_reg_val(id, vcpu->arch.sier);
a8bd19ef 1521 break;
b005255e
MN		 1522 case KVM_REG_PPC_IAMR:
1523 *val = get_reg_val(id, vcpu->arch.iamr);
1524 break;
b005255e
MN		 1525 case KVM_REG_PPC_PSPB:
1526 *val = get_reg_val(id, vcpu->arch.pspb);
1527 break;
b005255e
MN		 1528 case KVM_REG_PPC_DPDES:
1529 *val = get_reg_val(id, vcpu->arch.vcore->dpdes);
1530 break;
88b02cf9
PM		 1531 case KVM_REG_PPC_VTB:
1532 *val = get_reg_val(id, vcpu->arch.vcore->vtb);
1533 break;
b005255e
MN		 1534 case KVM_REG_PPC_DAWR:
1535 *val = get_reg_val(id, vcpu->arch.dawr);
1536 break;
1537 case KVM_REG_PPC_DAWRX:
1538 *val = get_reg_val(id, vcpu->arch.dawrx);
1539 break;
1540 case KVM_REG_PPC_CIABR:
1541 *val = get_reg_val(id, vcpu->arch.ciabr);
1542 break;
b005255e
MN		 1543 case KVM_REG_PPC_CSIGR:
1544 *val = get_reg_val(id, vcpu->arch.csigr);
1545 break;
1546 case KVM_REG_PPC_TACR:
1547 *val = get_reg_val(id, vcpu->arch.tacr);
1548 break;
1549 case KVM_REG_PPC_TCSCR:
1550 *val = get_reg_val(id, vcpu->arch.tcscr);
1551 break;
1552 case KVM_REG_PPC_PID:
1553 *val = get_reg_val(id, vcpu->arch.pid);
1554 break;
1555 case KVM_REG_PPC_ACOP:
1556 *val = get_reg_val(id, vcpu->arch.acop);
1557 break;
1558 case KVM_REG_PPC_WORT:
1559 *val = get_reg_val(id, vcpu->arch.wort);
a8bd19ef 1560 break;
e9cf1e08
PM		 1561 case KVM_REG_PPC_TIDR:
1562 *val = get_reg_val(id, vcpu->arch.tid);
1563 break;
1564 case KVM_REG_PPC_PSSCR:
1565 *val = get_reg_val(id, vcpu->arch.psscr);
1566 break;
55b665b0
PM		 1567 case KVM_REG_PPC_VPA_ADDR:
1568 spin_lock(&vcpu->arch.vpa_update_lock);
1569 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa);
1570 spin_unlock(&vcpu->arch.vpa_update_lock);
1571 break;
1572 case KVM_REG_PPC_VPA_SLB:
1573 spin_lock(&vcpu->arch.vpa_update_lock);
1574 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa;
1575 val->vpaval.length = vcpu->arch.slb_shadow.len;
1576 spin_unlock(&vcpu->arch.vpa_update_lock);
1577 break;
1578 case KVM_REG_PPC_VPA_DTL:
1579 spin_lock(&vcpu->arch.vpa_update_lock);
1580 val->vpaval.addr = vcpu->arch.dtl.next_gpa;
1581 val->vpaval.length = vcpu->arch.dtl.len;
1582 spin_unlock(&vcpu->arch.vpa_update_lock);
1583 break;
93b0f4dc
PM		 1584 case KVM_REG_PPC_TB_OFFSET:
1585 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset);
1586 break;
a0144e2a 1587 case KVM_REG_PPC_LPCR:
a0840240 1588 case KVM_REG_PPC_LPCR_64:
a0144e2a
PM		 1589 *val = get_reg_val(id, vcpu->arch.vcore->lpcr);
1590 break;
4b8473c9
PM		 1591 case KVM_REG_PPC_PPR:
1592 *val = get_reg_val(id, vcpu->arch.ppr);
1593 break;
a7d80d01
MN		 1594#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1595 case KVM_REG_PPC_TFHAR:
1596 *val = get_reg_val(id, vcpu->arch.tfhar);
1597 break;
1598 case KVM_REG_PPC_TFIAR:
1599 *val = get_reg_val(id, vcpu->arch.tfiar);
1600 break;
1601 case KVM_REG_PPC_TEXASR:
1602 *val = get_reg_val(id, vcpu->arch.texasr);
1603 break;
1604 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1605 i = id - KVM_REG_PPC_TM_GPR0;
1606 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]);
1607 break;
1608 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1609 {
1610 int j;
1611 i = id - KVM_REG_PPC_TM_VSR0;
1612 if (i < 32)
1613 for (j = 0; j < TS_FPRWIDTH; j++)
1614 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j];
1615 else {
1616 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1617 val->vval = vcpu->arch.vr_tm.vr[i-32];
1618 else
1619 r = -ENXIO;
1620 }
1621 break;
1622 }
1623 case KVM_REG_PPC_TM_CR:
1624 *val = get_reg_val(id, vcpu->arch.cr_tm);
1625 break;
0d808df0
PM		 1626 case KVM_REG_PPC_TM_XER:
1627 *val = get_reg_val(id, vcpu->arch.xer_tm);
1628 break;
a7d80d01
MN		 1629 case KVM_REG_PPC_TM_LR:
1630 *val = get_reg_val(id, vcpu->arch.lr_tm);
1631 break;
1632 case KVM_REG_PPC_TM_CTR:
1633 *val = get_reg_val(id, vcpu->arch.ctr_tm);
1634 break;
1635 case KVM_REG_PPC_TM_FPSCR:
1636 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr);
1637 break;
1638 case KVM_REG_PPC_TM_AMR:
1639 *val = get_reg_val(id, vcpu->arch.amr_tm);
1640 break;
1641 case KVM_REG_PPC_TM_PPR:
1642 *val = get_reg_val(id, vcpu->arch.ppr_tm);
1643 break;
1644 case KVM_REG_PPC_TM_VRSAVE:
1645 *val = get_reg_val(id, vcpu->arch.vrsave_tm);
1646 break;
1647 case KVM_REG_PPC_TM_VSCR:
1648 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1649 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]);
1650 else
1651 r = -ENXIO;
1652 break;
1653 case KVM_REG_PPC_TM_DSCR:
1654 *val = get_reg_val(id, vcpu->arch.dscr_tm);
1655 break;
1656 case KVM_REG_PPC_TM_TAR:
1657 *val = get_reg_val(id, vcpu->arch.tar_tm);
1658 break;
1659#endif
388cc6e1
PM		 1660 case KVM_REG_PPC_ARCH_COMPAT:
1661 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat);
1662 break;
5855564c
PM		 1663 case KVM_REG_PPC_DEC_EXPIRY:
1664 *val = get_reg_val(id, vcpu->arch.dec_expires +
1665 vcpu->arch.vcore->tb_offset);
1666 break;
a1f15826
PM		 1667 case KVM_REG_PPC_ONLINE:
1668 *val = get_reg_val(id, vcpu->arch.online);
1669 break;
31f3438e 1670 default:
a136a8bd 1671 r = -EINVAL;
31f3438e
PM		 1672 break;
1673 }
1674
1675 return r;
1676}
1677
3a167bea
AK		 1678static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1679 union kvmppc_one_reg *val)
31f3438e 1680{
a136a8bd
PM		 1681 int r = 0;
1682 long int i;
55b665b0 1683 unsigned long addr, len;
31f3438e 1684
a136a8bd 1685 switch (id) {
31f3438e 1686 case KVM_REG_PPC_HIOR:
31f3438e 1687 /* Only allow this to be set to zero */
a136a8bd 1688 if (set_reg_val(id, *val))
31f3438e
PM		 1689 r = -EINVAL;
1690 break;
a136a8bd
PM		 1691 case KVM_REG_PPC_DABR:
1692 vcpu->arch.dabr = set_reg_val(id, *val);
1693 break;
8563bf52
PM		 1694 case KVM_REG_PPC_DABRX:
1695 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP;
1696 break;
a136a8bd
PM		 1697 case KVM_REG_PPC_DSCR:
1698 vcpu->arch.dscr = set_reg_val(id, *val);
1699 break;
1700 case KVM_REG_PPC_PURR:
1701 vcpu->arch.purr = set_reg_val(id, *val);
1702 break;
1703 case KVM_REG_PPC_SPURR:
1704 vcpu->arch.spurr = set_reg_val(id, *val);
1705 break;
1706 case KVM_REG_PPC_AMR:
1707 vcpu->arch.amr = set_reg_val(id, *val);
1708 break;
1709 case KVM_REG_PPC_UAMOR:
1710 vcpu->arch.uamor = set_reg_val(id, *val);
1711 break;
b005255e 1712 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
a136a8bd
PM		 1713 i = id - KVM_REG_PPC_MMCR0;
1714 vcpu->arch.mmcr[i] = set_reg_val(id, *val);
1715 break;
1716 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1717 i = id - KVM_REG_PPC_PMC1;
1718 vcpu->arch.pmc[i] = set_reg_val(id, *val);
1719 break;
b005255e
MN		 1720 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1721 i = id - KVM_REG_PPC_SPMC1;
1722 vcpu->arch.spmc[i] = set_reg_val(id, *val);
1723 break;
14941789
PM		 1724 case KVM_REG_PPC_SIAR:
1725 vcpu->arch.siar = set_reg_val(id, *val);
1726 break;
1727 case KVM_REG_PPC_SDAR:
1728 vcpu->arch.sdar = set_reg_val(id, *val);
1729 break;
b005255e
MN		 1730 case KVM_REG_PPC_SIER:
1731 vcpu->arch.sier = set_reg_val(id, *val);
a8bd19ef 1732 break;
b005255e
MN		 1733 case KVM_REG_PPC_IAMR:
1734 vcpu->arch.iamr = set_reg_val(id, *val);
1735 break;
b005255e
MN		 1736 case KVM_REG_PPC_PSPB:
1737 vcpu->arch.pspb = set_reg_val(id, *val);
1738 break;
b005255e
MN		 1739 case KVM_REG_PPC_DPDES:
1740 vcpu->arch.vcore->dpdes = set_reg_val(id, *val);
1741 break;
88b02cf9
PM		 1742 case KVM_REG_PPC_VTB:
1743 vcpu->arch.vcore->vtb = set_reg_val(id, *val);
1744 break;
b005255e
MN		 1745 case KVM_REG_PPC_DAWR:
1746 vcpu->arch.dawr = set_reg_val(id, *val);
1747 break;
1748 case KVM_REG_PPC_DAWRX:
1749 vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP;
1750 break;
1751 case KVM_REG_PPC_CIABR:
1752 vcpu->arch.ciabr = set_reg_val(id, *val);
1753 /* Don't allow setting breakpoints in hypervisor code */
1754 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER)
1755 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */
1756 break;
b005255e
MN		 1757 case KVM_REG_PPC_CSIGR:
1758 vcpu->arch.csigr = set_reg_val(id, *val);
1759 break;
1760 case KVM_REG_PPC_TACR:
1761 vcpu->arch.tacr = set_reg_val(id, *val);
1762 break;
1763 case KVM_REG_PPC_TCSCR:
1764 vcpu->arch.tcscr = set_reg_val(id, *val);
1765 break;
1766 case KVM_REG_PPC_PID:
1767 vcpu->arch.pid = set_reg_val(id, *val);
1768 break;
1769 case KVM_REG_PPC_ACOP:
1770 vcpu->arch.acop = set_reg_val(id, *val);
1771 break;
1772 case KVM_REG_PPC_WORT:
1773 vcpu->arch.wort = set_reg_val(id, *val);
a8bd19ef 1774 break;
e9cf1e08
PM		 1775 case KVM_REG_PPC_TIDR:
1776 vcpu->arch.tid = set_reg_val(id, *val);
1777 break;
1778 case KVM_REG_PPC_PSSCR:
1779 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS;
1780 break;
55b665b0
PM		 1781 case KVM_REG_PPC_VPA_ADDR:
1782 addr = set_reg_val(id, *val);
1783 r = -EINVAL;
1784 if (!addr && (vcpu->arch.slb_shadow.next_gpa ||
1785 vcpu->arch.dtl.next_gpa))
1786 break;
1787 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca));
1788 break;
1789 case KVM_REG_PPC_VPA_SLB:
1790 addr = val->vpaval.addr;
1791 len = val->vpaval.length;
1792 r = -EINVAL;
1793 if (addr && !vcpu->arch.vpa.next_gpa)
1794 break;
1795 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len);
1796 break;
1797 case KVM_REG_PPC_VPA_DTL:
1798 addr = val->vpaval.addr;
1799 len = val->vpaval.length;
1800 r = -EINVAL;
9f8c8c78
PM		 1801 if (addr && (len < sizeof(struct dtl_entry) ||
1802 !vcpu->arch.vpa.next_gpa))
55b665b0
PM		 1803 break;
1804 len -= len % sizeof(struct dtl_entry);
1805 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len);
1806 break;
93b0f4dc
PM		 1807 case KVM_REG_PPC_TB_OFFSET:
1808 /* round up to multiple of 2^24 */
1809 vcpu->arch.vcore->tb_offset =
1810 ALIGN(set_reg_val(id, *val), 1UL << 24);
1811 break;
a0144e2a 1812 case KVM_REG_PPC_LPCR:
a0840240
AK		 1813 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true);
1814 break;
1815 case KVM_REG_PPC_LPCR_64:
1816 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false);
a0144e2a 1817 break;
4b8473c9
PM		 1818 case KVM_REG_PPC_PPR:
1819 vcpu->arch.ppr = set_reg_val(id, *val);
1820 break;
a7d80d01
MN		 1821#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1822 case KVM_REG_PPC_TFHAR:
1823 vcpu->arch.tfhar = set_reg_val(id, *val);
1824 break;
1825 case KVM_REG_PPC_TFIAR:
1826 vcpu->arch.tfiar = set_reg_val(id, *val);
1827 break;
1828 case KVM_REG_PPC_TEXASR:
1829 vcpu->arch.texasr = set_reg_val(id, *val);
1830 break;
1831 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1832 i = id - KVM_REG_PPC_TM_GPR0;
1833 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val);
1834 break;
1835 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1836 {
1837 int j;
1838 i = id - KVM_REG_PPC_TM_VSR0;
1839 if (i < 32)
1840 for (j = 0; j < TS_FPRWIDTH; j++)
1841 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j];
1842 else
1843 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1844 vcpu->arch.vr_tm.vr[i-32] = val->vval;
1845 else
1846 r = -ENXIO;
1847 break;
1848 }
1849 case KVM_REG_PPC_TM_CR:
1850 vcpu->arch.cr_tm = set_reg_val(id, *val);
1851 break;
0d808df0
PM		 1852 case KVM_REG_PPC_TM_XER:
1853 vcpu->arch.xer_tm = set_reg_val(id, *val);
1854 break;
a7d80d01
MN		 1855 case KVM_REG_PPC_TM_LR:
1856 vcpu->arch.lr_tm = set_reg_val(id, *val);
1857 break;
1858 case KVM_REG_PPC_TM_CTR:
1859 vcpu->arch.ctr_tm = set_reg_val(id, *val);
1860 break;
1861 case KVM_REG_PPC_TM_FPSCR:
1862 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val);
1863 break;
1864 case KVM_REG_PPC_TM_AMR:
1865 vcpu->arch.amr_tm = set_reg_val(id, *val);
1866 break;
1867 case KVM_REG_PPC_TM_PPR:
1868 vcpu->arch.ppr_tm = set_reg_val(id, *val);
1869 break;
1870 case KVM_REG_PPC_TM_VRSAVE:
1871 vcpu->arch.vrsave_tm = set_reg_val(id, *val);
1872 break;
1873 case KVM_REG_PPC_TM_VSCR:
1874 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1875 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val);
1876 else
1877 r = - ENXIO;
1878 break;
1879 case KVM_REG_PPC_TM_DSCR:
1880 vcpu->arch.dscr_tm = set_reg_val(id, *val);
1881 break;
1882 case KVM_REG_PPC_TM_TAR:
1883 vcpu->arch.tar_tm = set_reg_val(id, *val);
1884 break;
1885#endif
388cc6e1
PM		 1886 case KVM_REG_PPC_ARCH_COMPAT:
1887 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val));
1888 break;
5855564c
PM		 1889 case KVM_REG_PPC_DEC_EXPIRY:
1890 vcpu->arch.dec_expires = set_reg_val(id, *val) -
1891 vcpu->arch.vcore->tb_offset;
1892 break;
a1f15826 1893 case KVM_REG_PPC_ONLINE:
7aa15842
PM		 1894 i = set_reg_val(id, *val);
1895 if (i && !vcpu->arch.online)
1896 atomic_inc(&vcpu->arch.vcore->online_count);
1897 else if (!i && vcpu->arch.online)
1898 atomic_dec(&vcpu->arch.vcore->online_count);
1899 vcpu->arch.online = i;
a1f15826 1900 break;
31f3438e 1901 default:
a136a8bd 1902 r = -EINVAL;
31f3438e
PM		 1903 break;
1904 }
1905
1906 return r;
1907}
1908
45c940ba
PM		 1909/*
1910 * On POWER9, threads are independent and can be in different partitions.
1911 * Therefore we consider each thread to be a subcore.
1912 * There is a restriction that all threads have to be in the same
1913 * MMU mode (radix or HPT), unfortunately, but since we only support
1914 * HPT guests on a HPT host so far, that isn't an impediment yet.
1915 */
516f7898 1916static int threads_per_vcore(struct kvm *kvm)
45c940ba 1917{
516f7898 1918 if (kvm->arch.threads_indep)
45c940ba
PM		 1919 return 1;
1920 return threads_per_subcore;
1921}
1922
1e175d2e 1923static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id)
de9bdd1a
SS		 1924{
1925 struct kvmppc_vcore *vcore;
1926
1927 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL);
1928
1929 if (vcore == NULL)
1930 return NULL;
1931
de9bdd1a 1932 spin_lock_init(&vcore->lock);
2711e248 1933 spin_lock_init(&vcore->stoltb_lock);
8577370f 1934 init_swait_queue_head(&vcore->wq);
de9bdd1a
SS		 1935 vcore->preempt_tb = TB_NIL;
1936 vcore->lpcr = kvm->arch.lpcr;
1e175d2e 1937 vcore->first_vcpuid = id;
de9bdd1a 1938 vcore->kvm = kvm;
ec257165 1939 INIT_LIST_HEAD(&vcore->preempt_list);
de9bdd1a
SS		 1940
1941 return vcore;
1942}
1943
b6c295df
PM		 1944#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
1945static struct debugfs_timings_element {
1946 const char *name;
1947 size_t offset;
1948} timings[] = {
1949 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)},
1950 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)},
1951 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)},
1952 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)},
1953 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)},
1954};
1955
4bb817ed 1956#define N_TIMINGS (ARRAY_SIZE(timings))
b6c295df
PM		 1957
1958struct debugfs_timings_state {
1959 struct kvm_vcpu *vcpu;
1960 unsigned int buflen;
1961 char buf[N_TIMINGS * 100];
1962};
1963
1964static int debugfs_timings_open(struct inode *inode, struct file *file)
1965{
1966 struct kvm_vcpu *vcpu = inode->i_private;
1967 struct debugfs_timings_state *p;
1968
1969 p = kzalloc(sizeof(*p), GFP_KERNEL);
1970 if (!p)
1971 return -ENOMEM;
1972
1973 kvm_get_kvm(vcpu->kvm);
1974 p->vcpu = vcpu;
1975 file->private_data = p;
1976
1977 return nonseekable_open(inode, file);
1978}
1979
1980static int debugfs_timings_release(struct inode *inode, struct file *file)
1981{
1982 struct debugfs_timings_state *p = file->private_data;
1983
1984 kvm_put_kvm(p->vcpu->kvm);
1985 kfree(p);
1986 return 0;
1987}
1988
1989static ssize_t debugfs_timings_read(struct file *file, char __user *buf,
1990 size_t len, loff_t *ppos)
1991{
1992 struct debugfs_timings_state *p = file->private_data;
1993 struct kvm_vcpu *vcpu = p->vcpu;
1994 char *s, *buf_end;
1995 struct kvmhv_tb_accumulator tb;
1996 u64 count;
1997 loff_t pos;
1998 ssize_t n;
1999 int i, loops;
2000 bool ok;
2001
2002 if (!p->buflen) {
2003 s = p->buf;
2004 buf_end = s + sizeof(p->buf);
2005 for (i = 0; i < N_TIMINGS; ++i) {
2006 struct kvmhv_tb_accumulator *acc;
2007
2008 acc = (struct kvmhv_tb_accumulator *)
2009 ((unsigned long)vcpu + timings[i].offset);
2010 ok = false;
2011 for (loops = 0; loops < 1000; ++loops) {
2012 count = acc->seqcount;
2013 if (!(count & 1)) {
2014 smp_rmb();
2015 tb = *acc;
2016 smp_rmb();
2017 if (count == acc->seqcount) {
2018 ok = true;
2019 break;
2020 }
2021 }
2022 udelay(1);
2023 }
2024 if (!ok)
2025 snprintf(s, buf_end - s, "%s: stuck\n",
2026 timings[i].name);
2027 else
2028 snprintf(s, buf_end - s,
2029 "%s: %llu %llu %llu %llu\n",
2030 timings[i].name, count / 2,
2031 tb_to_ns(tb.tb_total),
2032 tb_to_ns(tb.tb_min),
2033 tb_to_ns(tb.tb_max));
2034 s += strlen(s);
2035 }
2036 p->buflen = s - p->buf;
2037 }
2038
2039 pos = *ppos;
2040 if (pos >= p->buflen)
2041 return 0;
2042 if (len > p->buflen - pos)
2043 len = p->buflen - pos;
2044 n = copy_to_user(buf, p->buf + pos, len);
2045 if (n) {
2046 if (n == len)
2047 return -EFAULT;
2048 len -= n;
2049 }
2050 *ppos = pos + len;
2051 return len;
2052}
2053
2054static ssize_t debugfs_timings_write(struct file *file, const char __user *buf,
2055 size_t len, loff_t *ppos)
2056{
2057 return -EACCES;
2058}
2059
2060static const struct file_operations debugfs_timings_ops = {
2061 .owner = THIS_MODULE,
2062 .open = debugfs_timings_open,
2063 .release = debugfs_timings_release,
2064 .read = debugfs_timings_read,
2065 .write = debugfs_timings_write,
2066 .llseek = generic_file_llseek,
2067};
2068
2069/* Create a debugfs directory for the vcpu */
2070static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
2071{
2072 char buf[16];
2073 struct kvm *kvm = vcpu->kvm;
2074
2075 snprintf(buf, sizeof(buf), "vcpu%u", id);
2076 if (IS_ERR_OR_NULL(kvm->arch.debugfs_dir))
2077 return;
2078 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir);
2079 if (IS_ERR_OR_NULL(vcpu->arch.debugfs_dir))
2080 return;
2081 vcpu->arch.debugfs_timings =
2082 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir,
2083 vcpu, &debugfs_timings_ops);
2084}
2085
2086#else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
2087static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
2088{
2089}
2090#endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
2091
3a167bea
AK		 2092static struct kvm_vcpu *kvmppc_core_vcpu_create_hv(struct kvm *kvm,
2093 unsigned int id)
de56a948
PM		 2094{
2095 struct kvm_vcpu *vcpu;
3c313524 2096 int err;
371fefd6
PM		 2097 int core;
2098 struct kvmppc_vcore *vcore;
de56a948 2099
371fefd6 2100 err = -ENOMEM;
6b75e6bf 2101 vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
de56a948
PM		 2102 if (!vcpu)
2103 goto out;
2104
2105 err = kvm_vcpu_init(vcpu, kvm, id);
2106 if (err)
2107 goto free_vcpu;
2108
2109 vcpu->arch.shared = &vcpu->arch.shregs;
5deb8e7a
AG		 2110#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
2111 /*
2112 * The shared struct is never shared on HV,
2113 * so we can always use host endianness
2114 */
2115#ifdef __BIG_ENDIAN__
2116 vcpu->arch.shared_big_endian = true;
2117#else
2118 vcpu->arch.shared_big_endian = false;
2119#endif
2120#endif
de56a948
PM		 2121 vcpu->arch.mmcr[0] = MMCR0_FC;
2122 vcpu->arch.ctrl = CTRL_RUNLATCH;
2123 /* default to host PVR, since we can't spoof it */
3a167bea 2124 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR));
2e25aa5f 2125 spin_lock_init(&vcpu->arch.vpa_update_lock);
c7b67670
PM		 2126 spin_lock_init(&vcpu->arch.tbacct_lock);
2127 vcpu->arch.busy_preempt = TB_NIL;
d682916a 2128 vcpu->arch.intr_msr = MSR_SF | MSR_ME;
de56a948 2129
769377f7
PM		 2130 /*
2131 * Set the default HFSCR for the guest from the host value.
2132 * This value is only used on POWER9.
57900694
PM		 2133 * On POWER9, we want to virtualize the doorbell facility, so we
2134 * turn off the HFSCR bit, which causes those instructions to trap.
769377f7
PM		 2135 */
2136 vcpu->arch.hfscr = mfspr(SPRN_HFSCR);
4bb3c7a0
PM		 2137 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
2138 vcpu->arch.hfscr |= HFSCR_TM;
2139 else if (!cpu_has_feature(CPU_FTR_TM_COMP))
769377f7 2140 vcpu->arch.hfscr &= ~HFSCR_TM;
57900694
PM		 2141 if (cpu_has_feature(CPU_FTR_ARCH_300))
2142 vcpu->arch.hfscr &= ~HFSCR_MSGP;
769377f7 2143
de56a948
PM		 2144 kvmppc_mmu_book3s_hv_init(vcpu);
2145
8455d79e 2146 vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
371fefd6
PM		 2147
2148 init_waitqueue_head(&vcpu->arch.cpu_run);
2149
2150 mutex_lock(&kvm->lock);
3c313524
PM		 2151 vcore = NULL;
2152 err = -EINVAL;
1e175d2e 2153 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
b5c6f760
PM		 2154 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) {
2155 pr_devel("KVM: VCPU ID too high\n");
2156 core = KVM_MAX_VCORES;
2157 } else {
2158 BUG_ON(kvm->arch.smt_mode != 1);
2159 core = kvmppc_pack_vcpu_id(kvm, id);
2160 }
1e175d2e
SB		 2161 } else {
2162 core = id / kvm->arch.smt_mode;
2163 }
3c313524
PM		 2164 if (core < KVM_MAX_VCORES) {
2165 vcore = kvm->arch.vcores[core];
1e175d2e
SB		 2166 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) {
2167 pr_devel("KVM: collision on id %u", id);
2168 vcore = NULL;
2169 } else if (!vcore) {
3c313524 2170 err = -ENOMEM;
1e175d2e
SB		 2171 vcore = kvmppc_vcore_create(kvm,
2172 id & ~(kvm->arch.smt_mode - 1));
3c313524
PM		 2173 kvm->arch.vcores[core] = vcore;
2174 kvm->arch.online_vcores++;
2175 }
371fefd6
PM		 2176 }
2177 mutex_unlock(&kvm->lock);
2178
2179 if (!vcore)
2180 goto free_vcpu;
2181
2182 spin_lock(&vcore->lock);
2183 ++vcore->num_threads;
371fefd6
PM		 2184 spin_unlock(&vcore->lock);
2185 vcpu->arch.vcore = vcore;
e0b7ec05 2186 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid;
ec257165 2187 vcpu->arch.thread_cpu = -1;
a29ebeaf 2188 vcpu->arch.prev_cpu = -1;
371fefd6 2189
af8f38b3
AG		 2190 vcpu->arch.cpu_type = KVM_CPU_3S_64;
2191 kvmppc_sanity_check(vcpu);
2192
b6c295df
PM		 2193 debugfs_vcpu_init(vcpu, id);
2194
de56a948
PM		 2195 return vcpu;
2196
2197free_vcpu:
6b75e6bf 2198 kmem_cache_free(kvm_vcpu_cache, vcpu);
de56a948
PM		 2199out:
2200 return ERR_PTR(err);
2201}
2202
3c313524
PM		 2203static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode,
2204 unsigned long flags)
2205{
2206 int err;
57900694 2207 int esmt = 0;
3c313524
PM		 2208
2209 if (flags)
2210 return -EINVAL;
2211 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode))
2212 return -EINVAL;
2213 if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
2214 /*
2215 * On POWER8 (or POWER7), the threading mode is "strict",
2216 * so we pack smt_mode vcpus per vcore.
2217 */
2218 if (smt_mode > threads_per_subcore)
2219 return -EINVAL;
2220 } else {
2221 /*
2222 * On POWER9, the threading mode is "loose",
2223 * so each vcpu gets its own vcore.
2224 */
57900694 2225 esmt = smt_mode;
3c313524
PM		 2226 smt_mode = 1;
2227 }
2228 mutex_lock(&kvm->lock);
2229 err = -EBUSY;
2230 if (!kvm->arch.online_vcores) {
2231 kvm->arch.smt_mode = smt_mode;
57900694 2232 kvm->arch.emul_smt_mode = esmt;
3c313524
PM		 2233 err = 0;
2234 }
2235 mutex_unlock(&kvm->lock);
2236
2237 return err;
2238}
2239
c35635ef
PM		 2240static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa)
2241{
2242 if (vpa->pinned_addr)
2243 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa,
2244 vpa->dirty);
2245}
2246
3a167bea 2247static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu)
de56a948 2248{
2e25aa5f 2249 spin_lock(&vcpu->arch.vpa_update_lock);
c35635ef
PM		 2250 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl);
2251 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow);
2252 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa);
2e25aa5f 2253 spin_unlock(&vcpu->arch.vpa_update_lock);
de56a948 2254 kvm_vcpu_uninit(vcpu);
6b75e6bf 2255 kmem_cache_free(kvm_vcpu_cache, vcpu);
de56a948
PM		 2256}
2257
3a167bea
AK		 2258static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu)
2259{
2260 /* Indicate we want to get back into the guest */
2261 return 1;
2262}
2263
19ccb76a 2264static void kvmppc_set_timer(struct kvm_vcpu *vcpu)
371fefd6 2265{
19ccb76a 2266 unsigned long dec_nsec, now;
371fefd6 2267
19ccb76a
PM		 2268 now = get_tb();
2269 if (now > vcpu->arch.dec_expires) {
2270 /* decrementer has already gone negative */
2271 kvmppc_core_queue_dec(vcpu);
7e28e60e 2272 kvmppc_core_prepare_to_enter(vcpu);
19ccb76a 2273 return;
371fefd6 2274 }
19ccb76a
PM		 2275 dec_nsec = (vcpu->arch.dec_expires - now) * NSEC_PER_SEC
2276 / tb_ticks_per_sec;
8b0e1953 2277 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL);
19ccb76a 2278 vcpu->arch.timer_running = 1;
371fefd6
PM		 2279}
2280
19ccb76a 2281static void kvmppc_end_cede(struct kvm_vcpu *vcpu)
371fefd6 2282{
19ccb76a
PM		 2283 vcpu->arch.ceded = 0;
2284 if (vcpu->arch.timer_running) {
2285 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2286 vcpu->arch.timer_running = 0;
2287 }
371fefd6
PM		 2288}
2289
8b24e69f 2290extern int __kvmppc_vcore_entry(void);
de56a948 2291
371fefd6
PM		 2292static void kvmppc_remove_runnable(struct kvmppc_vcore *vc,
2293 struct kvm_vcpu *vcpu)
de56a948 2294{
c7b67670
PM		 2295 u64 now;
2296
371fefd6
PM		 2297 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
2298 return;
bf3d32e1 2299 spin_lock_irq(&vcpu->arch.tbacct_lock);
c7b67670
PM		 2300 now = mftb();
2301 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) -
2302 vcpu->arch.stolen_logged;
2303 vcpu->arch.busy_preempt = now;
2304 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
bf3d32e1 2305 spin_unlock_irq(&vcpu->arch.tbacct_lock);
371fefd6 2306 --vc->n_runnable;
7b5f8272 2307 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL);
371fefd6
PM		 2308}
2309
f0888f70
PM		 2310static int kvmppc_grab_hwthread(int cpu)
2311{
2312 struct paca_struct *tpaca;
b754c739 2313 long timeout = 10000;
f0888f70 2314
d2e60075 2315 tpaca = paca_ptrs[cpu];
f0888f70
PM		 2316
2317 /* Ensure the thread won't go into the kernel if it wakes */
7b444c67 2318 tpaca->kvm_hstate.kvm_vcpu = NULL;
b4deba5c 2319 tpaca->kvm_hstate.kvm_vcore = NULL;
5d5b99cd
PM		 2320 tpaca->kvm_hstate.napping = 0;
2321 smp_wmb();
2322 tpaca->kvm_hstate.hwthread_req = 1;
f0888f70
PM		 2323
2324 /*
2325 * If the thread is already executing in the kernel (e.g. handling
2326 * a stray interrupt), wait for it to get back to nap mode.
2327 * The smp_mb() is to ensure that our setting of hwthread_req
2328 * is visible before we look at hwthread_state, so if this
2329 * races with the code at system_reset_pSeries and the thread
2330 * misses our setting of hwthread_req, we are sure to see its
2331 * setting of hwthread_state, and vice versa.
2332 */
2333 smp_mb();
2334 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) {
2335 if (--timeout <= 0) {
2336 pr_err("KVM: couldn't grab cpu %d\n", cpu);
2337 return -EBUSY;
2338 }
2339 udelay(1);
2340 }
2341 return 0;
2342}
2343
2344static void kvmppc_release_hwthread(int cpu)
2345{
2346 struct paca_struct *tpaca;
2347
d2e60075 2348 tpaca = paca_ptrs[cpu];
31a4d448 2349 tpaca->kvm_hstate.hwthread_req = 0;
f0888f70 2350 tpaca->kvm_hstate.kvm_vcpu = NULL;
b4deba5c
PM		 2351 tpaca->kvm_hstate.kvm_vcore = NULL;
2352 tpaca->kvm_hstate.kvm_split_mode = NULL;
f0888f70
PM		 2353}
2354
a29ebeaf
PM		 2355static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu)
2356{
2357 int i;
2358
2359 cpu = cpu_first_thread_sibling(cpu);
2360 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush);
2361 /*
2362 * Make sure setting of bit in need_tlb_flush precedes
2363 * testing of cpu_in_guest bits. The matching barrier on
2364 * the other side is the first smp_mb() in kvmppc_run_core().
2365 */
2366 smp_mb();
2367 for (i = 0; i < threads_per_core; ++i)
2368 if (cpumask_test_cpu(cpu + i, &kvm->arch.cpu_in_guest))
2369 smp_call_function_single(cpu + i, do_nothing, NULL, 1);
2370}
2371
8b24e69f
PM		 2372static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu)
2373{
2374 struct kvm *kvm = vcpu->kvm;
2375
2376 /*
2377 * With radix, the guest can do TLB invalidations itself,
2378 * and it could choose to use the local form (tlbiel) if
2379 * it is invalidating a translation that has only ever been
2380 * used on one vcpu. However, that doesn't mean it has
2381 * only ever been used on one physical cpu, since vcpus
2382 * can move around between pcpus. To cope with this, when
2383 * a vcpu moves from one pcpu to another, we need to tell
2384 * any vcpus running on the same core as this vcpu previously
2385 * ran to flush the TLB. The TLB is shared between threads,
2386 * so we use a single bit in .need_tlb_flush for all 4 threads.
2387 */
2388 if (vcpu->arch.prev_cpu != pcpu) {
2389 if (vcpu->arch.prev_cpu >= 0 &&
2390 cpu_first_thread_sibling(vcpu->arch.prev_cpu) !=
2391 cpu_first_thread_sibling(pcpu))
2392 radix_flush_cpu(kvm, vcpu->arch.prev_cpu, vcpu);
2393 vcpu->arch.prev_cpu = pcpu;
2394 }
2395}
2396
b4deba5c 2397static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc)
371fefd6
PM		 2398{
2399 int cpu;
2400 struct paca_struct *tpaca;
a29ebeaf 2401 struct kvm *kvm = vc->kvm;
371fefd6 2402
b4deba5c
PM		 2403 cpu = vc->pcpu;
2404 if (vcpu) {
2405 if (vcpu->arch.timer_running) {
2406 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2407 vcpu->arch.timer_running = 0;
2408 }
2409 cpu += vcpu->arch.ptid;
898b25b2 2410 vcpu->cpu = vc->pcpu;
b4deba5c 2411 vcpu->arch.thread_cpu = cpu;
a29ebeaf 2412 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest);
19ccb76a 2413 }
d2e60075 2414 tpaca = paca_ptrs[cpu];
5d5b99cd 2415 tpaca->kvm_hstate.kvm_vcpu = vcpu;
898b25b2 2416 tpaca->kvm_hstate.ptid = cpu - vc->pcpu;
4bb3c7a0 2417 tpaca->kvm_hstate.fake_suspend = 0;
ec257165 2418 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */
371fefd6 2419 smp_wmb();
898b25b2 2420 tpaca->kvm_hstate.kvm_vcore = vc;
5d5b99cd 2421 if (cpu != smp_processor_id())
66feed61 2422 kvmppc_ipi_thread(cpu);
371fefd6 2423}
de56a948 2424
516f7898 2425static void kvmppc_wait_for_nap(int n_threads)
371fefd6 2426{
5d5b99cd
PM		 2427 int cpu = smp_processor_id();
2428 int i, loops;
371fefd6 2429
45c940ba
PM		 2430 if (n_threads <= 1)
2431 return;
5d5b99cd
PM		 2432 for (loops = 0; loops < 1000000; ++loops) {
2433 /*
2434 * Check if all threads are finished.
b4deba5c 2435 * We set the vcore pointer when starting a thread
5d5b99cd 2436 * and the thread clears it when finished, so we look
b4deba5c 2437 * for any threads that still have a non-NULL vcore ptr.
5d5b99cd 2438 */
45c940ba 2439 for (i = 1; i < n_threads; ++i)
d2e60075 2440 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore)
5d5b99cd 2441 break;
45c940ba 2442 if (i == n_threads) {
5d5b99cd
PM		 2443 HMT_medium();
2444 return;
371fefd6 2445 }
5d5b99cd 2446 HMT_low();
371fefd6
PM		 2447 }
2448 HMT_medium();
45c940ba 2449 for (i = 1; i < n_threads; ++i)
d2e60075 2450 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore)
5d5b99cd 2451 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i);
371fefd6
PM		 2452}
2453
2454/*
2455 * Check that we are on thread 0 and that any other threads in
7b444c67
PM		 2456 * this core are off-line. Then grab the threads so they can't
2457 * enter the kernel.
371fefd6
PM		 2458 */
2459static int on_primary_thread(void)
2460{
2461 int cpu = smp_processor_id();
3102f784 2462 int thr;
371fefd6 2463
3102f784
ME		 2464 /* Are we on a primary subcore? */
2465 if (cpu_thread_in_subcore(cpu))
371fefd6 2466 return 0;
3102f784
ME		 2467
2468 thr = 0;
2469 while (++thr < threads_per_subcore)
371fefd6
PM		 2470 if (cpu_online(cpu + thr))
2471 return 0;
7b444c67
PM		 2472
2473 /* Grab all hw threads so they can't go into the kernel */
3102f784 2474 for (thr = 1; thr < threads_per_subcore; ++thr) {
7b444c67
PM		 2475 if (kvmppc_grab_hwthread(cpu + thr)) {
2476 /* Couldn't grab one; let the others go */
2477 do {
2478 kvmppc_release_hwthread(cpu + thr);
2479 } while (--thr > 0);
2480 return 0;
2481 }
2482 }
371fefd6
PM		 2483 return 1;
2484}
2485
ec257165
PM		 2486/*
2487 * A list of virtual cores for each physical CPU.
2488 * These are vcores that could run but their runner VCPU tasks are
2489 * (or may be) preempted.
2490 */
2491struct preempted_vcore_list {
2492 struct list_head list;
2493 spinlock_t lock;
2494};
2495
2496static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores);
2497
2498static void init_vcore_lists(void)
2499{
2500 int cpu;
2501
2502 for_each_possible_cpu(cpu) {
2503 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu);
2504 spin_lock_init(&lp->lock);
2505 INIT_LIST_HEAD(&lp->list);
2506 }
2507}
2508
2509static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc)
2510{
2511 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2512
2513 vc->vcore_state = VCORE_PREEMPT;
2514 vc->pcpu = smp_processor_id();
516f7898 2515 if (vc->num_threads < threads_per_vcore(vc->kvm)) {
ec257165
PM		 2516 spin_lock(&lp->lock);
2517 list_add_tail(&vc->preempt_list, &lp->list);
2518 spin_unlock(&lp->lock);
2519 }
2520
2521 /* Start accumulating stolen time */
2522 kvmppc_core_start_stolen(vc);
2523}
2524
2525static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc)
2526{
402813fe 2527 struct preempted_vcore_list *lp;
ec257165
PM		 2528
2529 kvmppc_core_end_stolen(vc);
2530 if (!list_empty(&vc->preempt_list)) {
402813fe 2531 lp = &per_cpu(preempted_vcores, vc->pcpu);
ec257165
PM		 2532 spin_lock(&lp->lock);
2533 list_del_init(&vc->preempt_list);
2534 spin_unlock(&lp->lock);
2535 }
2536 vc->vcore_state = VCORE_INACTIVE;
2537}
2538
b4deba5c
PM		 2539/*
2540 * This stores information about the virtual cores currently
2541 * assigned to a physical core.
2542 */
ec257165 2543struct core_info {
b4deba5c
PM		 2544 int n_subcores;
2545 int max_subcore_threads;
ec257165 2546 int total_threads;
b4deba5c 2547 int subcore_threads[MAX_SUBCORES];
898b25b2 2548 struct kvmppc_vcore *vc[MAX_SUBCORES];
ec257165
PM		 2549};
2550
b4deba5c
PM		 2551/*
2552 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7
516f7898 2553 * respectively in 2-way micro-threading (split-core) mode on POWER8.
b4deba5c
PM		 2554 */
2555static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 };
2556
ec257165
PM		 2557static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc)
2558{
2559 memset(cip, 0, sizeof(*cip));
b4deba5c
PM		 2560 cip->n_subcores = 1;
2561 cip->max_subcore_threads = vc->num_threads;
ec257165 2562 cip->total_threads = vc->num_threads;
b4deba5c 2563 cip->subcore_threads[0] = vc->num_threads;
898b25b2 2564 cip->vc[0] = vc;
b4deba5c
PM		 2565}
2566
2567static bool subcore_config_ok(int n_subcores, int n_threads)
2568{
516f7898 2569 /*
00608e1f
PM		 2570 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way
2571 * split-core mode, with one thread per subcore.
516f7898
PM		 2572 */
2573 if (cpu_has_feature(CPU_FTR_ARCH_300))
2574 return n_subcores <= 4 && n_threads == 1;
2575
2576 /* On POWER8, can only dynamically split if unsplit to begin with */
b4deba5c
PM		 2577 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS)
2578 return false;
2579 if (n_subcores > MAX_SUBCORES)
2580 return false;
2581 if (n_subcores > 1) {
2582 if (!(dynamic_mt_modes & 2))
2583 n_subcores = 4;
2584 if (n_subcores > 2 && !(dynamic_mt_modes & 4))
2585 return false;
2586 }
2587
2588 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS;
ec257165
PM		 2589}
2590
898b25b2 2591static void init_vcore_to_run(struct kvmppc_vcore *vc)
ec257165 2592{
ec257165
PM		 2593 vc->entry_exit_map = 0;
2594 vc->in_guest = 0;
2595 vc->napping_threads = 0;
2596 vc->conferring_threads = 0;
57b8daa7 2597 vc->tb_offset_applied = 0;
ec257165
PM		 2598}
2599
b4deba5c
PM		 2600static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip)
2601{
2602 int n_threads = vc->num_threads;
2603 int sub;
2604
2605 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
2606 return false;
2607
00608e1f
PM		 2608 /* Some POWER9 chips require all threads to be in the same MMU mode */
2609 if (no_mixing_hpt_and_radix &&
c0101509
PM		 2610 kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm))
2611 return false;
2612
b4deba5c
PM		 2613 if (n_threads < cip->max_subcore_threads)
2614 n_threads = cip->max_subcore_threads;
b009031f 2615 if (!subcore_config_ok(cip->n_subcores + 1, n_threads))
b4deba5c 2616 return false;
b009031f 2617 cip->max_subcore_threads = n_threads;
b4deba5c
PM		 2618
2619 sub = cip->n_subcores;
2620 ++cip->n_subcores;
2621 cip->total_threads += vc->num_threads;
2622 cip->subcore_threads[sub] = vc->num_threads;
898b25b2
PM		 2623 cip->vc[sub] = vc;
2624 init_vcore_to_run(vc);
2625 list_del_init(&vc->preempt_list);
b4deba5c
PM		 2626
2627 return true;
2628}
2629
b4deba5c
PM		 2630/*
2631 * Work out whether it is possible to piggyback the execution of
2632 * vcore *pvc onto the execution of the other vcores described in *cip.
2633 */
2634static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip,
2635 int target_threads)
2636{
b4deba5c
PM		 2637 if (cip->total_threads + pvc->num_threads > target_threads)
2638 return false;
b4deba5c 2639
b009031f 2640 return can_dynamic_split(pvc, cip);
b4deba5c
PM		 2641}
2642
d911f0be
PM		 2643static void prepare_threads(struct kvmppc_vcore *vc)
2644{
7b5f8272
SJS		 2645 int i;
2646 struct kvm_vcpu *vcpu;
d911f0be 2647
7b5f8272 2648 for_each_runnable_thread(i, vcpu, vc) {
d911f0be
PM		 2649 if (signal_pending(vcpu->arch.run_task))
2650 vcpu->arch.ret = -EINTR;
2651 else if (vcpu->arch.vpa.update_pending ||
2652 vcpu->arch.slb_shadow.update_pending ||
2653 vcpu->arch.dtl.update_pending)
2654 vcpu->arch.ret = RESUME_GUEST;
2655 else
2656 continue;
2657 kvmppc_remove_runnable(vc, vcpu);
2658 wake_up(&vcpu->arch.cpu_run);
2659 }
2660}
2661
ec257165
PM		 2662static void collect_piggybacks(struct core_info *cip, int target_threads)
2663{
2664 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2665 struct kvmppc_vcore *pvc, *vcnext;
2666
2667 spin_lock(&lp->lock);
2668 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) {
2669 if (!spin_trylock(&pvc->lock))
2670 continue;
2671 prepare_threads(pvc);
2672 if (!pvc->n_runnable) {
2673 list_del_init(&pvc->preempt_list);
2674 if (pvc->runner == NULL) {
2675 pvc->vcore_state = VCORE_INACTIVE;
2676 kvmppc_core_end_stolen(pvc);
2677 }
2678 spin_unlock(&pvc->lock);
2679 continue;
2680 }
2681 if (!can_piggyback(pvc, cip, target_threads)) {
2682 spin_unlock(&pvc->lock);
2683 continue;
2684 }
2685 kvmppc_core_end_stolen(pvc);
2686 pvc->vcore_state = VCORE_PIGGYBACK;
2687 if (cip->total_threads >= target_threads)
2688 break;
2689 }
2690 spin_unlock(&lp->lock);
2691}
2692
8b24e69f
PM		 2693static bool recheck_signals(struct core_info *cip)
2694{
2695 int sub, i;
2696 struct kvm_vcpu *vcpu;
2697
2698 for (sub = 0; sub < cip->n_subcores; ++sub)
2699 for_each_runnable_thread(i, vcpu, cip->vc[sub])
2700 if (signal_pending(vcpu->arch.run_task))
2701 return true;
2702 return false;
2703}
2704
ec257165 2705static void post_guest_process(struct kvmppc_vcore *vc, bool is_master)
25fedfca 2706{
7b5f8272 2707 int still_running = 0, i;
25fedfca
PM		 2708 u64 now;
2709 long ret;
7b5f8272 2710 struct kvm_vcpu *vcpu;
25fedfca 2711
ec257165 2712 spin_lock(&vc->lock);
25fedfca 2713 now = get_tb();
7b5f8272 2714 for_each_runnable_thread(i, vcpu, vc) {
53655ddd
PM		 2715 /*
2716 * It's safe to unlock the vcore in the loop here, because
2717 * for_each_runnable_thread() is safe against removal of
2718 * the vcpu, and the vcore state is VCORE_EXITING here,
2719 * so any vcpus becoming runnable will have their arch.trap
2720 * set to zero and can't actually run in the guest.
2721 */
2722 spin_unlock(&vc->lock);
25fedfca
PM		 2723 /* cancel pending dec exception if dec is positive */
2724 if (now < vcpu->arch.dec_expires &&
2725 kvmppc_core_pending_dec(vcpu))
2726 kvmppc_core_dequeue_dec(vcpu);
2727
2728 trace_kvm_guest_exit(vcpu);
2729
2730 ret = RESUME_GUEST;
2731 if (vcpu->arch.trap)
2732 ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu,
2733 vcpu->arch.run_task);
2734
2735 vcpu->arch.ret = ret;
2736 vcpu->arch.trap = 0;
2737
53655ddd 2738 spin_lock(&vc->lock);
ec257165
PM		 2739 if (is_kvmppc_resume_guest(vcpu->arch.ret)) {
2740 if (vcpu->arch.pending_exceptions)
2741 kvmppc_core_prepare_to_enter(vcpu);
2742 if (vcpu->arch.ceded)
25fedfca 2743 kvmppc_set_timer(vcpu);
ec257165
PM		 2744 else
2745 ++still_running;
2746 } else {
25fedfca
PM		 2747 kvmppc_remove_runnable(vc, vcpu);
2748 wake_up(&vcpu->arch.cpu_run);
2749 }
2750 }
ec257165 2751 if (!is_master) {
563a1e93 2752 if (still_running > 0) {
ec257165 2753 kvmppc_vcore_preempt(vc);
563a1e93
PM		 2754 } else if (vc->runner) {
2755 vc->vcore_state = VCORE_PREEMPT;
2756 kvmppc_core_start_stolen(vc);
2757 } else {
2758 vc->vcore_state = VCORE_INACTIVE;
2759 }
ec257165
PM		 2760 if (vc->n_runnable > 0 && vc->runner == NULL) {
2761 /* make sure there's a candidate runner awake */
7b5f8272
SJS		 2762 i = -1;
2763 vcpu = next_runnable_thread(vc, &i);
ec257165
PM		 2764 wake_up(&vcpu->arch.cpu_run);
2765 }
2766 }
2767 spin_unlock(&vc->lock);
25fedfca
PM		 2768}
2769
b8e6a87c
SW		 2770/*
2771 * Clear core from the list of active host cores as we are about to
2772 * enter the guest. Only do this if it is the primary thread of the
2773 * core (not if a subcore) that is entering the guest.
2774 */
3f7cd919 2775static inline int kvmppc_clear_host_core(unsigned int cpu)
b8e6a87c
SW		 2776{
2777 int core;
2778
2779 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
3f7cd919 2780 return 0;
b8e6a87c
SW		 2781 /*
2782 * Memory barrier can be omitted here as we will do a smp_wmb()
2783 * later in kvmppc_start_thread and we need ensure that state is
2784 * visible to other CPUs only after we enter guest.
2785 */
2786 core = cpu >> threads_shift;
2787 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0;
3f7cd919 2788 return 0;
b8e6a87c
SW		 2789}
2790
2791/*
2792 * Advertise this core as an active host core since we exited the guest
2793 * Only need to do this if it is the primary thread of the core that is
2794 * exiting.
2795 */
3f7cd919 2796static inline int kvmppc_set_host_core(unsigned int cpu)
b8e6a87c
SW		 2797{
2798 int core;
2799
2800 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
3f7cd919 2801 return 0;
b8e6a87c
SW		 2802
2803 /*
2804 * Memory barrier can be omitted here because we do a spin_unlock
2805 * immediately after this which provides the memory barrier.
2806 */
2807 core = cpu >> threads_shift;
2808 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1;
3f7cd919 2809 return 0;
b8e6a87c
SW		 2810}
2811
8b24e69f
PM		 2812static void set_irq_happened(int trap)
2813{
2814 switch (trap) {
2815 case BOOK3S_INTERRUPT_EXTERNAL:
2816 local_paca->irq_happened |= PACA_IRQ_EE;
2817 break;
2818 case BOOK3S_INTERRUPT_H_DOORBELL:
2819 local_paca->irq_happened |= PACA_IRQ_DBELL;
2820 break;
2821 case BOOK3S_INTERRUPT_HMI:
2822 local_paca->irq_happened |= PACA_IRQ_HMI;
2823 break;
6de6638b
NP		 2824 case BOOK3S_INTERRUPT_SYSTEM_RESET:
2825 replay_system_reset();
2826 break;
8b24e69f
PM		 2827 }
2828}
2829
371fefd6
PM		 2830/*
2831 * Run a set of guest threads on a physical core.
2832 * Called with vc->lock held.
2833 */
66feed61 2834static noinline void kvmppc_run_core(struct kvmppc_vcore *vc)
371fefd6 2835{
7b5f8272 2836 struct kvm_vcpu *vcpu;
d911f0be 2837 int i;
2c9097e4 2838 int srcu_idx;
ec257165 2839 struct core_info core_info;
898b25b2 2840 struct kvmppc_vcore *pvc;
b4deba5c
PM		 2841 struct kvm_split_mode split_info, *sip;
2842 int split, subcore_size, active;
2843 int sub;
2844 bool thr0_done;
2845 unsigned long cmd_bit, stat_bit;
ec257165
PM		 2846 int pcpu, thr;
2847 int target_threads;
45c940ba 2848 int controlled_threads;
8b24e69f 2849 int trap;
516f7898 2850 bool is_power8;
c0101509 2851 bool hpt_on_radix;
371fefd6 2852
d911f0be
PM		 2853 /*
2854 * Remove from the list any threads that have a signal pending
2855 * or need a VPA update done
2856 */
2857 prepare_threads(vc);
2858
2859 /* if the runner is no longer runnable, let the caller pick a new one */
2860 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE)
2861 return;
081f323b
PM		 2862
2863 /*
d911f0be 2864 * Initialize *vc.
081f323b 2865 */
898b25b2 2866 init_vcore_to_run(vc);
2711e248 2867 vc->preempt_tb = TB_NIL;
081f323b 2868
45c940ba
PM		 2869 /*
2870 * Number of threads that we will be controlling: the same as
2871 * the number of threads per subcore, except on POWER9,
2872 * where it's 1 because the threads are (mostly) independent.
2873 */
516f7898 2874 controlled_threads = threads_per_vcore(vc->kvm);
45c940ba 2875
7b444c67 2876 /*
3102f784
ME		 2877 * Make sure we are running on primary threads, and that secondary
2878 * threads are offline. Also check if the number of threads in this
2879 * guest are greater than the current system threads per guest.
c0101509 2880 * On POWER9, we need to be not in independent-threads mode if
00608e1f
PM		 2881 * this is a HPT guest on a radix host machine where the
2882 * CPU threads may not be in different MMU modes.
7b444c67 2883 */
00608e1f
PM		 2884 hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() &&
2885 !kvm_is_radix(vc->kvm);
c0101509
PM		 2886 if (((controlled_threads > 1) &&
2887 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) ||
2888 (hpt_on_radix && vc->kvm->arch.threads_indep)) {
7b5f8272 2889 for_each_runnable_thread(i, vcpu, vc) {
7b444c67 2890 vcpu->arch.ret = -EBUSY;
25fedfca
PM		 2891 kvmppc_remove_runnable(vc, vcpu);
2892 wake_up(&vcpu->arch.cpu_run);
2893 }
7b444c67
PM		 2894 goto out;
2895 }
2896
ec257165
PM		 2897 /*
2898 * See if we could run any other vcores on the physical core
2899 * along with this one.
2900 */
2901 init_core_info(&core_info, vc);
2902 pcpu = smp_processor_id();
45c940ba 2903 target_threads = controlled_threads;
ec257165
PM		 2904 if (target_smt_mode && target_smt_mode < target_threads)
2905 target_threads = target_smt_mode;
2906 if (vc->num_threads < target_threads)
2907 collect_piggybacks(&core_info, target_threads);
3102f784 2908
8b24e69f
PM		 2909 /*
2910 * On radix, arrange for TLB flushing if necessary.
2911 * This has to be done before disabling interrupts since
2912 * it uses smp_call_function().
2913 */
2914 pcpu = smp_processor_id();
2915 if (kvm_is_radix(vc->kvm)) {
2916 for (sub = 0; sub < core_info.n_subcores; ++sub)
2917 for_each_runnable_thread(i, vcpu, core_info.vc[sub])
2918 kvmppc_prepare_radix_vcpu(vcpu, pcpu);
2919 }
2920
2921 /*
2922 * Hard-disable interrupts, and check resched flag and signals.
2923 * If we need to reschedule or deliver a signal, clean up
2924 * and return without going into the guest(s).
072df813 2925 * If the mmu_ready flag has been cleared, don't go into the
38c53af8 2926 * guest because that means a HPT resize operation is in progress.
8b24e69f
PM		 2927 */
2928 local_irq_disable();
2929 hard_irq_disable();
2930 if (lazy_irq_pending() || need_resched() ||
072df813 2931 recheck_signals(&core_info) || !vc->kvm->arch.mmu_ready) {
8b24e69f
PM		 2932 local_irq_enable();
2933 vc->vcore_state = VCORE_INACTIVE;
2934 /* Unlock all except the primary vcore */
2935 for (sub = 1; sub < core_info.n_subcores; ++sub) {
2936 pvc = core_info.vc[sub];
2937 /* Put back on to the preempted vcores list */
2938 kvmppc_vcore_preempt(pvc);
2939 spin_unlock(&pvc->lock);
2940 }
2941 for (i = 0; i < controlled_threads; ++i)
2942 kvmppc_release_hwthread(pcpu + i);
2943 return;
2944 }
2945
2946 kvmppc_clear_host_core(pcpu);
2947
b4deba5c
PM		 2948 /* Decide on micro-threading (split-core) mode */
2949 subcore_size = threads_per_subcore;
2950 cmd_bit = stat_bit = 0;
2951 split = core_info.n_subcores;
2952 sip = NULL;
516f7898
PM		 2953 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S)
2954 && !cpu_has_feature(CPU_FTR_ARCH_300);
2955
c0101509 2956 if (split > 1 || hpt_on_radix) {
b4deba5c
PM		 2957 sip = &split_info;
2958 memset(&split_info, 0, sizeof(split_info));
b4deba5c 2959 for (sub = 0; sub < core_info.n_subcores; ++sub)
898b25b2 2960 split_info.vc[sub] = core_info.vc[sub];
516f7898
PM		 2961
2962 if (is_power8) {
2963 if (split == 2 && (dynamic_mt_modes & 2)) {
2964 cmd_bit = HID0_POWER8_1TO2LPAR;
2965 stat_bit = HID0_POWER8_2LPARMODE;
2966 } else {
2967 split = 4;
2968 cmd_bit = HID0_POWER8_1TO4LPAR;
2969 stat_bit = HID0_POWER8_4LPARMODE;
2970 }
2971 subcore_size = MAX_SMT_THREADS / split;
2972 split_info.rpr = mfspr(SPRN_RPR);
2973 split_info.pmmar = mfspr(SPRN_PMMAR);
2974 split_info.ldbar = mfspr(SPRN_LDBAR);
2975 split_info.subcore_size = subcore_size;
2976 } else {
2977 split_info.subcore_size = 1;
c0101509
PM		 2978 if (hpt_on_radix) {
2979 /* Use the split_info for LPCR/LPIDR changes */
2980 split_info.lpcr_req = vc->lpcr;
2981 split_info.lpidr_req = vc->kvm->arch.lpid;
2982 split_info.host_lpcr = vc->kvm->arch.host_lpcr;
2983 split_info.do_set = 1;
2984 }
516f7898
PM		 2985 }
2986
b4deba5c
PM		 2987 /* order writes to split_info before kvm_split_mode pointer */
2988 smp_wmb();
2989 }
c0101509
PM		 2990
2991 for (thr = 0; thr < controlled_threads; ++thr) {
d2e60075
NP		 2992 struct paca_struct *paca = paca_ptrs[pcpu + thr];
2993
2994 paca->kvm_hstate.tid = thr;
2995 paca->kvm_hstate.napping = 0;
2996 paca->kvm_hstate.kvm_split_mode = sip;
c0101509 2997 }
b4deba5c 2998
516f7898 2999 /* Initiate micro-threading (split-core) on POWER8 if required */
b4deba5c
PM		 3000 if (cmd_bit) {
3001 unsigned long hid0 = mfspr(SPRN_HID0);
3002
3003 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS;
3004 mb();
3005 mtspr(SPRN_HID0, hid0);
3006 isync();
3007 for (;;) {
3008 hid0 = mfspr(SPRN_HID0);
3009 if (hid0 & stat_bit)
3010 break;
3011 cpu_relax();
ec257165 3012 }
2e25aa5f 3013 }
3102f784 3014
7aa15842
PM		 3015 /*
3016 * On POWER8, set RWMR register.
3017 * Since it only affects PURR and SPURR, it doesn't affect
3018 * the host, so we don't save/restore the host value.
3019 */
3020 if (is_power8) {
3021 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD;
3022 int n_online = atomic_read(&vc->online_count);
3023
3024 /*
3025 * Use the 8-thread value if we're doing split-core
3026 * or if the vcore's online count looks bogus.
3027 */
3028 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS &&
3029 n_online >= 1 && n_online <= MAX_SMT_THREADS)
3030 rwmr_val = p8_rwmr_values[n_online];
3031 mtspr(SPRN_RWMR, rwmr_val);
3032 }
3033
b4deba5c
PM		 3034 /* Start all the threads */
3035 active = 0;
3036 for (sub = 0; sub < core_info.n_subcores; ++sub) {
516f7898 3037 thr = is_power8 ? subcore_thread_map[sub] : sub;
b4deba5c
PM		 3038 thr0_done = false;
3039 active |= 1 << thr;
898b25b2
PM		 3040 pvc = core_info.vc[sub];
3041 pvc->pcpu = pcpu + thr;
3042 for_each_runnable_thread(i, vcpu, pvc) {
3043 kvmppc_start_thread(vcpu, pvc);
3044 kvmppc_create_dtl_entry(vcpu, pvc);
3045 trace_kvm_guest_enter(vcpu);
3046 if (!vcpu->arch.ptid)
3047 thr0_done = true;
3048 active |= 1 << (thr + vcpu->arch.ptid);
b4deba5c 3049 }
898b25b2
PM		 3050 /*
3051 * We need to start the first thread of each subcore
3052 * even if it doesn't have a vcpu.
3053 */
3054 if (!thr0_done)
3055 kvmppc_start_thread(NULL, pvc);
2e25aa5f 3056 }
371fefd6 3057
7f235328
GS		 3058 /*
3059 * Ensure that split_info.do_nap is set after setting
3060 * the vcore pointer in the PACA of the secondaries.
3061 */
3062 smp_mb();
7f235328 3063
b4deba5c
PM		 3064 /*
3065 * When doing micro-threading, poke the inactive threads as well.
3066 * This gets them to the nap instruction after kvm_do_nap,
3067 * which reduces the time taken to unsplit later.
c0101509
PM		 3068 * For POWER9 HPT guest on radix host, we need all the secondary
3069 * threads woken up so they can do the LPCR/LPIDR change.
b4deba5c 3070 */
c0101509 3071 if (cmd_bit || hpt_on_radix) {
516f7898 3072 split_info.do_nap = 1; /* ask secondaries to nap when done */
b4deba5c
PM		 3073 for (thr = 1; thr < threads_per_subcore; ++thr)
3074 if (!(active & (1 << thr)))
3075 kvmppc_ipi_thread(pcpu + thr);
516f7898 3076 }
e0b7ec05 3077
2f12f034 3078 vc->vcore_state = VCORE_RUNNING;
19ccb76a 3079 preempt_disable();
3c78f78a
SW		 3080
3081 trace_kvmppc_run_core(vc, 0);
3082
b4deba5c 3083 for (sub = 0; sub < core_info.n_subcores; ++sub)
898b25b2 3084 spin_unlock(&core_info.vc[sub]->lock);
de56a948 3085
9a4506e1
NP		 3086 if (kvm_is_radix(vc->kvm)) {
3087 int tmp = pcpu;
3088
3089 /*
3090 * Do we need to flush the process scoped TLB for the LPAR?
3091 *
3092 * On POWER9, individual threads can come in here, but the
3093 * TLB is shared between the 4 threads in a core, hence
3094 * invalidating on one thread invalidates for all.
3095 * Thus we make all 4 threads use the same bit here.
3096 *
3097 * Hash must be flushed in realmode in order to use tlbiel.
3098 */
3099 mtspr(SPRN_LPID, vc->kvm->arch.lpid);
3100 isync();
3101
3102 if (cpu_has_feature(CPU_FTR_ARCH_300))
3103 tmp &= ~0x3UL;
3104
3105 if (cpumask_test_cpu(tmp, &vc->kvm->arch.need_tlb_flush)) {
3106 radix__local_flush_tlb_lpid_guest(vc->kvm->arch.lpid);
3107 /* Clear the bit after the TLB flush */
3108 cpumask_clear_cpu(tmp, &vc->kvm->arch.need_tlb_flush);
3109 }
3110 }
3111
8b24e69f
PM		 3112 /*
3113 * Interrupts will be enabled once we get into the guest,
3114 * so tell lockdep that we're about to enable interrupts.
3115 */
3116 trace_hardirqs_on();
de56a948 3117
61bd0f66 3118 guest_enter_irqoff();
2c9097e4 3119
e0b7ec05 3120 srcu_idx = srcu_read_lock(&vc->kvm->srcu);
2c9097e4 3121
a4bc64d3
NR		 3122 this_cpu_disable_ftrace();
3123
8b24e69f 3124 trap = __kvmppc_vcore_entry();
de56a948 3125
a4bc64d3
NR		 3126 this_cpu_enable_ftrace();
3127
ec257165
PM		 3128 srcu_read_unlock(&vc->kvm->srcu, srcu_idx);
3129
8b24e69f
PM		 3130 trace_hardirqs_off();
3131 set_irq_happened(trap);
3132
ec257165 3133 spin_lock(&vc->lock);
371fefd6 3134 /* prevent other vcpu threads from doing kvmppc_start_thread() now */
19ccb76a 3135 vc->vcore_state = VCORE_EXITING;
371fefd6 3136
19ccb76a 3137 /* wait for secondary threads to finish writing their state to memory */
516f7898 3138 kvmppc_wait_for_nap(controlled_threads);
b4deba5c
PM		 3139
3140 /* Return to whole-core mode if we split the core earlier */
516f7898 3141 if (cmd_bit) {
b4deba5c
PM		 3142 unsigned long hid0 = mfspr(SPRN_HID0);
3143 unsigned long loops = 0;
3144
3145 hid0 &= ~HID0_POWER8_DYNLPARDIS;
3146 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE;
3147 mb();
3148 mtspr(SPRN_HID0, hid0);
3149 isync();
3150 for (;;) {
3151 hid0 = mfspr(SPRN_HID0);
3152 if (!(hid0 & stat_bit))
3153 break;
3154 cpu_relax();
3155 ++loops;
3156 }
c0101509
PM		 3157 } else if (hpt_on_radix) {
3158 /* Wait for all threads to have seen final sync */
3159 for (thr = 1; thr < controlled_threads; ++thr) {
d2e60075
NP		 3160 struct paca_struct *paca = paca_ptrs[pcpu + thr];
3161
3162 while (paca->kvm_hstate.kvm_split_mode) {
c0101509
PM		 3163 HMT_low();
3164 barrier();
3165 }
3166 HMT_medium();
3167 }
b4deba5c 3168 }
c0101509 3169 split_info.do_nap = 0;
b4deba5c 3170
8b24e69f
PM		 3171 kvmppc_set_host_core(pcpu);
3172
3173 local_irq_enable();
61bd0f66 3174 guest_exit();
8b24e69f 3175
b4deba5c 3176 /* Let secondaries go back to the offline loop */
45c940ba 3177 for (i = 0; i < controlled_threads; ++i) {
b4deba5c
PM		 3178 kvmppc_release_hwthread(pcpu + i);
3179 if (sip && sip->napped[i])
3180 kvmppc_ipi_thread(pcpu + i);
a29ebeaf 3181 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest);
b4deba5c
PM		 3182 }
3183
371fefd6 3184 spin_unlock(&vc->lock);
2c9097e4 3185
371fefd6
PM		 3186 /* make sure updates to secondary vcpu structs are visible now */
3187 smp_mb();
de56a948 3188
36ee41d1
PM		 3189 preempt_enable();
3190
898b25b2
PM		 3191 for (sub = 0; sub < core_info.n_subcores; ++sub) {
3192 pvc = core_info.vc[sub];
3193 post_guest_process(pvc, pvc == vc);
3194 }
de56a948 3195
913d3ff9 3196 spin_lock(&vc->lock);
de56a948
PM		 3197
3198 out:
19ccb76a 3199 vc->vcore_state = VCORE_INACTIVE;
3c78f78a 3200 trace_kvmppc_run_core(vc, 1);
371fefd6
PM		 3201}
3202
95a6432c
PM		 3203/*
3204 * Load up hypervisor-mode registers on P9.
3205 */
360cae31
PM		 3206static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit,
3207 unsigned long lpcr)
95a6432c
PM		 3208{
3209 struct kvmppc_vcore *vc = vcpu->arch.vcore;
3210 s64 hdec;
3211 u64 tb, purr, spurr;
3212 int trap;
3213 unsigned long host_hfscr = mfspr(SPRN_HFSCR);
3214 unsigned long host_ciabr = mfspr(SPRN_CIABR);
3215 unsigned long host_dawr = mfspr(SPRN_DAWR);
3216 unsigned long host_dawrx = mfspr(SPRN_DAWRX);
3217 unsigned long host_psscr = mfspr(SPRN_PSSCR);
3218 unsigned long host_pidr = mfspr(SPRN_PID);
3219
3220 hdec = time_limit - mftb();
3221 if (hdec < 0)
3222 return BOOK3S_INTERRUPT_HV_DECREMENTER;
3223 mtspr(SPRN_HDEC, hdec);
3224
3225 if (vc->tb_offset) {
3226 u64 new_tb = mftb() + vc->tb_offset;
3227 mtspr(SPRN_TBU40, new_tb);
3228 tb = mftb();
3229 if ((tb & 0xffffff) < (new_tb & 0xffffff))
3230 mtspr(SPRN_TBU40, new_tb + 0x1000000);
3231 vc->tb_offset_applied = vc->tb_offset;
3232 }
3233
3234 if (vc->pcr)
3235 mtspr(SPRN_PCR, vc->pcr);
3236 mtspr(SPRN_DPDES, vc->dpdes);
3237 mtspr(SPRN_VTB, vc->vtb);
3238
3239 local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR);
3240 local_paca->kvm_hstate.host_spurr = mfspr(SPRN_SPURR);
3241 mtspr(SPRN_PURR, vcpu->arch.purr);
3242 mtspr(SPRN_SPURR, vcpu->arch.spurr);
3243
3244 if (cpu_has_feature(CPU_FTR_DAWR)) {
3245 mtspr(SPRN_DAWR, vcpu->arch.dawr);
3246 mtspr(SPRN_DAWRX, vcpu->arch.dawrx);
3247 }
3248 mtspr(SPRN_CIABR, vcpu->arch.ciabr);
3249 mtspr(SPRN_IC, vcpu->arch.ic);
3250 mtspr(SPRN_PID, vcpu->arch.pid);
3251
3252 mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC |
3253 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG));
3254
3255 mtspr(SPRN_HFSCR, vcpu->arch.hfscr);
3256
3257 mtspr(SPRN_SPRG0, vcpu->arch.shregs.sprg0);
3258 mtspr(SPRN_SPRG1, vcpu->arch.shregs.sprg1);
3259 mtspr(SPRN_SPRG2, vcpu->arch.shregs.sprg2);
3260 mtspr(SPRN_SPRG3, vcpu->arch.shregs.sprg3);
3261
3262 mtspr(SPRN_AMOR, ~0UL);
3263
360cae31 3264 mtspr(SPRN_LPCR, lpcr);
95a6432c
PM		 3265 isync();
3266
3267 kvmppc_xive_push_vcpu(vcpu);
3268
3269 mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0);
3270 mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1);
3271
3272 trap = __kvmhv_vcpu_entry_p9(vcpu);
3273
3274 /* Advance host PURR/SPURR by the amount used by guest */
3275 purr = mfspr(SPRN_PURR);
3276 spurr = mfspr(SPRN_SPURR);
3277 mtspr(SPRN_PURR, local_paca->kvm_hstate.host_purr +
3278 purr - vcpu->arch.purr);
3279 mtspr(SPRN_SPURR, local_paca->kvm_hstate.host_spurr +
3280 spurr - vcpu->arch.spurr);
3281 vcpu->arch.purr = purr;
3282 vcpu->arch.spurr = spurr;
3283
3284 vcpu->arch.ic = mfspr(SPRN_IC);
3285 vcpu->arch.pid = mfspr(SPRN_PID);
3286 vcpu->arch.psscr = mfspr(SPRN_PSSCR) & PSSCR_GUEST_VIS;
3287
3288 vcpu->arch.shregs.sprg0 = mfspr(SPRN_SPRG0);
3289 vcpu->arch.shregs.sprg1 = mfspr(SPRN_SPRG1);
3290 vcpu->arch.shregs.sprg2 = mfspr(SPRN_SPRG2);
3291 vcpu->arch.shregs.sprg3 = mfspr(SPRN_SPRG3);
3292
3293 mtspr(SPRN_PSSCR, host_psscr);
3294 mtspr(SPRN_HFSCR, host_hfscr);
3295 mtspr(SPRN_CIABR, host_ciabr);
3296 mtspr(SPRN_DAWR, host_dawr);
3297 mtspr(SPRN_DAWRX, host_dawrx);
3298 mtspr(SPRN_PID, host_pidr);
3299
3300 /*
3301 * Since this is radix, do a eieio; tlbsync; ptesync sequence in
3302 * case we interrupted the guest between a tlbie and a ptesync.
3303 */
3304 asm volatile("eieio; tlbsync; ptesync");
3305
3306 mtspr(SPRN_LPID, vcpu->kvm->arch.host_lpid); /* restore host LPID */
3307 isync();
3308
3309 vc->dpdes = mfspr(SPRN_DPDES);
3310 vc->vtb = mfspr(SPRN_VTB);
3311 mtspr(SPRN_DPDES, 0);
3312 if (vc->pcr)
3313 mtspr(SPRN_PCR, 0);
3314
3315 if (vc->tb_offset_applied) {
3316 u64 new_tb = mftb() - vc->tb_offset_applied;
3317 mtspr(SPRN_TBU40, new_tb);
3318 tb = mftb();
3319 if ((tb & 0xffffff) < (new_tb & 0xffffff))
3320 mtspr(SPRN_TBU40, new_tb + 0x1000000);
3321 vc->tb_offset_applied = 0;
3322 }
3323
3324 mtspr(SPRN_HDEC, 0x7fffffff);
3325 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr);
3326
3327 return trap;
3328}
3329
3330/*
3331 * Virtual-mode guest entry for POWER9 and later when the host and
3332 * guest are both using the radix MMU. The LPIDR has already been set.
3333 */
360cae31
PM		 3334int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
3335 unsigned long lpcr)
95a6432c
PM		 3336{
3337 struct kvmppc_vcore *vc = vcpu->arch.vcore;
3338 unsigned long host_dscr = mfspr(SPRN_DSCR);
3339 unsigned long host_tidr = mfspr(SPRN_TIDR);
3340 unsigned long host_iamr = mfspr(SPRN_IAMR);
3341 s64 dec;
3342 u64 tb;
3343 int trap, save_pmu;
3344
3345 dec = mfspr(SPRN_DEC);
3346 tb = mftb();
3347 if (dec < 512)
3348 return BOOK3S_INTERRUPT_HV_DECREMENTER;
3349 local_paca->kvm_hstate.dec_expires = dec + tb;
3350 if (local_paca->kvm_hstate.dec_expires < time_limit)
3351 time_limit = local_paca->kvm_hstate.dec_expires;
3352
3353 vcpu->arch.ceded = 0;
3354
3355 kvmhv_save_host_pmu(); /* saves it to PACA kvm_hstate */
3356
3357 kvmppc_subcore_enter_guest();
3358
3359 vc->entry_exit_map = 1;
3360 vc->in_guest = 1;
3361
3362 if (vcpu->arch.vpa.pinned_addr) {
3363 struct lppaca *lp = vcpu->arch.vpa.pinned_addr;
3364 u32 yield_count = be32_to_cpu(lp->yield_count) + 1;
3365 lp->yield_count = cpu_to_be32(yield_count);
3366 vcpu->arch.vpa.dirty = 1;
3367 }
3368
3369 if (cpu_has_feature(CPU_FTR_TM) ||
3370 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
3371 kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true);
3372
3373 kvmhv_load_guest_pmu(vcpu);
3374
3375 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX);
3376 load_fp_state(&vcpu->arch.fp);
3377#ifdef CONFIG_ALTIVEC
3378 load_vr_state(&vcpu->arch.vr);
3379#endif
3380
3381 mtspr(SPRN_DSCR, vcpu->arch.dscr);
3382 mtspr(SPRN_IAMR, vcpu->arch.iamr);
3383 mtspr(SPRN_PSPB, vcpu->arch.pspb);
3384 mtspr(SPRN_FSCR, vcpu->arch.fscr);
3385 mtspr(SPRN_TAR, vcpu->arch.tar);
3386 mtspr(SPRN_EBBHR, vcpu->arch.ebbhr);
3387 mtspr(SPRN_EBBRR, vcpu->arch.ebbrr);
3388 mtspr(SPRN_BESCR, vcpu->arch.bescr);
3389 mtspr(SPRN_WORT, vcpu->arch.wort);
3390 mtspr(SPRN_TIDR, vcpu->arch.tid);
3391 mtspr(SPRN_DAR, vcpu->arch.shregs.dar);
3392 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr);
3393 mtspr(SPRN_AMR, vcpu->arch.amr);
3394 mtspr(SPRN_UAMOR, vcpu->arch.uamor);
3395
3396 if (!(vcpu->arch.ctrl & 1))
3397 mtspr(SPRN_CTRLT, mfspr(SPRN_CTRLF) & ~1);
3398
3399 mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb());
3400
360cae31
PM		 3401 if (kvmhv_on_pseries()) {
3402 /* call our hypervisor to load up HV regs and go */
3403 struct hv_guest_state hvregs;
3404
3405 kvmhv_save_hv_regs(vcpu, &hvregs);
3406 hvregs.lpcr = lpcr;
3407 vcpu->arch.regs.msr = vcpu->arch.shregs.msr;
3408 hvregs.version = HV_GUEST_STATE_VERSION;
3409 if (vcpu->arch.nested) {
3410 hvregs.lpid = vcpu->arch.nested->shadow_lpid;
3411 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id;
3412 } else {
3413 hvregs.lpid = vcpu->kvm->arch.lpid;
3414 hvregs.vcpu_token = vcpu->vcpu_id;
3415 }
3416 hvregs.hdec_expiry = time_limit;
3417 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs),
3418 __pa(&vcpu->arch.regs));
3419 kvmhv_restore_hv_return_state(vcpu, &hvregs);
3420 vcpu->arch.shregs.msr = vcpu->arch.regs.msr;
3421 vcpu->arch.shregs.dar = mfspr(SPRN_DAR);
3422 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR);
3423 } else {
3424 trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr);
95a6432c
PM		 3425 }
3426
95a6432c
PM		 3427 vcpu->arch.slb_max = 0;
3428 dec = mfspr(SPRN_DEC);
3429 tb = mftb();
3430 vcpu->arch.dec_expires = dec + tb;
3431 vcpu->cpu = -1;
3432 vcpu->arch.thread_cpu = -1;
3433 vcpu->arch.ctrl = mfspr(SPRN_CTRLF);
3434
3435 vcpu->arch.iamr = mfspr(SPRN_IAMR);
3436 vcpu->arch.pspb = mfspr(SPRN_PSPB);
3437 vcpu->arch.fscr = mfspr(SPRN_FSCR);
3438 vcpu->arch.tar = mfspr(SPRN_TAR);
3439 vcpu->arch.ebbhr = mfspr(SPRN_EBBHR);
3440 vcpu->arch.ebbrr = mfspr(SPRN_EBBRR);
3441 vcpu->arch.bescr = mfspr(SPRN_BESCR);
3442 vcpu->arch.wort = mfspr(SPRN_WORT);
3443 vcpu->arch.tid = mfspr(SPRN_TIDR);
3444 vcpu->arch.amr = mfspr(SPRN_AMR);
3445 vcpu->arch.uamor = mfspr(SPRN_UAMOR);
3446 vcpu->arch.dscr = mfspr(SPRN_DSCR);
3447
3448 mtspr(SPRN_PSPB, 0);
3449 mtspr(SPRN_WORT, 0);
3450 mtspr(SPRN_AMR, 0);
3451 mtspr(SPRN_UAMOR, 0);
3452 mtspr(SPRN_DSCR, host_dscr);
3453 mtspr(SPRN_TIDR, host_tidr);
3454 mtspr(SPRN_IAMR, host_iamr);
3455 mtspr(SPRN_PSPB, 0);
3456
3457 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX);
3458 store_fp_state(&vcpu->arch.fp);
3459#ifdef CONFIG_ALTIVEC
3460 store_vr_state(&vcpu->arch.vr);
3461#endif
3462
3463 if (cpu_has_feature(CPU_FTR_TM) ||
3464 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
3465 kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true);
3466
3467 save_pmu = 1;
3468 if (vcpu->arch.vpa.pinned_addr) {
3469 struct lppaca *lp = vcpu->arch.vpa.pinned_addr;
3470 u32 yield_count = be32_to_cpu(lp->yield_count) + 1;
3471 lp->yield_count = cpu_to_be32(yield_count);
3472 vcpu->arch.vpa.dirty = 1;
3473 save_pmu = lp->pmcregs_in_use;
3474 }
3475
3476 kvmhv_save_guest_pmu(vcpu, save_pmu);
3477
3478 vc->entry_exit_map = 0x101;
3479 vc->in_guest = 0;
3480
3481 mtspr(SPRN_DEC, local_paca->kvm_hstate.dec_expires - mftb());
3482
3483 kvmhv_load_host_pmu();
3484
3485 kvmppc_subcore_exit_guest();
3486
3487 return trap;
3488}
3489
19ccb76a
PM		 3490/*
3491 * Wait for some other vcpu thread to execute us, and
3492 * wake us up when we need to handle something in the host.
3493 */
ec257165
PM		 3494static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc,
3495 struct kvm_vcpu *vcpu, int wait_state)
371fefd6 3496{
371fefd6
PM		 3497 DEFINE_WAIT(wait);
3498
19ccb76a 3499 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state);
ec257165
PM		 3500 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
3501 spin_unlock(&vc->lock);
19ccb76a 3502 schedule();
ec257165
PM		 3503 spin_lock(&vc->lock);
3504 }
19ccb76a
PM		 3505 finish_wait(&vcpu->arch.cpu_run, &wait);
3506}
3507
0cda69dd
SJS		 3508static void grow_halt_poll_ns(struct kvmppc_vcore *vc)
3509{
3510 /* 10us base */
3511 if (vc->halt_poll_ns == 0 && halt_poll_ns_grow)
3512 vc->halt_poll_ns = 10000;
3513 else
3514 vc->halt_poll_ns *= halt_poll_ns_grow;
0cda69dd
SJS		 3515}
3516
3517static void shrink_halt_poll_ns(struct kvmppc_vcore *vc)
3518{
3519 if (halt_poll_ns_shrink == 0)
3520 vc->halt_poll_ns = 0;
3521 else
3522 vc->halt_poll_ns /= halt_poll_ns_shrink;
3523}
3524
ee3308a2
PM		 3525#ifdef CONFIG_KVM_XICS
3526static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3527{
3528 if (!xive_enabled())
3529 return false;
2267ea76 3530 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr <
ee3308a2
PM		 3531 vcpu->arch.xive_saved_state.cppr;
3532}
3533#else
3534static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3535{
3536 return false;
3537}
3538#endif /* CONFIG_KVM_XICS */
3539
1da4e2f4
PM		 3540static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu)
3541{
3542 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded ||
ee3308a2 3543 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu))
1da4e2f4
PM		 3544 return true;
3545
3546 return false;
3547}
3548
908a0935
SJS		 3549/*
3550 * Check to see if any of the runnable vcpus on the vcore have pending
0cda69dd
SJS		 3551 * exceptions or are no longer ceded
3552 */
3553static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc)
3554{
3555 struct kvm_vcpu *vcpu;
3556 int i;
3557
3558 for_each_runnable_thread(i, vcpu, vc) {
1da4e2f4 3559 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu))
0cda69dd
SJS		 3560 return 1;
3561 }
3562
3563 return 0;
3564}
3565
19ccb76a
PM		 3566/*
3567 * All the vcpus in this vcore are idle, so wait for a decrementer
3568 * or external interrupt to one of the vcpus. vc->lock is held.
3569 */
3570static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc)
3571{
2a27f514 3572 ktime_t cur, start_poll, start_wait;
0cda69dd 3573 int do_sleep = 1;
0cda69dd 3574 u64 block_ns;
8577370f 3575 DECLARE_SWAITQUEUE(wait);
1bc5d59c 3576
0cda69dd 3577 /* Poll for pending exceptions and ceded state */
2a27f514 3578 cur = start_poll = ktime_get();
0cda69dd 3579 if (vc->halt_poll_ns) {
2a27f514
SJS		 3580 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns);
3581 ++vc->runner->stat.halt_attempted_poll;
1bc5d59c 3582
0cda69dd
SJS		 3583 vc->vcore_state = VCORE_POLLING;
3584 spin_unlock(&vc->lock);
3585
3586 do {
3587 if (kvmppc_vcore_check_block(vc)) {
3588 do_sleep = 0;
3589 break;
3590 }
3591 cur = ktime_get();
3592 } while (single_task_running() && ktime_before(cur, stop));
3593
3594 spin_lock(&vc->lock);
3595 vc->vcore_state = VCORE_INACTIVE;
3596
2a27f514
SJS		 3597 if (!do_sleep) {
3598 ++vc->runner->stat.halt_successful_poll;
0cda69dd 3599 goto out;
2a27f514 3600 }
1bc5d59c
SW		 3601 }
3602
b3dae109 3603 prepare_to_swait_exclusive(&vc->wq, &wait, TASK_INTERRUPTIBLE);
0cda69dd
SJS		 3604
3605 if (kvmppc_vcore_check_block(vc)) {
8577370f 3606 finish_swait(&vc->wq, &wait);
0cda69dd 3607 do_sleep = 0;
2a27f514
SJS		 3608 /* If we polled, count this as a successful poll */
3609 if (vc->halt_poll_ns)
3610 ++vc->runner->stat.halt_successful_poll;
0cda69dd 3611 goto out;
1bc5d59c
SW		 3612 }
3613
2a27f514
SJS		 3614 start_wait = ktime_get();
3615
19ccb76a 3616 vc->vcore_state = VCORE_SLEEPING;
3c78f78a 3617 trace_kvmppc_vcore_blocked(vc, 0);
19ccb76a 3618 spin_unlock(&vc->lock);
913d3ff9 3619 schedule();
8577370f 3620 finish_swait(&vc->wq, &wait);
19ccb76a
PM		 3621 spin_lock(&vc->lock);
3622 vc->vcore_state = VCORE_INACTIVE;
3c78f78a 3623 trace_kvmppc_vcore_blocked(vc, 1);
2a27f514 3624 ++vc->runner->stat.halt_successful_wait;
0cda69dd
SJS		 3625
3626 cur = ktime_get();
3627
3628out:
2a27f514
SJS		 3629 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll);
3630
3631 /* Attribute wait time */
3632 if (do_sleep) {
3633 vc->runner->stat.halt_wait_ns +=
3634 ktime_to_ns(cur) - ktime_to_ns(start_wait);
3635 /* Attribute failed poll time */
3636 if (vc->halt_poll_ns)
3637 vc->runner->stat.halt_poll_fail_ns +=
3638 ktime_to_ns(start_wait) -
3639 ktime_to_ns(start_poll);
3640 } else {
3641 /* Attribute successful poll time */
3642 if (vc->halt_poll_ns)
3643 vc->runner->stat.halt_poll_success_ns +=
3644 ktime_to_ns(cur) -
3645 ktime_to_ns(start_poll);
3646 }
0cda69dd
SJS		 3647
3648 /* Adjust poll time */
307d93e4 3649 if (halt_poll_ns) {
0cda69dd
SJS		 3650 if (block_ns <= vc->halt_poll_ns)
3651 ;
3652 /* We slept and blocked for longer than the max halt time */
307d93e4 3653 else if (vc->halt_poll_ns && block_ns > halt_poll_ns)
0cda69dd
SJS		 3654 shrink_halt_poll_ns(vc);
3655 /* We slept and our poll time is too small */
307d93e4
SJS		 3656 else if (vc->halt_poll_ns < halt_poll_ns &&
3657 block_ns < halt_poll_ns)
0cda69dd 3658 grow_halt_poll_ns(vc);
e03f3921
SJS		 3659 if (vc->halt_poll_ns > halt_poll_ns)
3660 vc->halt_poll_ns = halt_poll_ns;
0cda69dd
SJS		 3661 } else
3662 vc->halt_poll_ns = 0;
3663
3664 trace_kvmppc_vcore_wakeup(do_sleep, block_ns);
19ccb76a 3665}
371fefd6 3666
360cae31
PM		 3667/*
3668 * This never fails for a radix guest, as none of the operations it does
3669 * for a radix guest can fail or have a way to report failure.
3670 * kvmhv_run_single_vcpu() relies on this fact.
3671 */
432953b4
PM		 3672static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu)
3673{
3674 int r = 0;
3675 struct kvm *kvm = vcpu->kvm;
3676
3677 mutex_lock(&kvm->lock);
3678 if (!kvm->arch.mmu_ready) {
3679 if (!kvm_is_radix(kvm))
3680 r = kvmppc_hv_setup_htab_rma(vcpu);
3681 if (!r) {
3682 if (cpu_has_feature(CPU_FTR_ARCH_300))
3683 kvmppc_setup_partition_table(kvm);
3684 kvm->arch.mmu_ready = 1;
3685 }
3686 }
3687 mutex_unlock(&kvm->lock);
3688 return r;
3689}
3690
19ccb76a
PM		 3691static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
3692{
38c53af8 3693 int n_ceded, i, r;
19ccb76a 3694 struct kvmppc_vcore *vc;
7b5f8272 3695 struct kvm_vcpu *v;
9e368f29 3696
3c78f78a
SW		 3697 trace_kvmppc_run_vcpu_enter(vcpu);
3698
371fefd6
PM		 3699 kvm_run->exit_reason = 0;
3700 vcpu->arch.ret = RESUME_GUEST;
3701 vcpu->arch.trap = 0;
2f12f034 3702 kvmppc_update_vpas(vcpu);
371fefd6 3703
371fefd6
PM		 3704 /*
3705 * Synchronize with other threads in this virtual core
3706 */
3707 vc = vcpu->arch.vcore;
3708 spin_lock(&vc->lock);
19ccb76a 3709 vcpu->arch.ceded = 0;
371fefd6
PM		 3710 vcpu->arch.run_task = current;
3711 vcpu->arch.kvm_run = kvm_run;
c7b67670 3712 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb());
19ccb76a 3713 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE;
c7b67670 3714 vcpu->arch.busy_preempt = TB_NIL;
7b5f8272 3715 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu);
371fefd6
PM		 3716 ++vc->n_runnable;
3717
19ccb76a
PM		 3718 /*
3719 * This happens the first time this is called for a vcpu.
3720 * If the vcore is already running, we may be able to start
3721 * this thread straight away and have it join in.
3722 */
8455d79e 3723 if (!signal_pending(current)) {
c0093f1a
PM		 3724 if ((vc->vcore_state == VCORE_PIGGYBACK ||
3725 vc->vcore_state == VCORE_RUNNING) &&
ec257165 3726 !VCORE_IS_EXITING(vc)) {
2f12f034 3727 kvmppc_create_dtl_entry(vcpu, vc);
b4deba5c 3728 kvmppc_start_thread(vcpu, vc);
3c78f78a 3729 trace_kvm_guest_enter(vcpu);
8455d79e 3730 } else if (vc->vcore_state == VCORE_SLEEPING) {
b3dae109 3731 swake_up_one(&vc->wq);
371fefd6
PM		 3732 }
3733
8455d79e 3734 }
371fefd6 3735
19ccb76a
PM		 3736 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
3737 !signal_pending(current)) {
072df813
PM		 3738 /* See if the MMU is ready to go */
3739 if (!vcpu->kvm->arch.mmu_ready) {
38c53af8 3740 spin_unlock(&vc->lock);
432953b4 3741 r = kvmhv_setup_mmu(vcpu);
38c53af8
PM		 3742 spin_lock(&vc->lock);
3743 if (r) {
3744 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
432953b4
PM		 3745 kvm_run->fail_entry.
3746 hardware_entry_failure_reason = 0;
38c53af8
PM		 3747 vcpu->arch.ret = r;
3748 break;
3749 }
3750 }
3751
ec257165
PM		 3752 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
3753 kvmppc_vcore_end_preempt(vc);
3754
8455d79e 3755 if (vc->vcore_state != VCORE_INACTIVE) {
ec257165 3756 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE);
19ccb76a
PM		 3757 continue;
3758 }
7b5f8272 3759 for_each_runnable_thread(i, v, vc) {
7e28e60e 3760 kvmppc_core_prepare_to_enter(v);
19ccb76a
PM		 3761 if (signal_pending(v->arch.run_task)) {
3762 kvmppc_remove_runnable(vc, v);
3763 v->stat.signal_exits++;
3764 v->arch.kvm_run->exit_reason = KVM_EXIT_INTR;
3765 v->arch.ret = -EINTR;
3766 wake_up(&v->arch.cpu_run);
3767 }
3768 }
8455d79e
PM		 3769 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
3770 break;
8455d79e 3771 n_ceded = 0;
7b5f8272 3772 for_each_runnable_thread(i, v, vc) {
1da4e2f4 3773 if (!kvmppc_vcpu_woken(v))
8455d79e 3774 n_ceded += v->arch.ceded;
4619ac88
PM		 3775 else
3776 v->arch.ceded = 0;
3777 }
25fedfca
PM		 3778 vc->runner = vcpu;
3779 if (n_ceded == vc->n_runnable) {
8455d79e 3780 kvmppc_vcore_blocked(vc);
c56dadf3 3781 } else if (need_resched()) {
ec257165 3782 kvmppc_vcore_preempt(vc);
25fedfca
PM		 3783 /* Let something else run */
3784 cond_resched_lock(&vc->lock);
ec257165
PM		 3785 if (vc->vcore_state == VCORE_PREEMPT)
3786 kvmppc_vcore_end_preempt(vc);
25fedfca 3787 } else {
8455d79e 3788 kvmppc_run_core(vc);
25fedfca 3789 }
0456ec4f 3790 vc->runner = NULL;
19ccb76a 3791 }
371fefd6 3792
8455d79e
PM		 3793 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
3794 (vc->vcore_state == VCORE_RUNNING ||
5fc3e64f
PM		 3795 vc->vcore_state == VCORE_EXITING ||
3796 vc->vcore_state == VCORE_PIGGYBACK))
ec257165 3797 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE);
8455d79e 3798
5fc3e64f
PM		 3799 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
3800 kvmppc_vcore_end_preempt(vc);
3801
8455d79e
PM		 3802 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
3803 kvmppc_remove_runnable(vc, vcpu);
3804 vcpu->stat.signal_exits++;
3805 kvm_run->exit_reason = KVM_EXIT_INTR;
3806 vcpu->arch.ret = -EINTR;
3807 }
3808
3809 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) {
3810 /* Wake up some vcpu to run the core */
7b5f8272
SJS		 3811 i = -1;
3812 v = next_runnable_thread(vc, &i);
8455d79e 3813 wake_up(&v->arch.cpu_run);
371fefd6
PM		 3814 }
3815
3c78f78a 3816 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run);
371fefd6 3817 spin_unlock(&vc->lock);
371fefd6 3818 return vcpu->arch.ret;
de56a948
PM		 3819}
3820
360cae31
PM		 3821int kvmhv_run_single_vcpu(struct kvm_run *kvm_run,
3822 struct kvm_vcpu *vcpu, u64 time_limit,
3823 unsigned long lpcr)
95a6432c
PM		 3824{
3825 int trap, r, pcpu, pcpu0;
3826 int srcu_idx;
3827 struct kvmppc_vcore *vc;
3828 struct kvm *kvm = vcpu->kvm;
360cae31
PM		 3829 struct kvm_nested_guest *nested = vcpu->arch.nested;
3830 unsigned long lpid;
95a6432c
PM		 3831
3832 trace_kvmppc_run_vcpu_enter(vcpu);
3833
3834 kvm_run->exit_reason = 0;
3835 vcpu->arch.ret = RESUME_GUEST;
3836 vcpu->arch.trap = 0;
3837
3838 vc = vcpu->arch.vcore;
3839 vcpu->arch.ceded = 0;
3840 vcpu->arch.run_task = current;
3841 vcpu->arch.kvm_run = kvm_run;
3842 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb());
3843 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE;
3844 vcpu->arch.busy_preempt = TB_NIL;
3845 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED;
3846 vc->runnable_threads[0] = vcpu;
3847 vc->n_runnable = 1;
3848 vc->runner = vcpu;
3849
3850 /* See if the MMU is ready to go */
360cae31
PM		 3851 if (!kvm->arch.mmu_ready)
3852 kvmhv_setup_mmu(vcpu);
95a6432c
PM		 3853
3854 if (need_resched())
3855 cond_resched();
3856
3857 kvmppc_update_vpas(vcpu);
3858
3859 init_vcore_to_run(vc);
3860 vc->preempt_tb = TB_NIL;
3861
3862 preempt_disable();
3863 pcpu = smp_processor_id();
3864 vc->pcpu = pcpu;
3865 kvmppc_prepare_radix_vcpu(vcpu, pcpu);
3866
3867 local_irq_disable();
3868 hard_irq_disable();
3869 if (signal_pending(current))
3870 goto sigpend;
3871 if (lazy_irq_pending() || need_resched() || !kvm->arch.mmu_ready)
3872 goto out;
3873
360cae31
PM		 3874 if (!nested) {
3875 kvmppc_core_prepare_to_enter(vcpu);
3876 if (vcpu->arch.doorbell_request) {
3877 vc->dpdes = 1;
3878 smp_wmb();
3879 vcpu->arch.doorbell_request = 0;
3880 }
3881 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL,
3882 &vcpu->arch.pending_exceptions))
3883 lpcr |= LPCR_MER;
3884 } else if (vcpu->arch.pending_exceptions ||
3885 vcpu->arch.doorbell_request ||
3886 xive_interrupt_pending(vcpu)) {
3887 vcpu->arch.ret = RESUME_HOST;
3888 goto out;
3889 }
95a6432c
PM		 3890
3891 kvmppc_clear_host_core(pcpu);
3892
3893 local_paca->kvm_hstate.tid = 0;
3894 local_paca->kvm_hstate.napping = 0;
3895 local_paca->kvm_hstate.kvm_split_mode = NULL;
3896 kvmppc_start_thread(vcpu, vc);
3897 kvmppc_create_dtl_entry(vcpu, vc);
3898 trace_kvm_guest_enter(vcpu);
3899
3900 vc->vcore_state = VCORE_RUNNING;
3901 trace_kvmppc_run_core(vc, 0);
3902
360cae31
PM		 3903 lpid = vc->kvm->arch.lpid;
3904 if (nested)
3905 lpid = nested->shadow_lpid;
3906 mtspr(SPRN_LPID, lpid);
95a6432c
PM		 3907 isync();
3908
3909 /* See comment above in kvmppc_run_core() about this */
3910 pcpu0 = pcpu;
3911 if (cpu_has_feature(CPU_FTR_ARCH_300))
3912 pcpu0 &= ~0x3UL;
3913
3914 if (cpumask_test_cpu(pcpu0, &kvm->arch.need_tlb_flush)) {
360cae31 3915 radix__local_flush_tlb_lpid_guest(lpid);
95a6432c
PM		 3916 /* Clear the bit after the TLB flush */
3917 cpumask_clear_cpu(pcpu0, &kvm->arch.need_tlb_flush);
3918 }
3919
3920 trace_hardirqs_on();
3921 guest_enter_irqoff();
3922
3923 srcu_idx = srcu_read_lock(&kvm->srcu);
3924
3925 this_cpu_disable_ftrace();
3926
360cae31 3927 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr);
95a6432c
PM		 3928 vcpu->arch.trap = trap;
3929
3930 this_cpu_enable_ftrace();
3931
3932 srcu_read_unlock(&kvm->srcu, srcu_idx);
3933
3934 mtspr(SPRN_LPID, kvm->arch.host_lpid);
3935 isync();
3936
3937 trace_hardirqs_off();
3938 set_irq_happened(trap);
3939
3940 kvmppc_set_host_core(pcpu);
3941
3942 local_irq_enable();
3943 guest_exit();
3944
3945 cpumask_clear_cpu(pcpu, &kvm->arch.cpu_in_guest);
3946
3947 preempt_enable();
3948
3949 /* cancel pending decrementer exception if DEC is now positive */
3950 if (get_tb() < vcpu->arch.dec_expires && kvmppc_core_pending_dec(vcpu))
3951 kvmppc_core_dequeue_dec(vcpu);
3952
3953 trace_kvm_guest_exit(vcpu);
3954 r = RESUME_GUEST;
360cae31
PM		 3955 if (trap) {
3956 if (!nested)
3957 r = kvmppc_handle_exit_hv(kvm_run, vcpu, current);
3958 else
3959 r = kvmppc_handle_nested_exit(vcpu);
3960 }
95a6432c
PM		 3961 vcpu->arch.ret = r;
3962
3963 if (is_kvmppc_resume_guest(r) && vcpu->arch.ceded &&
3964 !kvmppc_vcpu_woken(vcpu)) {
3965 kvmppc_set_timer(vcpu);
3966 while (vcpu->arch.ceded && !kvmppc_vcpu_woken(vcpu)) {
3967 if (signal_pending(current)) {
3968 vcpu->stat.signal_exits++;
3969 kvm_run->exit_reason = KVM_EXIT_INTR;
3970 vcpu->arch.ret = -EINTR;
3971 break;
3972 }
3973 spin_lock(&vc->lock);
3974 kvmppc_vcore_blocked(vc);
3975 spin_unlock(&vc->lock);
3976 }
3977 }
3978 vcpu->arch.ceded = 0;
3979
3980 vc->vcore_state = VCORE_INACTIVE;
3981 trace_kvmppc_run_core(vc, 1);
3982
3983 done:
3984 kvmppc_remove_runnable(vc, vcpu);
3985 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run);
3986
3987 return vcpu->arch.ret;
3988
3989 sigpend:
3990 vcpu->stat.signal_exits++;
3991 kvm_run->exit_reason = KVM_EXIT_INTR;
3992 vcpu->arch.ret = -EINTR;
3993 out:
3994 local_irq_enable();
3995 preempt_enable();
3996 goto done;
3997}
3998
3a167bea 3999static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
a8606e20
PM		 4000{
4001 int r;
913d3ff9 4002 int srcu_idx;
ca8efa1d 4003 unsigned long ebb_regs[3] = {}; /* shut up GCC */
4c3bb4cc
PM		 4004 unsigned long user_tar = 0;
4005 unsigned int user_vrsave;
1b151ce4 4006 struct kvm *kvm;
a8606e20 4007
af8f38b3
AG		 4008 if (!vcpu->arch.sane) {
4009 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4010 return -EINVAL;
4011 }
4012
46a704f8
PM		 4013 /*
4014 * Don't allow entry with a suspended transaction, because
4015 * the guest entry/exit code will lose it.
4016 * If the guest has TM enabled, save away their TM-related SPRs
4017 * (they will get restored by the TM unavailable interrupt).
4018 */
4019#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
4020 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs &&
4021 (current->thread.regs->msr & MSR_TM)) {
4022 if (MSR_TM_ACTIVE(current->thread.regs->msr)) {
4023 run->exit_reason = KVM_EXIT_FAIL_ENTRY;
4024 run->fail_entry.hardware_entry_failure_reason = 0;
4025 return -EINVAL;
4026 }
e4705715
PM		 4027 /* Enable TM so we can read the TM SPRs */
4028 mtmsr(mfmsr() | MSR_TM);
46a704f8
PM		 4029 current->thread.tm_tfhar = mfspr(SPRN_TFHAR);
4030 current->thread.tm_tfiar = mfspr(SPRN_TFIAR);
4031 current->thread.tm_texasr = mfspr(SPRN_TEXASR);
4032 current->thread.regs->msr &= ~MSR_TM;
4033 }
4034#endif
4035
7aa15842
PM		 4036 /*
4037 * Force online to 1 for the sake of old userspace which doesn't
4038 * set it.
4039 */
4040 if (!vcpu->arch.online) {
4041 atomic_inc(&vcpu->arch.vcore->online_count);
4042 vcpu->arch.online = 1;
4043 }
4044
25051b5a
SW		 4045 kvmppc_core_prepare_to_enter(vcpu);
4046
19ccb76a
PM		 4047 /* No need to go into the guest when all we'll do is come back out */
4048 if (signal_pending(current)) {
4049 run->exit_reason = KVM_EXIT_INTR;
4050 return -EINTR;
4051 }
4052
1b151ce4
PM		 4053 kvm = vcpu->kvm;
4054 atomic_inc(&kvm->arch.vcpus_running);
4055 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */
32fad281
PM		 4056 smp_mb();
4057
579e633e
AB		 4058 flush_all_to_thread(current);
4059
4c3bb4cc 4060 /* Save userspace EBB and other register values */
ca8efa1d
PM		 4061 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
4062 ebb_regs[0] = mfspr(SPRN_EBBHR);
4063 ebb_regs[1] = mfspr(SPRN_EBBRR);
4064 ebb_regs[2] = mfspr(SPRN_BESCR);
4c3bb4cc 4065 user_tar = mfspr(SPRN_TAR);
ca8efa1d 4066 }
4c3bb4cc 4067 user_vrsave = mfspr(SPRN_VRSAVE);
ca8efa1d 4068
19ccb76a 4069 vcpu->arch.wqp = &vcpu->arch.vcore->wq;
342d3db7 4070 vcpu->arch.pgdir = current->mm->pgd;
c7b67670 4071 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
19ccb76a 4072
a8606e20 4073 do {
95a6432c 4074 if (kvm->arch.threads_indep && kvm_is_radix(kvm))
360cae31
PM		 4075 r = kvmhv_run_single_vcpu(run, vcpu, ~(u64)0,
4076 vcpu->arch.vcore->lpcr);
95a6432c
PM		 4077 else
4078 r = kvmppc_run_vcpu(run, vcpu);
a8606e20
PM		 4079
4080 if (run->exit_reason == KVM_EXIT_PAPR_HCALL &&
4081 !(vcpu->arch.shregs.msr & MSR_PR)) {
3c78f78a 4082 trace_kvm_hcall_enter(vcpu);
a8606e20 4083 r = kvmppc_pseries_do_hcall(vcpu);
3c78f78a 4084 trace_kvm_hcall_exit(vcpu, r);
7e28e60e 4085 kvmppc_core_prepare_to_enter(vcpu);
913d3ff9 4086 } else if (r == RESUME_PAGE_FAULT) {
432953b4 4087 srcu_idx = srcu_read_lock(&kvm->srcu);
913d3ff9
PM		 4088 r = kvmppc_book3s_hv_page_fault(run, vcpu,
4089 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
432953b4 4090 srcu_read_unlock(&kvm->srcu, srcu_idx);
5af50993
BH		 4091 } else if (r == RESUME_PASSTHROUGH) {
4092 if (WARN_ON(xive_enabled()))
4093 r = H_SUCCESS;
4094 else
4095 r = kvmppc_xics_rm_complete(vcpu, 0);
4096 }
e59d24e6 4097 } while (is_kvmppc_resume_guest(r));
32fad281 4098
4c3bb4cc 4099 /* Restore userspace EBB and other register values */
ca8efa1d
PM		 4100 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
4101 mtspr(SPRN_EBBHR, ebb_regs[0]);
4102 mtspr(SPRN_EBBRR, ebb_regs[1]);
4103 mtspr(SPRN_BESCR, ebb_regs[2]);
4c3bb4cc
PM		 4104 mtspr(SPRN_TAR, user_tar);
4105 mtspr(SPRN_FSCR, current->thread.fscr);
ca8efa1d 4106 }
4c3bb4cc 4107 mtspr(SPRN_VRSAVE, user_vrsave);
ca8efa1d 4108
c7b67670 4109 vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
432953b4 4110 atomic_dec(&kvm->arch.vcpus_running);
a8606e20
PM		 4111 return r;
4112}
4113
5b74716e 4114static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps,
8dc6cca5 4115 int shift, int sllp)
5b74716e 4116{
8dc6cca5
PM		 4117 (*sps)->page_shift = shift;
4118 (*sps)->slb_enc = sllp;
4119 (*sps)->enc[0].page_shift = shift;
4120 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift);
1f365bb0 4121 /*
8dc6cca5 4122 * Add 16MB MPSS support (may get filtered out by userspace)
1f365bb0 4123 */
8dc6cca5
PM		 4124 if (shift != 24) {
4125 int penc = kvmppc_pgsize_lp_encoding(shift, 24);
4126 if (penc != -1) {
4127 (*sps)->enc[1].page_shift = 24;
4128 (*sps)->enc[1].pte_enc = penc;
4129 }
1f365bb0 4130 }
5b74716e
BH		 4131 (*sps)++;
4132}
4133
3a167bea
AK		 4134static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm,
4135 struct kvm_ppc_smmu_info *info)
5b74716e
BH		 4136{
4137 struct kvm_ppc_one_seg_page_size *sps;
4138
e3bfed1d
PM		 4139 /*
4140 * POWER7, POWER8 and POWER9 all support 32 storage keys for data.
4141 * POWER7 doesn't support keys for instruction accesses,
4142 * POWER8 and POWER9 do.
4143 */
4144 info->data_keys = 32;
4145 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0;
4146
8dc6cca5
PM		 4147 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */
4148 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS;
4149 info->slb_size = 32;
5b74716e
BH		 4150
4151 /* We only support these sizes for now, and no muti-size segments */
4152 sps = &info->sps[0];
8dc6cca5
PM		 4153 kvmppc_add_seg_page_size(&sps, 12, 0);
4154 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01);
4155 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L);
5b74716e
BH		 4156
4157 return 0;
4158}
4159
82ed3616
PM		 4160/*
4161 * Get (and clear) the dirty memory log for a memory slot.
4162 */
3a167bea
AK		 4163static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm,
4164 struct kvm_dirty_log *log)
82ed3616 4165{
9f6b8029 4166 struct kvm_memslots *slots;
82ed3616 4167 struct kvm_memory_slot *memslot;
8f7b79b8 4168 int i, r;
82ed3616 4169 unsigned long n;
e641a317 4170 unsigned long *buf, *p;
8f7b79b8 4171 struct kvm_vcpu *vcpu;
82ed3616
PM		 4172
4173 mutex_lock(&kvm->slots_lock);
4174
4175 r = -EINVAL;
bbacc0c1 4176 if (log->slot >= KVM_USER_MEM_SLOTS)
82ed3616
PM		 4177 goto out;
4178
9f6b8029
PB		 4179 slots = kvm_memslots(kvm);
4180 memslot = id_to_memslot(slots, log->slot);
82ed3616
PM		 4181 r = -ENOENT;
4182 if (!memslot->dirty_bitmap)
4183 goto out;
4184
8f7b79b8 4185 /*
e641a317
PM		 4186 * Use second half of bitmap area because both HPT and radix
4187 * accumulate bits in the first half.
8f7b79b8 4188 */
82ed3616 4189 n = kvm_dirty_bitmap_bytes(memslot);
8f7b79b8
PM		 4190 buf = memslot->dirty_bitmap + n / sizeof(long);
4191 memset(buf, 0, n);
82ed3616 4192
8f7b79b8
PM		 4193 if (kvm_is_radix(kvm))
4194 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf);
4195 else
4196 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf);
82ed3616
PM		 4197 if (r)
4198 goto out;
4199
e641a317
PM		 4200 /*
4201 * We accumulate dirty bits in the first half of the
4202 * memslot's dirty_bitmap area, for when pages are paged
4203 * out or modified by the host directly. Pick up these
4204 * bits and add them to the map.
4205 */
4206 p = memslot->dirty_bitmap;
4207 for (i = 0; i < n / sizeof(long); ++i)
4208 buf[i] |= xchg(&p[i], 0);
4209
8f7b79b8
PM		 4210 /* Harvest dirty bits from VPA and DTL updates */
4211 /* Note: we never modify the SLB shadow buffer areas */
4212 kvm_for_each_vcpu(i, vcpu, kvm) {
4213 spin_lock(&vcpu->arch.vpa_update_lock);
4214 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf);
4215 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf);
4216 spin_unlock(&vcpu->arch.vpa_update_lock);
4217 }
4218
82ed3616 4219 r = -EFAULT;
8f7b79b8 4220 if (copy_to_user(log->dirty_bitmap, buf, n))
82ed3616
PM		 4221 goto out;
4222
4223 r = 0;
4224out:
4225 mutex_unlock(&kvm->slots_lock);
4226 return r;
4227}
4228
3a167bea
AK		 4229static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *free,
4230 struct kvm_memory_slot *dont)
a66b48c3
PM		 4231{
4232 if (!dont || free->arch.rmap != dont->arch.rmap) {
4233 vfree(free->arch.rmap);
4234 free->arch.rmap = NULL;
b2b2f165 4235 }
a66b48c3
PM		 4236}
4237
3a167bea
AK		 4238static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot,
4239 unsigned long npages)
a66b48c3 4240{
fad953ce 4241 slot->arch.rmap = vzalloc(array_size(npages, sizeof(*slot->arch.rmap)));
a66b48c3
PM		 4242 if (!slot->arch.rmap)
4243 return -ENOMEM;
aa04b4cc 4244
c77162de
PM		 4245 return 0;
4246}
aa04b4cc 4247
3a167bea
AK		 4248static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm,
4249 struct kvm_memory_slot *memslot,
09170a49 4250 const struct kvm_userspace_memory_region *mem)
c77162de 4251{
a66b48c3 4252 return 0;
c77162de
PM		 4253}
4254
3a167bea 4255static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm,
09170a49 4256 const struct kvm_userspace_memory_region *mem,
f36f3f28
PB		 4257 const struct kvm_memory_slot *old,
4258 const struct kvm_memory_slot *new)
c77162de 4259{
dfe49dbd 4260 unsigned long npages = mem->memory_size >> PAGE_SHIFT;
dfe49dbd 4261
a56ee9f8
YX		 4262 /*
4263 * If we are making a new memslot, it might make
4264 * some address that was previously cached as emulated
4265 * MMIO be no longer emulated MMIO, so invalidate
4266 * all the caches of emulated MMIO translations.
4267 */
4268 if (npages)
4269 atomic64_inc(&kvm->arch.mmio_update);
c77162de
PM		 4270}
4271
a0144e2a
PM		 4272/*
4273 * Update LPCR values in kvm->arch and in vcores.
4274 * Caller must hold kvm->lock.
4275 */
4276void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask)
4277{
4278 long int i;
4279 u32 cores_done = 0;
4280
4281 if ((kvm->arch.lpcr & mask) == lpcr)
4282 return;
4283
4284 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr;
4285
4286 for (i = 0; i < KVM_MAX_VCORES; ++i) {
4287 struct kvmppc_vcore *vc = kvm->arch.vcores[i];
4288 if (!vc)
4289 continue;
4290 spin_lock(&vc->lock);
4291 vc->lpcr = (vc->lpcr & ~mask) | lpcr;
4292 spin_unlock(&vc->lock);
4293 if (++cores_done >= kvm->arch.online_vcores)
4294 break;
4295 }
4296}
4297
3a167bea
AK		 4298static void kvmppc_mmu_destroy_hv(struct kvm_vcpu *vcpu)
4299{
4300 return;
4301}
4302
ded13fc1 4303void kvmppc_setup_partition_table(struct kvm *kvm)
7a84084c
PM		 4304{
4305 unsigned long dw0, dw1;
4306
8cf4ecc0
PM		 4307 if (!kvm_is_radix(kvm)) {
4308 /* PS field - page size for VRMA */
4309 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) |
4310 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1);
4311 /* HTABSIZE and HTABORG fields */
4312 dw0 |= kvm->arch.sdr1;
7a84084c 4313
8cf4ecc0
PM		 4314 /* Second dword as set by userspace */
4315 dw1 = kvm->arch.process_table;
4316 } else {
4317 dw0 = PATB_HR | radix__get_tree_size() |
4318 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE;
4319 dw1 = PATB_GR | kvm->arch.process_table;
4320 }
8e3f5fc1 4321 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1);
7a84084c
PM		 4322}
4323
1b151ce4
PM		 4324/*
4325 * Set up HPT (hashed page table) and RMA (real-mode area).
4326 * Must be called with kvm->lock held.
4327 */
32fad281 4328static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu)
c77162de
PM		 4329{
4330 int err = 0;
4331 struct kvm *kvm = vcpu->kvm;
c77162de
PM		 4332 unsigned long hva;
4333 struct kvm_memory_slot *memslot;
4334 struct vm_area_struct *vma;
a0144e2a 4335 unsigned long lpcr = 0, senc;
c77162de 4336 unsigned long psize, porder;
2c9097e4 4337 int srcu_idx;
c77162de 4338
32fad281 4339 /* Allocate hashed page table (if not done already) and reset it */
3f9d4f5a 4340 if (!kvm->arch.hpt.virt) {
aae0777f
DG		 4341 int order = KVM_DEFAULT_HPT_ORDER;
4342 struct kvm_hpt_info info;
4343
4344 err = kvmppc_allocate_hpt(&info, order);
4345 /* If we get here, it means userspace didn't specify a
4346 * size explicitly. So, try successively smaller
4347 * sizes if the default failed. */
4348 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER)
4349 err = kvmppc_allocate_hpt(&info, order);
4350
4351 if (err < 0) {
32fad281
PM		 4352 pr_err("KVM: Couldn't alloc HPT\n");
4353 goto out;
4354 }
aae0777f
DG		 4355
4356 kvmppc_set_hpt(kvm, &info);
32fad281
PM		 4357 }
4358
c77162de 4359 /* Look up the memslot for guest physical address 0 */
2c9097e4 4360 srcu_idx = srcu_read_lock(&kvm->srcu);
c77162de 4361 memslot = gfn_to_memslot(kvm, 0);
aa04b4cc 4362
c77162de
PM		 4363 /* We must have some memory at 0 by now */
4364 err = -EINVAL;
4365 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
2c9097e4 4366 goto out_srcu;
c77162de
PM		 4367
4368 /* Look up the VMA for the start of this memory slot */
4369 hva = memslot->userspace_addr;
4370 down_read(&current->mm->mmap_sem);
4371 vma = find_vma(current->mm, hva);
4372 if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO))
4373 goto up_out;
4374
4375 psize = vma_kernel_pagesize(vma);
c77162de 4376
c77162de
PM		 4377 up_read(&current->mm->mmap_sem);
4378
c17b98cf 4379 /* We can handle 4k, 64k or 16M pages in the VRMA */
debd574f
PM		 4380 if (psize >= 0x1000000)
4381 psize = 0x1000000;
4382 else if (psize >= 0x10000)
4383 psize = 0x10000;
4384 else
4385 psize = 0x1000;
4386 porder = __ilog2(psize);
c77162de 4387
c17b98cf
PM		 4388 senc = slb_pgsize_encoding(psize);
4389 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T |
4390 (VRMA_VSID << SLB_VSID_SHIFT_1T);
c17b98cf
PM		 4391 /* Create HPTEs in the hash page table for the VRMA */
4392 kvmppc_map_vrma(vcpu, memslot, porder);
aa04b4cc 4393
7a84084c
PM		 4394 /* Update VRMASD field in the LPCR */
4395 if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
4396 /* the -4 is to account for senc values starting at 0x10 */
4397 lpcr = senc << (LPCR_VRMASD_SH - 4);
4398 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD);
7a84084c 4399 }
a0144e2a 4400
1b151ce4 4401 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */
c77162de 4402 smp_wmb();
c77162de 4403 err = 0;
2c9097e4
PM		 4404 out_srcu:
4405 srcu_read_unlock(&kvm->srcu, srcu_idx);
c77162de 4406 out:
c77162de 4407 return err;
b2b2f165 4408
c77162de
PM		 4409 up_out:
4410 up_read(&current->mm->mmap_sem);
505d6421 4411 goto out_srcu;
de56a948
PM		 4412}
4413
18c3640c
PM		 4414/* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */
4415int kvmppc_switch_mmu_to_hpt(struct kvm *kvm)
4416{
8e3f5fc1
PM		 4417 if (kvm->arch.nested_enable) {
4418 kvm->arch.nested_enable = false;
4419 kvmhv_release_all_nested(kvm);
4420 }
18c3640c
PM		 4421 kvmppc_free_radix(kvm);
4422 kvmppc_update_lpcr(kvm, LPCR_VPM1,
4423 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR);
4424 kvmppc_rmap_reset(kvm);
4425 kvm->arch.radix = 0;
4426 kvm->arch.process_table = 0;
4427 return 0;
4428}
4429
4430/* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */
4431int kvmppc_switch_mmu_to_radix(struct kvm *kvm)
4432{
4433 int err;
4434
4435 err = kvmppc_init_vm_radix(kvm);
4436 if (err)
4437 return err;
4438
4439 kvmppc_free_hpt(&kvm->arch.hpt);
4440 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR,
4441 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR);
4442 kvm->arch.radix = 1;
4443 return 0;
4444}
4445
79b6c247
SW		 4446#ifdef CONFIG_KVM_XICS
4447/*
4448 * Allocate a per-core structure for managing state about which cores are
4449 * running in the host versus the guest and for exchanging data between
4450 * real mode KVM and CPU running in the host.
4451 * This is only done for the first VM.
4452 * The allocated structure stays even if all VMs have stopped.
4453 * It is only freed when the kvm-hv module is unloaded.
4454 * It's OK for this routine to fail, we just don't support host
4455 * core operations like redirecting H_IPI wakeups.
4456 */
4457void kvmppc_alloc_host_rm_ops(void)
4458{
4459 struct kvmppc_host_rm_ops *ops;
4460 unsigned long l_ops;
4461 int cpu, core;
4462 int size;
4463
4464 /* Not the first time here ? */
4465 if (kvmppc_host_rm_ops_hv != NULL)
4466 return;
4467
4468 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL);
4469 if (!ops)
4470 return;
4471
4472 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core);
4473 ops->rm_core = kzalloc(size, GFP_KERNEL);
4474
4475 if (!ops->rm_core) {
4476 kfree(ops);
4477 return;
4478 }
4479
419af25f 4480 cpus_read_lock();
6f3bb809 4481
79b6c247
SW		 4482 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) {
4483 if (!cpu_online(cpu))
4484 continue;
4485
4486 core = cpu >> threads_shift;
4487 ops->rm_core[core].rm_state.in_host = 1;
4488 }
4489
0c2a6606
SW		 4490 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv;
4491
79b6c247
SW		 4492 /*
4493 * Make the contents of the kvmppc_host_rm_ops structure visible
4494 * to other CPUs before we assign it to the global variable.
4495 * Do an atomic assignment (no locks used here), but if someone
4496 * beats us to it, just free our copy and return.
4497 */
4498 smp_wmb();
4499 l_ops = (unsigned long) ops;
4500
4501 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) {
419af25f 4502 cpus_read_unlock();
79b6c247
SW		 4503 kfree(ops->rm_core);
4504 kfree(ops);
6f3bb809 4505 return;
79b6c247 4506 }
6f3bb809 4507
419af25f
SAS		 4508 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE,
4509 "ppc/kvm_book3s:prepare",
4510 kvmppc_set_host_core,
4511 kvmppc_clear_host_core);
4512 cpus_read_unlock();
79b6c247
SW		 4513}
4514
4515void kvmppc_free_host_rm_ops(void)
4516{
4517 if (kvmppc_host_rm_ops_hv) {
3f7cd919 4518 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE);
79b6c247
SW		 4519 kfree(kvmppc_host_rm_ops_hv->rm_core);
4520 kfree(kvmppc_host_rm_ops_hv);
4521 kvmppc_host_rm_ops_hv = NULL;
4522 }
4523}
4524#endif
4525
3a167bea 4526static int kvmppc_core_init_vm_hv(struct kvm *kvm)
de56a948 4527{
32fad281 4528 unsigned long lpcr, lpid;
e23a808b 4529 char buf[32];
8cf4ecc0 4530 int ret;
de56a948 4531
32fad281
PM		 4532 /* Allocate the guest's logical partition ID */
4533
4534 lpid = kvmppc_alloc_lpid();
5d226ae5 4535 if ((long)lpid < 0)
32fad281
PM		 4536 return -ENOMEM;
4537 kvm->arch.lpid = lpid;
de56a948 4538
79b6c247
SW		 4539 kvmppc_alloc_host_rm_ops();
4540
8e3f5fc1
PM		 4541 kvmhv_vm_nested_init(kvm);
4542
1b400ba0
PM		 4543 /*
4544 * Since we don't flush the TLB when tearing down a VM,
4545 * and this lpid might have previously been used,
4546 * make sure we flush on each core before running the new VM.
7c5b06ca
PM		 4547 * On POWER9, the tlbie in mmu_partition_table_set_entry()
4548 * does this flush for us.
1b400ba0 4549 */
7c5b06ca
PM		 4550 if (!cpu_has_feature(CPU_FTR_ARCH_300))
4551 cpumask_setall(&kvm->arch.need_tlb_flush);
1b400ba0 4552
699a0ea0
PM		 4553 /* Start out with the default set of hcalls enabled */
4554 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls,
4555 sizeof(kvm->arch.enabled_hcalls));
4556
7a84084c
PM		 4557 if (!cpu_has_feature(CPU_FTR_ARCH_300))
4558 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1);
aa04b4cc 4559
c17b98cf
PM		 4560 /* Init LPCR for virtual RMA mode */
4561 kvm->arch.host_lpid = mfspr(SPRN_LPID);
4562 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR);
4563 lpcr &= LPCR_PECE | LPCR_LPES;
4564 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE |
4565 LPCR_VPM0 | LPCR_VPM1;
4566 kvm->arch.vrma_slb_v = SLB_VSID_B_1T |
4567 (VRMA_VSID << SLB_VSID_SHIFT_1T);
4568 /* On POWER8 turn on online bit to enable PURR/SPURR */
4569 if (cpu_has_feature(CPU_FTR_ARCH_207S))
4570 lpcr |= LPCR_ONL;
84f7139c
PM		 4571 /*
4572 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed)
4573 * Set HVICE bit to enable hypervisor virtualization interrupts.
5af50993
BH		 4574 * Set HEIC to prevent OS interrupts to go to hypervisor (should
4575 * be unnecessary but better safe than sorry in case we re-enable
4576 * EE in HV mode with this LPCR still set)
84f7139c
PM		 4577 */
4578 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
7a84084c 4579 lpcr &= ~LPCR_VPM0;
5af50993
BH		 4580 lpcr |= LPCR_HVICE | LPCR_HEIC;
4581
4582 /*
4583 * If xive is enabled, we route 0x500 interrupts directly
4584 * to the guest.
4585 */
4586 if (xive_enabled())
4587 lpcr |= LPCR_LPES;
84f7139c
PM		 4588 }
4589
8cf4ecc0 4590 /*
18c3640c 4591 * If the host uses radix, the guest starts out as radix.
8cf4ecc0
PM		 4592 */
4593 if (radix_enabled()) {
4594 kvm->arch.radix = 1;
1b151ce4 4595 kvm->arch.mmu_ready = 1;
8cf4ecc0
PM		 4596 lpcr &= ~LPCR_VPM1;
4597 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR;
4598 ret = kvmppc_init_vm_radix(kvm);
4599 if (ret) {
4600 kvmppc_free_lpid(kvm->arch.lpid);
4601 return ret;
4602 }
4603 kvmppc_setup_partition_table(kvm);
4604 }
4605
9e368f29 4606 kvm->arch.lpcr = lpcr;
aa04b4cc 4607
5e985969
DG		 4608 /* Initialization for future HPT resizes */
4609 kvm->arch.resize_hpt = NULL;
4610
7c5b06ca
PM		 4611 /*
4612 * Work out how many sets the TLB has, for the use of
4613 * the TLB invalidation loop in book3s_hv_rmhandlers.S.
4614 */
18c3640c 4615 if (radix_enabled())
8cf4ecc0
PM		 4616 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */
4617 else if (cpu_has_feature(CPU_FTR_ARCH_300))
7c5b06ca
PM		 4618 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */
4619 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
4620 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */
4621 else
4622 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */
4623
512691d4 4624 /*
441c19c8
ME		 4625 * Track that we now have a HV mode VM active. This blocks secondary
4626 * CPU threads from coming online.
516f7898
PM		 4627 * On POWER9, we only need to do this if the "indep_threads_mode"
4628 * module parameter has been set to N.
512691d4 4629 */
360cae31
PM		 4630 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
4631 if (!indep_threads_mode && !cpu_has_feature(CPU_FTR_HVMODE)) {
4632 pr_warn("KVM: Ignoring indep_threads_mode=N in nested hypervisor\n");
4633 kvm->arch.threads_indep = true;
4634 } else {
4635 kvm->arch.threads_indep = indep_threads_mode;
4636 }
4637 }
516f7898 4638 if (!kvm->arch.threads_indep)
8cf4ecc0 4639 kvm_hv_vm_activated();
512691d4 4640
3c313524
PM		 4641 /*
4642 * Initialize smt_mode depending on processor.
4643 * POWER8 and earlier have to use "strict" threading, where
4644 * all vCPUs in a vcore have to run on the same (sub)core,
4645 * whereas on POWER9 the threads can each run a different
4646 * guest.
4647 */
4648 if (!cpu_has_feature(CPU_FTR_ARCH_300))
4649 kvm->arch.smt_mode = threads_per_subcore;
4650 else
4651 kvm->arch.smt_mode = 1;
57900694 4652 kvm->arch.emul_smt_mode = 1;
3c313524 4653
e23a808b
PM		 4654 /*
4655 * Create a debugfs directory for the VM
4656 */
4657 snprintf(buf, sizeof(buf), "vm%d", current->pid);
4658 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir);
929f45e3 4659 kvmppc_mmu_debugfs_init(kvm);
9a94d3ee
PM		 4660 if (radix_enabled())
4661 kvmhv_radix_debugfs_init(kvm);
e23a808b 4662
54738c09 4663 return 0;
de56a948
PM		 4664}
4665
f1378b1c
PM		 4666static void kvmppc_free_vcores(struct kvm *kvm)
4667{
4668 long int i;
4669
23316316 4670 for (i = 0; i < KVM_MAX_VCORES; ++i)
f1378b1c
PM		 4671 kfree(kvm->arch.vcores[i]);
4672 kvm->arch.online_vcores = 0;
4673}
4674
3a167bea 4675static void kvmppc_core_destroy_vm_hv(struct kvm *kvm)
de56a948 4676{
e23a808b
PM		 4677 debugfs_remove_recursive(kvm->arch.debugfs_dir);
4678
516f7898 4679 if (!kvm->arch.threads_indep)
8cf4ecc0 4680 kvm_hv_vm_deactivated();
512691d4 4681
f1378b1c 4682 kvmppc_free_vcores(kvm);
aa04b4cc 4683
8cf4ecc0 4684
5a319350
PM		 4685 if (kvm_is_radix(kvm))
4686 kvmppc_free_radix(kvm);
4687 else
aae0777f 4688 kvmppc_free_hpt(&kvm->arch.hpt);
c57875f5 4689
89329c0b
SJS		 4690 /* Perform global invalidation and return lpid to the pool */
4691 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
8e3f5fc1
PM		 4692 if (kvm->arch.nested_enable)
4693 kvmhv_release_all_nested(kvm);
89329c0b 4694 kvm->arch.process_table = 0;
8e3f5fc1 4695 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0);
89329c0b
SJS		 4696 }
4697 kvmppc_free_lpid(kvm->arch.lpid);
4698
c57875f5 4699 kvmppc_free_pimap(kvm);
de56a948
PM		 4700}
4701
3a167bea
AK		 4702/* We don't need to emulate any privileged instructions or dcbz */
4703static int kvmppc_core_emulate_op_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
4704 unsigned int inst, int *advance)
de56a948 4705{
3a167bea 4706 return EMULATE_FAIL;
de56a948
PM		 4707}
4708
3a167bea
AK		 4709static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn,
4710 ulong spr_val)
de56a948
PM		 4711{
4712 return EMULATE_FAIL;
4713}
4714
3a167bea
AK		 4715static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn,
4716 ulong *spr_val)
de56a948
PM		 4717{
4718 return EMULATE_FAIL;
4719}
4720
3a167bea 4721static int kvmppc_core_check_processor_compat_hv(void)
de56a948 4722{
c17b98cf
PM		 4723 if (!cpu_has_feature(CPU_FTR_HVMODE) ||
4724 !cpu_has_feature(CPU_FTR_ARCH_206))
3a167bea 4725 return -EIO;
50de596d 4726
3a167bea 4727 return 0;
de56a948
PM		 4728}
4729
8daaafc8
SW		 4730#ifdef CONFIG_KVM_XICS
4731
4732void kvmppc_free_pimap(struct kvm *kvm)
4733{
4734 kfree(kvm->arch.pimap);
4735}
4736
c57875f5 4737static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void)
8daaafc8
SW		 4738{
4739 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL);
4740}
c57875f5
SW		 4741
4742static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
4743{
4744 struct irq_desc *desc;
4745 struct kvmppc_irq_map *irq_map;
4746 struct kvmppc_passthru_irqmap *pimap;
4747 struct irq_chip *chip;
5af50993 4748 int i, rc = 0;
c57875f5 4749
644abbb2
SW		 4750 if (!kvm_irq_bypass)
4751 return 1;
4752
c57875f5
SW		 4753 desc = irq_to_desc(host_irq);
4754 if (!desc)
4755 return -EIO;
4756
4757 mutex_lock(&kvm->lock);
4758
4759 pimap = kvm->arch.pimap;
4760 if (pimap == NULL) {
4761 /* First call, allocate structure to hold IRQ map */
4762 pimap = kvmppc_alloc_pimap();
4763 if (pimap == NULL) {
4764 mutex_unlock(&kvm->lock);
4765 return -ENOMEM;
4766 }
4767 kvm->arch.pimap = pimap;
4768 }
4769
4770 /*
4771 * For now, we only support interrupts for which the EOI operation
4772 * is an OPAL call followed by a write to XIRR, since that's
5af50993 4773 * what our real-mode EOI code does, or a XIVE interrupt
c57875f5
SW		 4774 */
4775 chip = irq_data_get_irq_chip(&desc->irq_data);
5af50993 4776 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) {
c57875f5
SW		 4777 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n",
4778 host_irq, guest_gsi);
4779 mutex_unlock(&kvm->lock);
4780 return -ENOENT;
4781 }
4782
4783 /*
4784 * See if we already have an entry for this guest IRQ number.
4785 * If it's mapped to a hardware IRQ number, that's an error,
4786 * otherwise re-use this entry.
4787 */
4788 for (i = 0; i < pimap->n_mapped; i++) {
4789 if (guest_gsi == pimap->mapped[i].v_hwirq) {
4790 if (pimap->mapped[i].r_hwirq) {
4791 mutex_unlock(&kvm->lock);
4792 return -EINVAL;
4793 }
4794 break;
4795 }
4796 }
4797
4798 if (i == KVMPPC_PIRQ_MAPPED) {
4799 mutex_unlock(&kvm->lock);
4800 return -EAGAIN; /* table is full */
4801 }
4802
4803 irq_map = &pimap->mapped[i];
4804
4805 irq_map->v_hwirq = guest_gsi;
c57875f5
SW		 4806 irq_map->desc = desc;
4807
e3c13e56
SW		 4808 /*
4809 * Order the above two stores before the next to serialize with
4810 * the KVM real mode handler.
4811 */
4812 smp_wmb();
4813 irq_map->r_hwirq = desc->irq_data.hwirq;
4814
c57875f5
SW		 4815 if (i == pimap->n_mapped)
4816 pimap->n_mapped++;
4817
5af50993
BH		 4818 if (xive_enabled())
4819 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc);
4820 else
4821 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq);
4822 if (rc)
4823 irq_map->r_hwirq = 0;
5d375199 4824
c57875f5
SW		 4825 mutex_unlock(&kvm->lock);
4826
4827 return 0;
4828}
4829
4830static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
4831{
4832 struct irq_desc *desc;
4833 struct kvmppc_passthru_irqmap *pimap;
5af50993 4834 int i, rc = 0;
c57875f5 4835
644abbb2
SW		 4836 if (!kvm_irq_bypass)
4837 return 0;
4838
c57875f5
SW		 4839 desc = irq_to_desc(host_irq);
4840 if (!desc)
4841 return -EIO;
4842
4843 mutex_lock(&kvm->lock);
a1c52e1c
ME		 4844 if (!kvm->arch.pimap)
4845 goto unlock;
c57875f5 4846
c57875f5
SW		 4847 pimap = kvm->arch.pimap;
4848
4849 for (i = 0; i < pimap->n_mapped; i++) {
4850 if (guest_gsi == pimap->mapped[i].v_hwirq)
4851 break;
4852 }
4853
4854 if (i == pimap->n_mapped) {
4855 mutex_unlock(&kvm->lock);
4856 return -ENODEV;
4857 }
4858
5af50993
BH		 4859 if (xive_enabled())
4860 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc);
4861 else
4862 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq);
5d375199 4863
5af50993 4864 /* invalidate the entry (what do do on error from the above ?) */
c57875f5
SW		 4865 pimap->mapped[i].r_hwirq = 0;
4866
4867 /*
4868 * We don't free this structure even when the count goes to
4869 * zero. The structure is freed when we destroy the VM.
4870 */
a1c52e1c 4871 unlock:
c57875f5 4872 mutex_unlock(&kvm->lock);
5af50993 4873 return rc;
c57875f5
SW		 4874}
4875
4876static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons,
4877 struct irq_bypass_producer *prod)
4878{
4879 int ret = 0;
4880 struct kvm_kernel_irqfd *irqfd =
4881 container_of(cons, struct kvm_kernel_irqfd, consumer);
4882
4883 irqfd->producer = prod;
4884
4885 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
4886 if (ret)
4887 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n",
4888 prod->irq, irqfd->gsi, ret);
4889
4890 return ret;
4891}
4892
4893static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons,
4894 struct irq_bypass_producer *prod)
4895{
4896 int ret;
4897 struct kvm_kernel_irqfd *irqfd =
4898 container_of(cons, struct kvm_kernel_irqfd, consumer);
4899
4900 irqfd->producer = NULL;
4901
4902 /*
4903 * When producer of consumer is unregistered, we change back to
4904 * default external interrupt handling mode - KVM real mode
4905 * will switch back to host.
4906 */
4907 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
4908 if (ret)
4909 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n",
4910 prod->irq, irqfd->gsi, ret);
4911}
8daaafc8
SW		 4912#endif
4913
3a167bea
AK		 4914static long kvm_arch_vm_ioctl_hv(struct file *filp,
4915 unsigned int ioctl, unsigned long arg)
4916{
4917 struct kvm *kvm __maybe_unused = filp->private_data;
4918 void __user *argp = (void __user *)arg;
4919 long r;
4920
4921 switch (ioctl) {
4922
3a167bea
AK		 4923 case KVM_PPC_ALLOCATE_HTAB: {
4924 u32 htab_order;
4925
4926 r = -EFAULT;
4927 if (get_user(htab_order, (u32 __user *)argp))
4928 break;
f98a8bf9 4929 r = kvmppc_alloc_reset_hpt(kvm, htab_order);
3a167bea
AK		 4930 if (r)
4931 break;
3a167bea
AK		 4932 r = 0;
4933 break;
4934 }
4935
4936 case KVM_PPC_GET_HTAB_FD: {
4937 struct kvm_get_htab_fd ghf;
4938
4939 r = -EFAULT;
4940 if (copy_from_user(&ghf, argp, sizeof(ghf)))
4941 break;
4942 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf);
4943 break;
4944 }
4945
5e985969
DG		 4946 case KVM_PPC_RESIZE_HPT_PREPARE: {
4947 struct kvm_ppc_resize_hpt rhpt;
4948
4949 r = -EFAULT;
4950 if (copy_from_user(&rhpt, argp, sizeof(rhpt)))
4951 break;
4952
4953 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt);
4954 break;
4955 }
4956
4957 case KVM_PPC_RESIZE_HPT_COMMIT: {
4958 struct kvm_ppc_resize_hpt rhpt;
4959
4960 r = -EFAULT;
4961 if (copy_from_user(&rhpt, argp, sizeof(rhpt)))
4962 break;
4963
4964 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt);
4965 break;
4966 }
4967
3a167bea
AK		 4968 default:
4969 r = -ENOTTY;
4970 }
4971
4972 return r;
4973}
4974
699a0ea0
PM		 4975/*
4976 * List of hcall numbers to enable by default.
4977 * For compatibility with old userspace, we enable by default
4978 * all hcalls that were implemented before the hcall-enabling
4979 * facility was added. Note this list should not include H_RTAS.
4980 */
4981static unsigned int default_hcall_list[] = {
4982 H_REMOVE,
4983 H_ENTER,
4984 H_READ,
4985 H_PROTECT,
4986 H_BULK_REMOVE,
4987 H_GET_TCE,
4988 H_PUT_TCE,
4989 H_SET_DABR,
4990 H_SET_XDABR,
4991 H_CEDE,
4992 H_PROD,
4993 H_CONFER,
4994 H_REGISTER_VPA,
4995#ifdef CONFIG_KVM_XICS
4996 H_EOI,
4997 H_CPPR,
4998 H_IPI,
4999 H_IPOLL,
5000 H_XIRR,
5001 H_XIRR_X,
5002#endif
5003 0
5004};
5005
5006static void init_default_hcalls(void)
5007{
5008 int i;
ae2113a4 5009 unsigned int hcall;
699a0ea0 5010
ae2113a4
PM		 5011 for (i = 0; default_hcall_list[i]; ++i) {
5012 hcall = default_hcall_list[i];
5013 WARN_ON(!kvmppc_hcall_impl_hv(hcall));
5014 __set_bit(hcall / 4, default_enabled_hcalls);
5015 }
699a0ea0
PM		 5016}
5017
c9270132
PM		 5018static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg)
5019{
468808bd 5020 unsigned long lpcr;
8cf4ecc0 5021 int radix;
18c3640c 5022 int err;
468808bd
PM		 5023
5024 /* If not on a POWER9, reject it */
5025 if (!cpu_has_feature(CPU_FTR_ARCH_300))
5026 return -ENODEV;
5027
5028 /* If any unknown flags set, reject it */
5029 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE))
5030 return -EINVAL;
5031
468808bd 5032 /* GR (guest radix) bit in process_table field must match */
18c3640c 5033 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX);
8cf4ecc0 5034 if (!!(cfg->process_table & PATB_GR) != radix)
468808bd
PM		 5035 return -EINVAL;
5036
5037 /* Process table size field must be reasonable, i.e. <= 24 */
5038 if ((cfg->process_table & PRTS_MASK) > 24)
5039 return -EINVAL;
5040
18c3640c
PM		 5041 /* We can change a guest to/from radix now, if the host is radix */
5042 if (radix && !radix_enabled())
5043 return -EINVAL;
5044
cf5f6f31 5045 mutex_lock(&kvm->lock);
18c3640c
PM		 5046 if (radix != kvm_is_radix(kvm)) {
5047 if (kvm->arch.mmu_ready) {
5048 kvm->arch.mmu_ready = 0;
5049 /* order mmu_ready vs. vcpus_running */
5050 smp_mb();
5051 if (atomic_read(&kvm->arch.vcpus_running)) {
5052 kvm->arch.mmu_ready = 1;
5053 err = -EBUSY;
5054 goto out_unlock;
5055 }
5056 }
5057 if (radix)
5058 err = kvmppc_switch_mmu_to_radix(kvm);
5059 else
5060 err = kvmppc_switch_mmu_to_hpt(kvm);
5061 if (err)
5062 goto out_unlock;
5063 }
5064
468808bd
PM		 5065 kvm->arch.process_table = cfg->process_table;
5066 kvmppc_setup_partition_table(kvm);
5067
5068 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0;
5069 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE);
18c3640c 5070 err = 0;
468808bd 5071
18c3640c
PM		 5072 out_unlock:
5073 mutex_unlock(&kvm->lock);
5074 return err;
c9270132
PM		 5075}
5076
cbbc58d4 5077static struct kvmppc_ops kvm_ops_hv = {
3a167bea
AK		 5078 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv,
5079 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv,
5080 .get_one_reg = kvmppc_get_one_reg_hv,
5081 .set_one_reg = kvmppc_set_one_reg_hv,
5082 .vcpu_load = kvmppc_core_vcpu_load_hv,
5083 .vcpu_put = kvmppc_core_vcpu_put_hv,
5084 .set_msr = kvmppc_set_msr_hv,
5085 .vcpu_run = kvmppc_vcpu_run_hv,
5086 .vcpu_create = kvmppc_core_vcpu_create_hv,
5087 .vcpu_free = kvmppc_core_vcpu_free_hv,
5088 .check_requests = kvmppc_core_check_requests_hv,
5089 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv,
5090 .flush_memslot = kvmppc_core_flush_memslot_hv,
5091 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv,
5092 .commit_memory_region = kvmppc_core_commit_memory_region_hv,
3a167bea
AK		 5093 .unmap_hva_range = kvm_unmap_hva_range_hv,
5094 .age_hva = kvm_age_hva_hv,
5095 .test_age_hva = kvm_test_age_hva_hv,
5096 .set_spte_hva = kvm_set_spte_hva_hv,
5097 .mmu_destroy = kvmppc_mmu_destroy_hv,
5098 .free_memslot = kvmppc_core_free_memslot_hv,
5099 .create_memslot = kvmppc_core_create_memslot_hv,
5100 .init_vm = kvmppc_core_init_vm_hv,
5101 .destroy_vm = kvmppc_core_destroy_vm_hv,
3a167bea
AK		 5102 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv,
5103 .emulate_op = kvmppc_core_emulate_op_hv,
5104 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv,
5105 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv,
5106 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv,
5107 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv,
ae2113a4 5108 .hcall_implemented = kvmppc_hcall_impl_hv,
c57875f5
SW		 5109#ifdef CONFIG_KVM_XICS
5110 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv,
5111 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv,
5112#endif
c9270132
PM		 5113 .configure_mmu = kvmhv_configure_mmu,
5114 .get_rmmu_info = kvmhv_get_rmmu_info,
3c313524 5115 .set_smt_mode = kvmhv_set_smt_mode,
3a167bea
AK		 5116};
5117
fd7bacbc
MS		 5118static int kvm_init_subcore_bitmap(void)
5119{
5120 int i, j;
5121 int nr_cores = cpu_nr_cores();
5122 struct sibling_subcore_state *sibling_subcore_state;
5123
5124 for (i = 0; i < nr_cores; i++) {
5125 int first_cpu = i * threads_per_core;
5126 int node = cpu_to_node(first_cpu);
5127
5128 /* Ignore if it is already allocated. */
d2e60075 5129 if (paca_ptrs[first_cpu]->sibling_subcore_state)
fd7bacbc
MS		 5130 continue;
5131
5132 sibling_subcore_state =
5133 kmalloc_node(sizeof(struct sibling_subcore_state),
5134 GFP_KERNEL, node);
5135 if (!sibling_subcore_state)
5136 return -ENOMEM;
5137
5138 memset(sibling_subcore_state, 0,
5139 sizeof(struct sibling_subcore_state));
5140
5141 for (j = 0; j < threads_per_core; j++) {
5142 int cpu = first_cpu + j;
5143
d2e60075
NP		 5144 paca_ptrs[cpu]->sibling_subcore_state =
5145 sibling_subcore_state;
fd7bacbc
MS		 5146 }
5147 }
5148 return 0;
5149}
5150
5a319350
PM		 5151static int kvmppc_radix_possible(void)
5152{
5153 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled();
5154}
5155
3a167bea 5156static int kvmppc_book3s_init_hv(void)
de56a948
PM		 5157{
5158 int r;
cbbc58d4
AK		 5159 /*
5160 * FIXME!! Do we need to check on all cpus ?
5161 */
5162 r = kvmppc_core_check_processor_compat_hv();
5163 if (r < 0)
739e2425 5164 return -ENODEV;
de56a948 5165
8e3f5fc1
PM		 5166 r = kvmhv_nested_init();
5167 if (r)
5168 return r;
5169
fd7bacbc
MS		 5170 r = kvm_init_subcore_bitmap();
5171 if (r)
5172 return r;
5173
f725758b
PM		 5174 /*
5175 * We need a way of accessing the XICS interrupt controller,
d2e60075 5176 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or
f725758b
PM		 5177 * indirectly, via OPAL.
5178 */
5179#ifdef CONFIG_SMP
fb7dcf72 5180 if (!xive_enabled() && !local_paca->kvm_hstate.xics_phys) {
f725758b
PM		 5181 struct device_node *np;
5182
5183 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc");
5184 if (!np) {
5185 pr_err("KVM-HV: Cannot determine method for accessing XICS\n");
5186 return -ENODEV;
5187 }
51eaa08f
NMG		 5188 /* presence of intc confirmed - node can be dropped again */
5189 of_node_put(np);
f725758b
PM		 5190 }
5191#endif
5192
cbbc58d4
AK		 5193 kvm_ops_hv.owner = THIS_MODULE;
5194 kvmppc_hv_ops = &kvm_ops_hv;
de56a948 5195
699a0ea0
PM		 5196 init_default_hcalls();
5197
ec257165
PM		 5198 init_vcore_lists();
5199
cbbc58d4 5200 r = kvmppc_mmu_hv_init();
5a319350
PM		 5201 if (r)
5202 return r;
5203
5204 if (kvmppc_radix_possible())
5205 r = kvmppc_radix_init();
00608e1f
PM		 5206
5207 /*
5208 * POWER9 chips before version 2.02 can't have some threads in
5209 * HPT mode and some in radix mode on the same core.
5210 */
5211 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
5212 unsigned int pvr = mfspr(SPRN_PVR);
5213 if ((pvr >> 16) == PVR_POWER9 &&
5214 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) ||
5215 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101)))
5216 no_mixing_hpt_and_radix = true;
5217 }
5218
de56a948
PM		 5219 return r;
5220}
5221
3a167bea 5222static void kvmppc_book3s_exit_hv(void)
de56a948 5223{
79b6c247 5224 kvmppc_free_host_rm_ops();
5a319350
PM		 5225 if (kvmppc_radix_possible())
5226 kvmppc_radix_exit();
cbbc58d4 5227 kvmppc_hv_ops = NULL;
8e3f5fc1 5228 kvmhv_nested_exit();
de56a948
PM		 5229}
5230
3a167bea
AK		 5231module_init(kvmppc_book3s_init_hv);
5232module_exit(kvmppc_book3s_exit_hv);
2ba9f0d8 5233MODULE_LICENSE("GPL");
398a76c6
AG		 5234MODULE_ALIAS_MISCDEV(KVM_MINOR);
5235MODULE_ALIAS("devname:kvm");
Linux 6.x block layer and io_uring tree(s)