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de56a948 PM |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License, version 2, as | |
4 | * published by the Free Software Foundation. | |
5 | * | |
6 | * This program is distributed in the hope that it will be useful, | |
7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
9 | * GNU General Public License for more details. | |
10 | * | |
11 | * You should have received a copy of the GNU General Public License | |
12 | * along with this program; if not, write to the Free Software | |
13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
14 | * | |
15 | * Copyright 2010 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> | |
16 | */ | |
17 | ||
18 | #include <linux/types.h> | |
19 | #include <linux/string.h> | |
20 | #include <linux/kvm.h> | |
21 | #include <linux/kvm_host.h> | |
22 | #include <linux/highmem.h> | |
23 | #include <linux/gfp.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/hugetlb.h> | |
8936dda4 | 26 | #include <linux/vmalloc.h> |
2c9097e4 | 27 | #include <linux/srcu.h> |
a2932923 PM |
28 | #include <linux/anon_inodes.h> |
29 | #include <linux/file.h> | |
de56a948 PM |
30 | |
31 | #include <asm/tlbflush.h> | |
32 | #include <asm/kvm_ppc.h> | |
33 | #include <asm/kvm_book3s.h> | |
34 | #include <asm/mmu-hash64.h> | |
35 | #include <asm/hvcall.h> | |
36 | #include <asm/synch.h> | |
37 | #include <asm/ppc-opcode.h> | |
38 | #include <asm/cputable.h> | |
39 | ||
3c78f78a SW |
40 | #include "trace_hv.h" |
41 | ||
32fad281 PM |
42 | /* Power architecture requires HPT is at least 256kB */ |
43 | #define PPC_MIN_HPT_ORDER 18 | |
44 | ||
7ed661bf PM |
45 | static long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags, |
46 | long pte_index, unsigned long pteh, | |
47 | unsigned long ptel, unsigned long *pte_idx_ret); | |
a64fd707 | 48 | static void kvmppc_rmap_reset(struct kvm *kvm); |
7ed661bf | 49 | |
32fad281 | 50 | long kvmppc_alloc_hpt(struct kvm *kvm, u32 *htab_orderp) |
de56a948 | 51 | { |
792fc497 | 52 | unsigned long hpt = 0; |
8936dda4 | 53 | struct revmap_entry *rev; |
fa61a4e3 AK |
54 | struct page *page = NULL; |
55 | long order = KVM_DEFAULT_HPT_ORDER; | |
de56a948 | 56 | |
32fad281 PM |
57 | if (htab_orderp) { |
58 | order = *htab_orderp; | |
59 | if (order < PPC_MIN_HPT_ORDER) | |
60 | order = PPC_MIN_HPT_ORDER; | |
61 | } | |
62 | ||
fa61a4e3 | 63 | kvm->arch.hpt_cma_alloc = 0; |
02a68d05 | 64 | page = kvm_alloc_hpt(1ul << (order - PAGE_SHIFT)); |
792fc497 AK |
65 | if (page) { |
66 | hpt = (unsigned long)pfn_to_kaddr(page_to_pfn(page)); | |
02a68d05 | 67 | memset((void *)hpt, 0, (1ul << order)); |
792fc497 | 68 | kvm->arch.hpt_cma_alloc = 1; |
de56a948 | 69 | } |
32fad281 PM |
70 | |
71 | /* Lastly try successively smaller sizes from the page allocator */ | |
72 | while (!hpt && order > PPC_MIN_HPT_ORDER) { | |
73 | hpt = __get_free_pages(GFP_KERNEL|__GFP_ZERO|__GFP_REPEAT| | |
74 | __GFP_NOWARN, order - PAGE_SHIFT); | |
75 | if (!hpt) | |
76 | --order; | |
77 | } | |
78 | ||
79 | if (!hpt) | |
80 | return -ENOMEM; | |
81 | ||
de56a948 | 82 | kvm->arch.hpt_virt = hpt; |
32fad281 PM |
83 | kvm->arch.hpt_order = order; |
84 | /* HPTEs are 2**4 bytes long */ | |
85 | kvm->arch.hpt_npte = 1ul << (order - 4); | |
86 | /* 128 (2**7) bytes in each HPTEG */ | |
87 | kvm->arch.hpt_mask = (1ul << (order - 7)) - 1; | |
de56a948 | 88 | |
8936dda4 | 89 | /* Allocate reverse map array */ |
32fad281 | 90 | rev = vmalloc(sizeof(struct revmap_entry) * kvm->arch.hpt_npte); |
8936dda4 PM |
91 | if (!rev) { |
92 | pr_err("kvmppc_alloc_hpt: Couldn't alloc reverse map array\n"); | |
93 | goto out_freehpt; | |
94 | } | |
95 | kvm->arch.revmap = rev; | |
32fad281 | 96 | kvm->arch.sdr1 = __pa(hpt) | (order - 18); |
8936dda4 | 97 | |
32fad281 PM |
98 | pr_info("KVM guest htab at %lx (order %ld), LPID %x\n", |
99 | hpt, order, kvm->arch.lpid); | |
de56a948 | 100 | |
32fad281 PM |
101 | if (htab_orderp) |
102 | *htab_orderp = order; | |
de56a948 | 103 | return 0; |
8936dda4 | 104 | |
8936dda4 | 105 | out_freehpt: |
fa61a4e3 AK |
106 | if (kvm->arch.hpt_cma_alloc) |
107 | kvm_release_hpt(page, 1 << (order - PAGE_SHIFT)); | |
32fad281 PM |
108 | else |
109 | free_pages(hpt, order - PAGE_SHIFT); | |
8936dda4 | 110 | return -ENOMEM; |
de56a948 PM |
111 | } |
112 | ||
32fad281 PM |
113 | long kvmppc_alloc_reset_hpt(struct kvm *kvm, u32 *htab_orderp) |
114 | { | |
115 | long err = -EBUSY; | |
116 | long order; | |
117 | ||
118 | mutex_lock(&kvm->lock); | |
119 | if (kvm->arch.rma_setup_done) { | |
120 | kvm->arch.rma_setup_done = 0; | |
121 | /* order rma_setup_done vs. vcpus_running */ | |
122 | smp_mb(); | |
123 | if (atomic_read(&kvm->arch.vcpus_running)) { | |
124 | kvm->arch.rma_setup_done = 1; | |
125 | goto out; | |
126 | } | |
127 | } | |
128 | if (kvm->arch.hpt_virt) { | |
129 | order = kvm->arch.hpt_order; | |
130 | /* Set the entire HPT to 0, i.e. invalid HPTEs */ | |
131 | memset((void *)kvm->arch.hpt_virt, 0, 1ul << order); | |
a64fd707 PM |
132 | /* |
133 | * Reset all the reverse-mapping chains for all memslots | |
134 | */ | |
135 | kvmppc_rmap_reset(kvm); | |
1b400ba0 PM |
136 | /* Ensure that each vcpu will flush its TLB on next entry. */ |
137 | cpumask_setall(&kvm->arch.need_tlb_flush); | |
32fad281 PM |
138 | *htab_orderp = order; |
139 | err = 0; | |
140 | } else { | |
141 | err = kvmppc_alloc_hpt(kvm, htab_orderp); | |
142 | order = *htab_orderp; | |
143 | } | |
144 | out: | |
145 | mutex_unlock(&kvm->lock); | |
146 | return err; | |
147 | } | |
148 | ||
de56a948 PM |
149 | void kvmppc_free_hpt(struct kvm *kvm) |
150 | { | |
043cc4d7 | 151 | kvmppc_free_lpid(kvm->arch.lpid); |
8936dda4 | 152 | vfree(kvm->arch.revmap); |
fa61a4e3 AK |
153 | if (kvm->arch.hpt_cma_alloc) |
154 | kvm_release_hpt(virt_to_page(kvm->arch.hpt_virt), | |
155 | 1 << (kvm->arch.hpt_order - PAGE_SHIFT)); | |
d2a1b483 | 156 | else |
32fad281 PM |
157 | free_pages(kvm->arch.hpt_virt, |
158 | kvm->arch.hpt_order - PAGE_SHIFT); | |
de56a948 PM |
159 | } |
160 | ||
da9d1d7f PM |
161 | /* Bits in first HPTE dword for pagesize 4k, 64k or 16M */ |
162 | static inline unsigned long hpte0_pgsize_encoding(unsigned long pgsize) | |
163 | { | |
164 | return (pgsize > 0x1000) ? HPTE_V_LARGE : 0; | |
165 | } | |
166 | ||
167 | /* Bits in second HPTE dword for pagesize 4k, 64k or 16M */ | |
168 | static inline unsigned long hpte1_pgsize_encoding(unsigned long pgsize) | |
169 | { | |
170 | return (pgsize == 0x10000) ? 0x1000 : 0; | |
171 | } | |
172 | ||
173 | void kvmppc_map_vrma(struct kvm_vcpu *vcpu, struct kvm_memory_slot *memslot, | |
174 | unsigned long porder) | |
de56a948 PM |
175 | { |
176 | unsigned long i; | |
b2b2f165 | 177 | unsigned long npages; |
c77162de PM |
178 | unsigned long hp_v, hp_r; |
179 | unsigned long addr, hash; | |
da9d1d7f PM |
180 | unsigned long psize; |
181 | unsigned long hp0, hp1; | |
7ed661bf | 182 | unsigned long idx_ret; |
c77162de | 183 | long ret; |
32fad281 | 184 | struct kvm *kvm = vcpu->kvm; |
de56a948 | 185 | |
da9d1d7f PM |
186 | psize = 1ul << porder; |
187 | npages = memslot->npages >> (porder - PAGE_SHIFT); | |
de56a948 PM |
188 | |
189 | /* VRMA can't be > 1TB */ | |
8936dda4 PM |
190 | if (npages > 1ul << (40 - porder)) |
191 | npages = 1ul << (40 - porder); | |
de56a948 | 192 | /* Can't use more than 1 HPTE per HPTEG */ |
32fad281 PM |
193 | if (npages > kvm->arch.hpt_mask + 1) |
194 | npages = kvm->arch.hpt_mask + 1; | |
de56a948 | 195 | |
da9d1d7f PM |
196 | hp0 = HPTE_V_1TB_SEG | (VRMA_VSID << (40 - 16)) | |
197 | HPTE_V_BOLTED | hpte0_pgsize_encoding(psize); | |
198 | hp1 = hpte1_pgsize_encoding(psize) | | |
199 | HPTE_R_R | HPTE_R_C | HPTE_R_M | PP_RWXX; | |
200 | ||
de56a948 | 201 | for (i = 0; i < npages; ++i) { |
c77162de | 202 | addr = i << porder; |
de56a948 | 203 | /* can't use hpt_hash since va > 64 bits */ |
32fad281 | 204 | hash = (i ^ (VRMA_VSID ^ (VRMA_VSID << 25))) & kvm->arch.hpt_mask; |
de56a948 PM |
205 | /* |
206 | * We assume that the hash table is empty and no | |
207 | * vcpus are using it at this stage. Since we create | |
208 | * at most one HPTE per HPTEG, we just assume entry 7 | |
209 | * is available and use it. | |
210 | */ | |
8936dda4 | 211 | hash = (hash << 3) + 7; |
da9d1d7f PM |
212 | hp_v = hp0 | ((addr >> 16) & ~0x7fUL); |
213 | hp_r = hp1 | addr; | |
7ed661bf PM |
214 | ret = kvmppc_virtmode_do_h_enter(kvm, H_EXACT, hash, hp_v, hp_r, |
215 | &idx_ret); | |
c77162de PM |
216 | if (ret != H_SUCCESS) { |
217 | pr_err("KVM: map_vrma at %lx failed, ret=%ld\n", | |
218 | addr, ret); | |
219 | break; | |
220 | } | |
de56a948 PM |
221 | } |
222 | } | |
223 | ||
224 | int kvmppc_mmu_hv_init(void) | |
225 | { | |
9e368f29 PM |
226 | unsigned long host_lpid, rsvd_lpid; |
227 | ||
228 | if (!cpu_has_feature(CPU_FTR_HVMODE)) | |
de56a948 | 229 | return -EINVAL; |
9e368f29 | 230 | |
c17b98cf PM |
231 | /* POWER7 has 10-bit LPIDs (12-bit in POWER8) */ |
232 | host_lpid = mfspr(SPRN_LPID); | |
233 | rsvd_lpid = LPID_RSVD; | |
9e368f29 | 234 | |
043cc4d7 SW |
235 | kvmppc_init_lpid(rsvd_lpid + 1); |
236 | ||
237 | kvmppc_claim_lpid(host_lpid); | |
9e368f29 | 238 | /* rsvd_lpid is reserved for use in partition switching */ |
043cc4d7 | 239 | kvmppc_claim_lpid(rsvd_lpid); |
de56a948 PM |
240 | |
241 | return 0; | |
242 | } | |
243 | ||
de56a948 PM |
244 | static void kvmppc_mmu_book3s_64_hv_reset_msr(struct kvm_vcpu *vcpu) |
245 | { | |
e4e38121 MN |
246 | unsigned long msr = vcpu->arch.intr_msr; |
247 | ||
248 | /* If transactional, change to suspend mode on IRQ delivery */ | |
249 | if (MSR_TM_TRANSACTIONAL(vcpu->arch.shregs.msr)) | |
250 | msr |= MSR_TS_S; | |
251 | else | |
252 | msr |= vcpu->arch.shregs.msr & MSR_TS_MASK; | |
253 | kvmppc_set_msr(vcpu, msr); | |
de56a948 PM |
254 | } |
255 | ||
7ed661bf PM |
256 | long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags, |
257 | long pte_index, unsigned long pteh, | |
258 | unsigned long ptel, unsigned long *pte_idx_ret) | |
c77162de | 259 | { |
c77162de PM |
260 | long ret; |
261 | ||
342d3db7 PM |
262 | /* Protect linux PTE lookup from page table destruction */ |
263 | rcu_read_lock_sched(); /* this disables preemption too */ | |
7ed661bf PM |
264 | ret = kvmppc_do_h_enter(kvm, flags, pte_index, pteh, ptel, |
265 | current->mm->pgd, false, pte_idx_ret); | |
342d3db7 | 266 | rcu_read_unlock_sched(); |
c77162de PM |
267 | if (ret == H_TOO_HARD) { |
268 | /* this can't happen */ | |
269 | pr_err("KVM: Oops, kvmppc_h_enter returned too hard!\n"); | |
270 | ret = H_RESOURCE; /* or something */ | |
271 | } | |
272 | return ret; | |
273 | ||
274 | } | |
275 | ||
697d3899 PM |
276 | static struct kvmppc_slb *kvmppc_mmu_book3s_hv_find_slbe(struct kvm_vcpu *vcpu, |
277 | gva_t eaddr) | |
278 | { | |
279 | u64 mask; | |
280 | int i; | |
281 | ||
282 | for (i = 0; i < vcpu->arch.slb_nr; i++) { | |
283 | if (!(vcpu->arch.slb[i].orige & SLB_ESID_V)) | |
284 | continue; | |
285 | ||
286 | if (vcpu->arch.slb[i].origv & SLB_VSID_B_1T) | |
287 | mask = ESID_MASK_1T; | |
288 | else | |
289 | mask = ESID_MASK; | |
290 | ||
291 | if (((vcpu->arch.slb[i].orige ^ eaddr) & mask) == 0) | |
292 | return &vcpu->arch.slb[i]; | |
293 | } | |
294 | return NULL; | |
295 | } | |
296 | ||
297 | static unsigned long kvmppc_mmu_get_real_addr(unsigned long v, unsigned long r, | |
298 | unsigned long ea) | |
299 | { | |
300 | unsigned long ra_mask; | |
301 | ||
302 | ra_mask = hpte_page_size(v, r) - 1; | |
303 | return (r & HPTE_R_RPN & ~ra_mask) | (ea & ra_mask); | |
304 | } | |
305 | ||
de56a948 | 306 | static int kvmppc_mmu_book3s_64_hv_xlate(struct kvm_vcpu *vcpu, gva_t eaddr, |
93b159b4 | 307 | struct kvmppc_pte *gpte, bool data, bool iswrite) |
de56a948 | 308 | { |
697d3899 PM |
309 | struct kvm *kvm = vcpu->kvm; |
310 | struct kvmppc_slb *slbe; | |
311 | unsigned long slb_v; | |
312 | unsigned long pp, key; | |
313 | unsigned long v, gr; | |
6f22bd32 | 314 | __be64 *hptep; |
697d3899 PM |
315 | int index; |
316 | int virtmode = vcpu->arch.shregs.msr & (data ? MSR_DR : MSR_IR); | |
317 | ||
318 | /* Get SLB entry */ | |
319 | if (virtmode) { | |
320 | slbe = kvmppc_mmu_book3s_hv_find_slbe(vcpu, eaddr); | |
321 | if (!slbe) | |
322 | return -EINVAL; | |
323 | slb_v = slbe->origv; | |
324 | } else { | |
325 | /* real mode access */ | |
326 | slb_v = vcpu->kvm->arch.vrma_slb_v; | |
327 | } | |
328 | ||
91648ec0 | 329 | preempt_disable(); |
697d3899 PM |
330 | /* Find the HPTE in the hash table */ |
331 | index = kvmppc_hv_find_lock_hpte(kvm, eaddr, slb_v, | |
332 | HPTE_V_VALID | HPTE_V_ABSENT); | |
91648ec0 | 333 | if (index < 0) { |
334 | preempt_enable(); | |
697d3899 | 335 | return -ENOENT; |
91648ec0 | 336 | } |
6f22bd32 AG |
337 | hptep = (__be64 *)(kvm->arch.hpt_virt + (index << 4)); |
338 | v = be64_to_cpu(hptep[0]) & ~HPTE_V_HVLOCK; | |
697d3899 PM |
339 | gr = kvm->arch.revmap[index].guest_rpte; |
340 | ||
341 | /* Unlock the HPTE */ | |
342 | asm volatile("lwsync" : : : "memory"); | |
6f22bd32 | 343 | hptep[0] = cpu_to_be64(v); |
91648ec0 | 344 | preempt_enable(); |
697d3899 PM |
345 | |
346 | gpte->eaddr = eaddr; | |
347 | gpte->vpage = ((v & HPTE_V_AVPN) << 4) | ((eaddr >> 12) & 0xfff); | |
348 | ||
349 | /* Get PP bits and key for permission check */ | |
350 | pp = gr & (HPTE_R_PP0 | HPTE_R_PP); | |
351 | key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS; | |
352 | key &= slb_v; | |
353 | ||
354 | /* Calculate permissions */ | |
355 | gpte->may_read = hpte_read_permission(pp, key); | |
356 | gpte->may_write = hpte_write_permission(pp, key); | |
357 | gpte->may_execute = gpte->may_read && !(gr & (HPTE_R_N | HPTE_R_G)); | |
358 | ||
359 | /* Storage key permission check for POWER7 */ | |
c17b98cf | 360 | if (data && virtmode) { |
697d3899 PM |
361 | int amrfield = hpte_get_skey_perm(gr, vcpu->arch.amr); |
362 | if (amrfield & 1) | |
363 | gpte->may_read = 0; | |
364 | if (amrfield & 2) | |
365 | gpte->may_write = 0; | |
366 | } | |
367 | ||
368 | /* Get the guest physical address */ | |
369 | gpte->raddr = kvmppc_mmu_get_real_addr(v, gr, eaddr); | |
370 | return 0; | |
371 | } | |
372 | ||
373 | /* | |
374 | * Quick test for whether an instruction is a load or a store. | |
375 | * If the instruction is a load or a store, then this will indicate | |
376 | * which it is, at least on server processors. (Embedded processors | |
377 | * have some external PID instructions that don't follow the rule | |
378 | * embodied here.) If the instruction isn't a load or store, then | |
379 | * this doesn't return anything useful. | |
380 | */ | |
381 | static int instruction_is_store(unsigned int instr) | |
382 | { | |
383 | unsigned int mask; | |
384 | ||
385 | mask = 0x10000000; | |
386 | if ((instr & 0xfc000000) == 0x7c000000) | |
387 | mask = 0x100; /* major opcode 31 */ | |
388 | return (instr & mask) != 0; | |
389 | } | |
390 | ||
391 | static int kvmppc_hv_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu, | |
6020c0f6 | 392 | unsigned long gpa, gva_t ea, int is_store) |
697d3899 | 393 | { |
697d3899 | 394 | u32 last_inst; |
697d3899 | 395 | |
51f04726 | 396 | /* |
697d3899 PM |
397 | * If we fail, we just return to the guest and try executing it again. |
398 | */ | |
51f04726 MC |
399 | if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != |
400 | EMULATE_DONE) | |
401 | return RESUME_GUEST; | |
697d3899 PM |
402 | |
403 | /* | |
404 | * WARNING: We do not know for sure whether the instruction we just | |
405 | * read from memory is the same that caused the fault in the first | |
406 | * place. If the instruction we read is neither an load or a store, | |
407 | * then it can't access memory, so we don't need to worry about | |
408 | * enforcing access permissions. So, assuming it is a load or | |
409 | * store, we just check that its direction (load or store) is | |
410 | * consistent with the original fault, since that's what we | |
411 | * checked the access permissions against. If there is a mismatch | |
412 | * we just return and retry the instruction. | |
413 | */ | |
414 | ||
51f04726 | 415 | if (instruction_is_store(last_inst) != !!is_store) |
697d3899 PM |
416 | return RESUME_GUEST; |
417 | ||
418 | /* | |
419 | * Emulated accesses are emulated by looking at the hash for | |
420 | * translation once, then performing the access later. The | |
421 | * translation could be invalidated in the meantime in which | |
422 | * point performing the subsequent memory access on the old | |
423 | * physical address could possibly be a security hole for the | |
424 | * guest (but not the host). | |
425 | * | |
426 | * This is less of an issue for MMIO stores since they aren't | |
427 | * globally visible. It could be an issue for MMIO loads to | |
428 | * a certain extent but we'll ignore it for now. | |
429 | */ | |
430 | ||
431 | vcpu->arch.paddr_accessed = gpa; | |
6020c0f6 | 432 | vcpu->arch.vaddr_accessed = ea; |
697d3899 PM |
433 | return kvmppc_emulate_mmio(run, vcpu); |
434 | } | |
435 | ||
436 | int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu, | |
437 | unsigned long ea, unsigned long dsisr) | |
438 | { | |
439 | struct kvm *kvm = vcpu->kvm; | |
6f22bd32 AG |
440 | unsigned long hpte[3], r; |
441 | __be64 *hptep; | |
342d3db7 | 442 | unsigned long mmu_seq, psize, pte_size; |
1066f772 | 443 | unsigned long gpa_base, gfn_base; |
70bddfef | 444 | unsigned long gpa, gfn, hva, pfn; |
697d3899 | 445 | struct kvm_memory_slot *memslot; |
342d3db7 | 446 | unsigned long *rmap; |
697d3899 | 447 | struct revmap_entry *rev; |
342d3db7 PM |
448 | struct page *page, *pages[1]; |
449 | long index, ret, npages; | |
450 | unsigned long is_io; | |
4cf302bc | 451 | unsigned int writing, write_ok; |
342d3db7 | 452 | struct vm_area_struct *vma; |
bad3b507 | 453 | unsigned long rcbits; |
697d3899 PM |
454 | |
455 | /* | |
456 | * Real-mode code has already searched the HPT and found the | |
457 | * entry we're interested in. Lock the entry and check that | |
458 | * it hasn't changed. If it has, just return and re-execute the | |
459 | * instruction. | |
460 | */ | |
461 | if (ea != vcpu->arch.pgfault_addr) | |
462 | return RESUME_GUEST; | |
463 | index = vcpu->arch.pgfault_index; | |
6f22bd32 | 464 | hptep = (__be64 *)(kvm->arch.hpt_virt + (index << 4)); |
697d3899 PM |
465 | rev = &kvm->arch.revmap[index]; |
466 | preempt_disable(); | |
467 | while (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) | |
468 | cpu_relax(); | |
6f22bd32 AG |
469 | hpte[0] = be64_to_cpu(hptep[0]) & ~HPTE_V_HVLOCK; |
470 | hpte[1] = be64_to_cpu(hptep[1]); | |
342d3db7 | 471 | hpte[2] = r = rev->guest_rpte; |
697d3899 | 472 | asm volatile("lwsync" : : : "memory"); |
6f22bd32 | 473 | hptep[0] = cpu_to_be64(hpte[0]); |
697d3899 PM |
474 | preempt_enable(); |
475 | ||
476 | if (hpte[0] != vcpu->arch.pgfault_hpte[0] || | |
477 | hpte[1] != vcpu->arch.pgfault_hpte[1]) | |
478 | return RESUME_GUEST; | |
479 | ||
480 | /* Translate the logical address and get the page */ | |
342d3db7 | 481 | psize = hpte_page_size(hpte[0], r); |
1066f772 PM |
482 | gpa_base = r & HPTE_R_RPN & ~(psize - 1); |
483 | gfn_base = gpa_base >> PAGE_SHIFT; | |
484 | gpa = gpa_base | (ea & (psize - 1)); | |
70bddfef | 485 | gfn = gpa >> PAGE_SHIFT; |
697d3899 PM |
486 | memslot = gfn_to_memslot(kvm, gfn); |
487 | ||
3c78f78a SW |
488 | trace_kvm_page_fault_enter(vcpu, hpte, memslot, ea, dsisr); |
489 | ||
697d3899 | 490 | /* No memslot means it's an emulated MMIO region */ |
70bddfef | 491 | if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) |
6020c0f6 | 492 | return kvmppc_hv_emulate_mmio(run, vcpu, gpa, ea, |
697d3899 | 493 | dsisr & DSISR_ISSTORE); |
697d3899 | 494 | |
1066f772 PM |
495 | /* |
496 | * This should never happen, because of the slot_is_aligned() | |
497 | * check in kvmppc_do_h_enter(). | |
498 | */ | |
499 | if (gfn_base < memslot->base_gfn) | |
500 | return -EFAULT; | |
501 | ||
342d3db7 PM |
502 | /* used to check for invalidations in progress */ |
503 | mmu_seq = kvm->mmu_notifier_seq; | |
504 | smp_rmb(); | |
505 | ||
3c78f78a | 506 | ret = -EFAULT; |
342d3db7 PM |
507 | is_io = 0; |
508 | pfn = 0; | |
509 | page = NULL; | |
510 | pte_size = PAGE_SIZE; | |
4cf302bc PM |
511 | writing = (dsisr & DSISR_ISSTORE) != 0; |
512 | /* If writing != 0, then the HPTE must allow writing, if we get here */ | |
513 | write_ok = writing; | |
342d3db7 | 514 | hva = gfn_to_hva_memslot(memslot, gfn); |
4cf302bc | 515 | npages = get_user_pages_fast(hva, 1, writing, pages); |
342d3db7 PM |
516 | if (npages < 1) { |
517 | /* Check if it's an I/O mapping */ | |
518 | down_read(¤t->mm->mmap_sem); | |
519 | vma = find_vma(current->mm, hva); | |
520 | if (vma && vma->vm_start <= hva && hva + psize <= vma->vm_end && | |
521 | (vma->vm_flags & VM_PFNMAP)) { | |
522 | pfn = vma->vm_pgoff + | |
523 | ((hva - vma->vm_start) >> PAGE_SHIFT); | |
524 | pte_size = psize; | |
525 | is_io = hpte_cache_bits(pgprot_val(vma->vm_page_prot)); | |
4cf302bc | 526 | write_ok = vma->vm_flags & VM_WRITE; |
342d3db7 PM |
527 | } |
528 | up_read(¤t->mm->mmap_sem); | |
529 | if (!pfn) | |
3c78f78a | 530 | goto out_put; |
342d3db7 PM |
531 | } else { |
532 | page = pages[0]; | |
caaa4c80 | 533 | pfn = page_to_pfn(page); |
342d3db7 PM |
534 | if (PageHuge(page)) { |
535 | page = compound_head(page); | |
536 | pte_size <<= compound_order(page); | |
537 | } | |
4cf302bc PM |
538 | /* if the guest wants write access, see if that is OK */ |
539 | if (!writing && hpte_is_writable(r)) { | |
db7cb5b9 | 540 | unsigned int hugepage_shift; |
4cf302bc PM |
541 | pte_t *ptep, pte; |
542 | ||
543 | /* | |
544 | * We need to protect against page table destruction | |
545 | * while looking up and updating the pte. | |
546 | */ | |
547 | rcu_read_lock_sched(); | |
548 | ptep = find_linux_pte_or_hugepte(current->mm->pgd, | |
db7cb5b9 AK |
549 | hva, &hugepage_shift); |
550 | if (ptep) { | |
551 | pte = kvmppc_read_update_linux_pte(ptep, 1, | |
552 | hugepage_shift); | |
4cf302bc PM |
553 | if (pte_write(pte)) |
554 | write_ok = 1; | |
555 | } | |
556 | rcu_read_unlock_sched(); | |
557 | } | |
342d3db7 PM |
558 | } |
559 | ||
342d3db7 PM |
560 | if (psize > pte_size) |
561 | goto out_put; | |
562 | ||
563 | /* Check WIMG vs. the actual page we're accessing */ | |
564 | if (!hpte_cache_flags_ok(r, is_io)) { | |
565 | if (is_io) | |
3c78f78a SW |
566 | goto out_put; |
567 | ||
342d3db7 PM |
568 | /* |
569 | * Allow guest to map emulated device memory as | |
570 | * uncacheable, but actually make it cacheable. | |
571 | */ | |
572 | r = (r & ~(HPTE_R_W|HPTE_R_I|HPTE_R_G)) | HPTE_R_M; | |
573 | } | |
574 | ||
caaa4c80 PM |
575 | /* |
576 | * Set the HPTE to point to pfn. | |
577 | * Since the pfn is at PAGE_SIZE granularity, make sure we | |
578 | * don't mask out lower-order bits if psize < PAGE_SIZE. | |
579 | */ | |
580 | if (psize < PAGE_SIZE) | |
581 | psize = PAGE_SIZE; | |
582 | r = (r & ~(HPTE_R_PP0 - psize)) | ((pfn << PAGE_SHIFT) & ~(psize - 1)); | |
4cf302bc PM |
583 | if (hpte_is_writable(r) && !write_ok) |
584 | r = hpte_make_readonly(r); | |
342d3db7 PM |
585 | ret = RESUME_GUEST; |
586 | preempt_disable(); | |
587 | while (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) | |
588 | cpu_relax(); | |
6f22bd32 AG |
589 | if ((be64_to_cpu(hptep[0]) & ~HPTE_V_HVLOCK) != hpte[0] || |
590 | be64_to_cpu(hptep[1]) != hpte[1] || | |
591 | rev->guest_rpte != hpte[2]) | |
342d3db7 PM |
592 | /* HPTE has been changed under us; let the guest retry */ |
593 | goto out_unlock; | |
594 | hpte[0] = (hpte[0] & ~HPTE_V_ABSENT) | HPTE_V_VALID; | |
595 | ||
1066f772 PM |
596 | /* Always put the HPTE in the rmap chain for the page base address */ |
597 | rmap = &memslot->arch.rmap[gfn_base - memslot->base_gfn]; | |
342d3db7 PM |
598 | lock_rmap(rmap); |
599 | ||
600 | /* Check if we might have been invalidated; let the guest retry if so */ | |
601 | ret = RESUME_GUEST; | |
8ca40a70 | 602 | if (mmu_notifier_retry(vcpu->kvm, mmu_seq)) { |
342d3db7 PM |
603 | unlock_rmap(rmap); |
604 | goto out_unlock; | |
605 | } | |
4cf302bc | 606 | |
bad3b507 PM |
607 | /* Only set R/C in real HPTE if set in both *rmap and guest_rpte */ |
608 | rcbits = *rmap >> KVMPPC_RMAP_RC_SHIFT; | |
609 | r &= rcbits | ~(HPTE_R_R | HPTE_R_C); | |
610 | ||
6f22bd32 | 611 | if (be64_to_cpu(hptep[0]) & HPTE_V_VALID) { |
4cf302bc PM |
612 | /* HPTE was previously valid, so we need to invalidate it */ |
613 | unlock_rmap(rmap); | |
6f22bd32 | 614 | hptep[0] |= cpu_to_be64(HPTE_V_ABSENT); |
4cf302bc | 615 | kvmppc_invalidate_hpte(kvm, hptep, index); |
bad3b507 | 616 | /* don't lose previous R and C bits */ |
6f22bd32 | 617 | r |= be64_to_cpu(hptep[1]) & (HPTE_R_R | HPTE_R_C); |
4cf302bc PM |
618 | } else { |
619 | kvmppc_add_revmap_chain(kvm, rev, rmap, index, 0); | |
620 | } | |
342d3db7 | 621 | |
6f22bd32 | 622 | hptep[1] = cpu_to_be64(r); |
342d3db7 | 623 | eieio(); |
6f22bd32 | 624 | hptep[0] = cpu_to_be64(hpte[0]); |
342d3db7 PM |
625 | asm volatile("ptesync" : : : "memory"); |
626 | preempt_enable(); | |
4cf302bc | 627 | if (page && hpte_is_writable(r)) |
342d3db7 PM |
628 | SetPageDirty(page); |
629 | ||
630 | out_put: | |
3c78f78a SW |
631 | trace_kvm_page_fault_exit(vcpu, hpte, ret); |
632 | ||
de6c0b02 DG |
633 | if (page) { |
634 | /* | |
635 | * We drop pages[0] here, not page because page might | |
636 | * have been set to the head page of a compound, but | |
637 | * we have to drop the reference on the correct tail | |
638 | * page to match the get inside gup() | |
639 | */ | |
640 | put_page(pages[0]); | |
641 | } | |
342d3db7 PM |
642 | return ret; |
643 | ||
644 | out_unlock: | |
6f22bd32 | 645 | hptep[0] &= ~cpu_to_be64(HPTE_V_HVLOCK); |
342d3db7 PM |
646 | preempt_enable(); |
647 | goto out_put; | |
648 | } | |
649 | ||
a64fd707 PM |
650 | static void kvmppc_rmap_reset(struct kvm *kvm) |
651 | { | |
652 | struct kvm_memslots *slots; | |
653 | struct kvm_memory_slot *memslot; | |
654 | int srcu_idx; | |
655 | ||
656 | srcu_idx = srcu_read_lock(&kvm->srcu); | |
657 | slots = kvm->memslots; | |
658 | kvm_for_each_memslot(memslot, slots) { | |
659 | /* | |
660 | * This assumes it is acceptable to lose reference and | |
661 | * change bits across a reset. | |
662 | */ | |
663 | memset(memslot->arch.rmap, 0, | |
664 | memslot->npages * sizeof(*memslot->arch.rmap)); | |
665 | } | |
666 | srcu_read_unlock(&kvm->srcu, srcu_idx); | |
667 | } | |
668 | ||
84504ef3 TY |
669 | static int kvm_handle_hva_range(struct kvm *kvm, |
670 | unsigned long start, | |
671 | unsigned long end, | |
672 | int (*handler)(struct kvm *kvm, | |
673 | unsigned long *rmapp, | |
674 | unsigned long gfn)) | |
342d3db7 PM |
675 | { |
676 | int ret; | |
677 | int retval = 0; | |
678 | struct kvm_memslots *slots; | |
679 | struct kvm_memory_slot *memslot; | |
680 | ||
681 | slots = kvm_memslots(kvm); | |
682 | kvm_for_each_memslot(memslot, slots) { | |
84504ef3 TY |
683 | unsigned long hva_start, hva_end; |
684 | gfn_t gfn, gfn_end; | |
685 | ||
686 | hva_start = max(start, memslot->userspace_addr); | |
687 | hva_end = min(end, memslot->userspace_addr + | |
688 | (memslot->npages << PAGE_SHIFT)); | |
689 | if (hva_start >= hva_end) | |
690 | continue; | |
691 | /* | |
692 | * {gfn(page) | page intersects with [hva_start, hva_end)} = | |
693 | * {gfn, gfn+1, ..., gfn_end-1}. | |
694 | */ | |
695 | gfn = hva_to_gfn_memslot(hva_start, memslot); | |
696 | gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot); | |
342d3db7 | 697 | |
84504ef3 | 698 | for (; gfn < gfn_end; ++gfn) { |
d19a748b | 699 | gfn_t gfn_offset = gfn - memslot->base_gfn; |
342d3db7 | 700 | |
d89cc617 | 701 | ret = handler(kvm, &memslot->arch.rmap[gfn_offset], gfn); |
342d3db7 PM |
702 | retval |= ret; |
703 | } | |
704 | } | |
705 | ||
706 | return retval; | |
707 | } | |
708 | ||
84504ef3 TY |
709 | static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, |
710 | int (*handler)(struct kvm *kvm, unsigned long *rmapp, | |
711 | unsigned long gfn)) | |
712 | { | |
713 | return kvm_handle_hva_range(kvm, hva, hva + 1, handler); | |
714 | } | |
715 | ||
342d3db7 PM |
716 | static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp, |
717 | unsigned long gfn) | |
718 | { | |
719 | struct revmap_entry *rev = kvm->arch.revmap; | |
720 | unsigned long h, i, j; | |
6f22bd32 | 721 | __be64 *hptep; |
bad3b507 | 722 | unsigned long ptel, psize, rcbits; |
342d3db7 PM |
723 | |
724 | for (;;) { | |
bad3b507 | 725 | lock_rmap(rmapp); |
342d3db7 | 726 | if (!(*rmapp & KVMPPC_RMAP_PRESENT)) { |
bad3b507 | 727 | unlock_rmap(rmapp); |
342d3db7 PM |
728 | break; |
729 | } | |
730 | ||
731 | /* | |
732 | * To avoid an ABBA deadlock with the HPTE lock bit, | |
bad3b507 PM |
733 | * we can't spin on the HPTE lock while holding the |
734 | * rmap chain lock. | |
342d3db7 PM |
735 | */ |
736 | i = *rmapp & KVMPPC_RMAP_INDEX; | |
6f22bd32 | 737 | hptep = (__be64 *) (kvm->arch.hpt_virt + (i << 4)); |
bad3b507 PM |
738 | if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) { |
739 | /* unlock rmap before spinning on the HPTE lock */ | |
740 | unlock_rmap(rmapp); | |
6f22bd32 | 741 | while (be64_to_cpu(hptep[0]) & HPTE_V_HVLOCK) |
bad3b507 PM |
742 | cpu_relax(); |
743 | continue; | |
744 | } | |
342d3db7 PM |
745 | j = rev[i].forw; |
746 | if (j == i) { | |
747 | /* chain is now empty */ | |
bad3b507 | 748 | *rmapp &= ~(KVMPPC_RMAP_PRESENT | KVMPPC_RMAP_INDEX); |
342d3db7 PM |
749 | } else { |
750 | /* remove i from chain */ | |
751 | h = rev[i].back; | |
752 | rev[h].forw = j; | |
753 | rev[j].back = h; | |
754 | rev[i].forw = rev[i].back = i; | |
bad3b507 | 755 | *rmapp = (*rmapp & ~KVMPPC_RMAP_INDEX) | j; |
342d3db7 | 756 | } |
342d3db7 | 757 | |
bad3b507 | 758 | /* Now check and modify the HPTE */ |
342d3db7 | 759 | ptel = rev[i].guest_rpte; |
6f22bd32 AG |
760 | psize = hpte_page_size(be64_to_cpu(hptep[0]), ptel); |
761 | if ((be64_to_cpu(hptep[0]) & HPTE_V_VALID) && | |
342d3db7 | 762 | hpte_rpn(ptel, psize) == gfn) { |
c17b98cf | 763 | hptep[0] |= cpu_to_be64(HPTE_V_ABSENT); |
bad3b507 PM |
764 | kvmppc_invalidate_hpte(kvm, hptep, i); |
765 | /* Harvest R and C */ | |
6f22bd32 | 766 | rcbits = be64_to_cpu(hptep[1]) & (HPTE_R_R | HPTE_R_C); |
bad3b507 | 767 | *rmapp |= rcbits << KVMPPC_RMAP_RC_SHIFT; |
a1b4a0f6 PM |
768 | if (rcbits & ~rev[i].guest_rpte) { |
769 | rev[i].guest_rpte = ptel | rcbits; | |
770 | note_hpte_modification(kvm, &rev[i]); | |
771 | } | |
342d3db7 | 772 | } |
bad3b507 | 773 | unlock_rmap(rmapp); |
6f22bd32 | 774 | hptep[0] &= ~cpu_to_be64(HPTE_V_HVLOCK); |
342d3db7 PM |
775 | } |
776 | return 0; | |
777 | } | |
778 | ||
3a167bea | 779 | int kvm_unmap_hva_hv(struct kvm *kvm, unsigned long hva) |
342d3db7 | 780 | { |
c17b98cf | 781 | kvm_handle_hva(kvm, hva, kvm_unmap_rmapp); |
342d3db7 PM |
782 | return 0; |
783 | } | |
784 | ||
3a167bea | 785 | int kvm_unmap_hva_range_hv(struct kvm *kvm, unsigned long start, unsigned long end) |
b3ae2096 | 786 | { |
c17b98cf | 787 | kvm_handle_hva_range(kvm, start, end, kvm_unmap_rmapp); |
b3ae2096 TY |
788 | return 0; |
789 | } | |
790 | ||
3a167bea AK |
791 | void kvmppc_core_flush_memslot_hv(struct kvm *kvm, |
792 | struct kvm_memory_slot *memslot) | |
dfe49dbd PM |
793 | { |
794 | unsigned long *rmapp; | |
795 | unsigned long gfn; | |
796 | unsigned long n; | |
797 | ||
798 | rmapp = memslot->arch.rmap; | |
799 | gfn = memslot->base_gfn; | |
800 | for (n = memslot->npages; n; --n) { | |
801 | /* | |
802 | * Testing the present bit without locking is OK because | |
803 | * the memslot has been marked invalid already, and hence | |
804 | * no new HPTEs referencing this page can be created, | |
805 | * thus the present bit can't go from 0 to 1. | |
806 | */ | |
807 | if (*rmapp & KVMPPC_RMAP_PRESENT) | |
808 | kvm_unmap_rmapp(kvm, rmapp, gfn); | |
809 | ++rmapp; | |
810 | ++gfn; | |
811 | } | |
812 | } | |
813 | ||
342d3db7 PM |
814 | static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp, |
815 | unsigned long gfn) | |
816 | { | |
55514893 PM |
817 | struct revmap_entry *rev = kvm->arch.revmap; |
818 | unsigned long head, i, j; | |
6f22bd32 | 819 | __be64 *hptep; |
55514893 PM |
820 | int ret = 0; |
821 | ||
822 | retry: | |
823 | lock_rmap(rmapp); | |
824 | if (*rmapp & KVMPPC_RMAP_REFERENCED) { | |
825 | *rmapp &= ~KVMPPC_RMAP_REFERENCED; | |
826 | ret = 1; | |
827 | } | |
828 | if (!(*rmapp & KVMPPC_RMAP_PRESENT)) { | |
829 | unlock_rmap(rmapp); | |
830 | return ret; | |
831 | } | |
832 | ||
833 | i = head = *rmapp & KVMPPC_RMAP_INDEX; | |
834 | do { | |
6f22bd32 | 835 | hptep = (__be64 *) (kvm->arch.hpt_virt + (i << 4)); |
55514893 PM |
836 | j = rev[i].forw; |
837 | ||
838 | /* If this HPTE isn't referenced, ignore it */ | |
6f22bd32 | 839 | if (!(be64_to_cpu(hptep[1]) & HPTE_R_R)) |
55514893 PM |
840 | continue; |
841 | ||
842 | if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) { | |
843 | /* unlock rmap before spinning on the HPTE lock */ | |
844 | unlock_rmap(rmapp); | |
6f22bd32 | 845 | while (be64_to_cpu(hptep[0]) & HPTE_V_HVLOCK) |
55514893 PM |
846 | cpu_relax(); |
847 | goto retry; | |
848 | } | |
849 | ||
850 | /* Now check and modify the HPTE */ | |
6f22bd32 AG |
851 | if ((be64_to_cpu(hptep[0]) & HPTE_V_VALID) && |
852 | (be64_to_cpu(hptep[1]) & HPTE_R_R)) { | |
55514893 | 853 | kvmppc_clear_ref_hpte(kvm, hptep, i); |
a1b4a0f6 PM |
854 | if (!(rev[i].guest_rpte & HPTE_R_R)) { |
855 | rev[i].guest_rpte |= HPTE_R_R; | |
856 | note_hpte_modification(kvm, &rev[i]); | |
857 | } | |
55514893 PM |
858 | ret = 1; |
859 | } | |
6f22bd32 | 860 | hptep[0] &= ~cpu_to_be64(HPTE_V_HVLOCK); |
55514893 PM |
861 | } while ((i = j) != head); |
862 | ||
863 | unlock_rmap(rmapp); | |
864 | return ret; | |
342d3db7 PM |
865 | } |
866 | ||
57128468 | 867 | int kvm_age_hva_hv(struct kvm *kvm, unsigned long start, unsigned long end) |
342d3db7 | 868 | { |
57128468 | 869 | return kvm_handle_hva_range(kvm, start, end, kvm_age_rmapp); |
342d3db7 PM |
870 | } |
871 | ||
872 | static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp, | |
873 | unsigned long gfn) | |
874 | { | |
55514893 PM |
875 | struct revmap_entry *rev = kvm->arch.revmap; |
876 | unsigned long head, i, j; | |
877 | unsigned long *hp; | |
878 | int ret = 1; | |
879 | ||
880 | if (*rmapp & KVMPPC_RMAP_REFERENCED) | |
881 | return 1; | |
882 | ||
883 | lock_rmap(rmapp); | |
884 | if (*rmapp & KVMPPC_RMAP_REFERENCED) | |
885 | goto out; | |
886 | ||
887 | if (*rmapp & KVMPPC_RMAP_PRESENT) { | |
888 | i = head = *rmapp & KVMPPC_RMAP_INDEX; | |
889 | do { | |
890 | hp = (unsigned long *)(kvm->arch.hpt_virt + (i << 4)); | |
891 | j = rev[i].forw; | |
6f22bd32 | 892 | if (be64_to_cpu(hp[1]) & HPTE_R_R) |
55514893 PM |
893 | goto out; |
894 | } while ((i = j) != head); | |
895 | } | |
896 | ret = 0; | |
897 | ||
898 | out: | |
899 | unlock_rmap(rmapp); | |
900 | return ret; | |
342d3db7 PM |
901 | } |
902 | ||
3a167bea | 903 | int kvm_test_age_hva_hv(struct kvm *kvm, unsigned long hva) |
342d3db7 | 904 | { |
342d3db7 PM |
905 | return kvm_handle_hva(kvm, hva, kvm_test_age_rmapp); |
906 | } | |
907 | ||
3a167bea | 908 | void kvm_set_spte_hva_hv(struct kvm *kvm, unsigned long hva, pte_t pte) |
342d3db7 | 909 | { |
342d3db7 | 910 | kvm_handle_hva(kvm, hva, kvm_unmap_rmapp); |
de56a948 PM |
911 | } |
912 | ||
6c576e74 PM |
913 | static int vcpus_running(struct kvm *kvm) |
914 | { | |
915 | return atomic_read(&kvm->arch.vcpus_running) != 0; | |
916 | } | |
917 | ||
687414be AK |
918 | /* |
919 | * Returns the number of system pages that are dirty. | |
920 | * This can be more than 1 if we find a huge-page HPTE. | |
921 | */ | |
922 | static int kvm_test_clear_dirty_npages(struct kvm *kvm, unsigned long *rmapp) | |
82ed3616 PM |
923 | { |
924 | struct revmap_entry *rev = kvm->arch.revmap; | |
925 | unsigned long head, i, j; | |
687414be | 926 | unsigned long n; |
6c576e74 | 927 | unsigned long v, r; |
6f22bd32 | 928 | __be64 *hptep; |
687414be | 929 | int npages_dirty = 0; |
82ed3616 PM |
930 | |
931 | retry: | |
932 | lock_rmap(rmapp); | |
933 | if (*rmapp & KVMPPC_RMAP_CHANGED) { | |
934 | *rmapp &= ~KVMPPC_RMAP_CHANGED; | |
687414be | 935 | npages_dirty = 1; |
82ed3616 PM |
936 | } |
937 | if (!(*rmapp & KVMPPC_RMAP_PRESENT)) { | |
938 | unlock_rmap(rmapp); | |
687414be | 939 | return npages_dirty; |
82ed3616 PM |
940 | } |
941 | ||
942 | i = head = *rmapp & KVMPPC_RMAP_INDEX; | |
943 | do { | |
6f22bd32 AG |
944 | unsigned long hptep1; |
945 | hptep = (__be64 *) (kvm->arch.hpt_virt + (i << 4)); | |
82ed3616 PM |
946 | j = rev[i].forw; |
947 | ||
6c576e74 PM |
948 | /* |
949 | * Checking the C (changed) bit here is racy since there | |
950 | * is no guarantee about when the hardware writes it back. | |
951 | * If the HPTE is not writable then it is stable since the | |
952 | * page can't be written to, and we would have done a tlbie | |
953 | * (which forces the hardware to complete any writeback) | |
954 | * when making the HPTE read-only. | |
955 | * If vcpus are running then this call is racy anyway | |
956 | * since the page could get dirtied subsequently, so we | |
957 | * expect there to be a further call which would pick up | |
958 | * any delayed C bit writeback. | |
959 | * Otherwise we need to do the tlbie even if C==0 in | |
960 | * order to pick up any delayed writeback of C. | |
961 | */ | |
6f22bd32 AG |
962 | hptep1 = be64_to_cpu(hptep[1]); |
963 | if (!(hptep1 & HPTE_R_C) && | |
964 | (!hpte_is_writable(hptep1) || vcpus_running(kvm))) | |
82ed3616 PM |
965 | continue; |
966 | ||
967 | if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) { | |
968 | /* unlock rmap before spinning on the HPTE lock */ | |
969 | unlock_rmap(rmapp); | |
6f22bd32 | 970 | while (hptep[0] & cpu_to_be64(HPTE_V_HVLOCK)) |
82ed3616 PM |
971 | cpu_relax(); |
972 | goto retry; | |
973 | } | |
974 | ||
975 | /* Now check and modify the HPTE */ | |
f6fb9e84 AK |
976 | if (!(hptep[0] & cpu_to_be64(HPTE_V_VALID))) { |
977 | /* unlock and continue */ | |
978 | hptep[0] &= ~cpu_to_be64(HPTE_V_HVLOCK); | |
6c576e74 | 979 | continue; |
f6fb9e84 | 980 | } |
6c576e74 PM |
981 | |
982 | /* need to make it temporarily absent so C is stable */ | |
6f22bd32 | 983 | hptep[0] |= cpu_to_be64(HPTE_V_ABSENT); |
6c576e74 | 984 | kvmppc_invalidate_hpte(kvm, hptep, i); |
6f22bd32 AG |
985 | v = be64_to_cpu(hptep[0]); |
986 | r = be64_to_cpu(hptep[1]); | |
6c576e74 | 987 | if (r & HPTE_R_C) { |
6f22bd32 | 988 | hptep[1] = cpu_to_be64(r & ~HPTE_R_C); |
a1b4a0f6 PM |
989 | if (!(rev[i].guest_rpte & HPTE_R_C)) { |
990 | rev[i].guest_rpte |= HPTE_R_C; | |
991 | note_hpte_modification(kvm, &rev[i]); | |
992 | } | |
6c576e74 | 993 | n = hpte_page_size(v, r); |
687414be AK |
994 | n = (n + PAGE_SIZE - 1) >> PAGE_SHIFT; |
995 | if (n > npages_dirty) | |
996 | npages_dirty = n; | |
6c576e74 | 997 | eieio(); |
82ed3616 | 998 | } |
6c576e74 PM |
999 | v &= ~(HPTE_V_ABSENT | HPTE_V_HVLOCK); |
1000 | v |= HPTE_V_VALID; | |
6f22bd32 | 1001 | hptep[0] = cpu_to_be64(v); |
82ed3616 PM |
1002 | } while ((i = j) != head); |
1003 | ||
1004 | unlock_rmap(rmapp); | |
687414be | 1005 | return npages_dirty; |
82ed3616 PM |
1006 | } |
1007 | ||
c35635ef PM |
1008 | static void harvest_vpa_dirty(struct kvmppc_vpa *vpa, |
1009 | struct kvm_memory_slot *memslot, | |
1010 | unsigned long *map) | |
1011 | { | |
1012 | unsigned long gfn; | |
1013 | ||
1014 | if (!vpa->dirty || !vpa->pinned_addr) | |
1015 | return; | |
1016 | gfn = vpa->gpa >> PAGE_SHIFT; | |
1017 | if (gfn < memslot->base_gfn || | |
1018 | gfn >= memslot->base_gfn + memslot->npages) | |
1019 | return; | |
1020 | ||
1021 | vpa->dirty = false; | |
1022 | if (map) | |
1023 | __set_bit_le(gfn - memslot->base_gfn, map); | |
1024 | } | |
1025 | ||
dfe49dbd PM |
1026 | long kvmppc_hv_get_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot, |
1027 | unsigned long *map) | |
82ed3616 | 1028 | { |
687414be | 1029 | unsigned long i, j; |
dfe49dbd | 1030 | unsigned long *rmapp; |
c35635ef | 1031 | struct kvm_vcpu *vcpu; |
82ed3616 PM |
1032 | |
1033 | preempt_disable(); | |
d89cc617 | 1034 | rmapp = memslot->arch.rmap; |
82ed3616 | 1035 | for (i = 0; i < memslot->npages; ++i) { |
687414be AK |
1036 | int npages = kvm_test_clear_dirty_npages(kvm, rmapp); |
1037 | /* | |
1038 | * Note that if npages > 0 then i must be a multiple of npages, | |
1039 | * since we always put huge-page HPTEs in the rmap chain | |
1040 | * corresponding to their page base address. | |
1041 | */ | |
1042 | if (npages && map) | |
1043 | for (j = i; npages; ++j, --npages) | |
1044 | __set_bit_le(j, map); | |
82ed3616 PM |
1045 | ++rmapp; |
1046 | } | |
c35635ef PM |
1047 | |
1048 | /* Harvest dirty bits from VPA and DTL updates */ | |
1049 | /* Note: we never modify the SLB shadow buffer areas */ | |
1050 | kvm_for_each_vcpu(i, vcpu, kvm) { | |
1051 | spin_lock(&vcpu->arch.vpa_update_lock); | |
1052 | harvest_vpa_dirty(&vcpu->arch.vpa, memslot, map); | |
1053 | harvest_vpa_dirty(&vcpu->arch.dtl, memslot, map); | |
1054 | spin_unlock(&vcpu->arch.vpa_update_lock); | |
1055 | } | |
82ed3616 PM |
1056 | preempt_enable(); |
1057 | return 0; | |
1058 | } | |
1059 | ||
93e60249 PM |
1060 | void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa, |
1061 | unsigned long *nb_ret) | |
1062 | { | |
1063 | struct kvm_memory_slot *memslot; | |
1064 | unsigned long gfn = gpa >> PAGE_SHIFT; | |
342d3db7 PM |
1065 | struct page *page, *pages[1]; |
1066 | int npages; | |
c35635ef | 1067 | unsigned long hva, offset; |
2c9097e4 | 1068 | int srcu_idx; |
93e60249 | 1069 | |
2c9097e4 | 1070 | srcu_idx = srcu_read_lock(&kvm->srcu); |
93e60249 PM |
1071 | memslot = gfn_to_memslot(kvm, gfn); |
1072 | if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) | |
2c9097e4 | 1073 | goto err; |
c17b98cf PM |
1074 | hva = gfn_to_hva_memslot(memslot, gfn); |
1075 | npages = get_user_pages_fast(hva, 1, 1, pages); | |
1076 | if (npages < 1) | |
1077 | goto err; | |
1078 | page = pages[0]; | |
2c9097e4 PM |
1079 | srcu_read_unlock(&kvm->srcu, srcu_idx); |
1080 | ||
c35635ef | 1081 | offset = gpa & (PAGE_SIZE - 1); |
93e60249 | 1082 | if (nb_ret) |
c35635ef | 1083 | *nb_ret = PAGE_SIZE - offset; |
93e60249 | 1084 | return page_address(page) + offset; |
2c9097e4 PM |
1085 | |
1086 | err: | |
1087 | srcu_read_unlock(&kvm->srcu, srcu_idx); | |
1088 | return NULL; | |
93e60249 PM |
1089 | } |
1090 | ||
c35635ef PM |
1091 | void kvmppc_unpin_guest_page(struct kvm *kvm, void *va, unsigned long gpa, |
1092 | bool dirty) | |
93e60249 PM |
1093 | { |
1094 | struct page *page = virt_to_page(va); | |
c35635ef PM |
1095 | struct kvm_memory_slot *memslot; |
1096 | unsigned long gfn; | |
1097 | unsigned long *rmap; | |
1098 | int srcu_idx; | |
93e60249 | 1099 | |
93e60249 | 1100 | put_page(page); |
c35635ef | 1101 | |
c17b98cf | 1102 | if (!dirty) |
c35635ef PM |
1103 | return; |
1104 | ||
1105 | /* We need to mark this page dirty in the rmap chain */ | |
1106 | gfn = gpa >> PAGE_SHIFT; | |
1107 | srcu_idx = srcu_read_lock(&kvm->srcu); | |
1108 | memslot = gfn_to_memslot(kvm, gfn); | |
1109 | if (memslot) { | |
1110 | rmap = &memslot->arch.rmap[gfn - memslot->base_gfn]; | |
1111 | lock_rmap(rmap); | |
1112 | *rmap |= KVMPPC_RMAP_CHANGED; | |
1113 | unlock_rmap(rmap); | |
1114 | } | |
1115 | srcu_read_unlock(&kvm->srcu, srcu_idx); | |
93e60249 PM |
1116 | } |
1117 | ||
a2932923 PM |
1118 | /* |
1119 | * Functions for reading and writing the hash table via reads and | |
1120 | * writes on a file descriptor. | |
1121 | * | |
1122 | * Reads return the guest view of the hash table, which has to be | |
1123 | * pieced together from the real hash table and the guest_rpte | |
1124 | * values in the revmap array. | |
1125 | * | |
1126 | * On writes, each HPTE written is considered in turn, and if it | |
1127 | * is valid, it is written to the HPT as if an H_ENTER with the | |
1128 | * exact flag set was done. When the invalid count is non-zero | |
1129 | * in the header written to the stream, the kernel will make | |
1130 | * sure that that many HPTEs are invalid, and invalidate them | |
1131 | * if not. | |
1132 | */ | |
1133 | ||
1134 | struct kvm_htab_ctx { | |
1135 | unsigned long index; | |
1136 | unsigned long flags; | |
1137 | struct kvm *kvm; | |
1138 | int first_pass; | |
1139 | }; | |
1140 | ||
1141 | #define HPTE_SIZE (2 * sizeof(unsigned long)) | |
1142 | ||
a1b4a0f6 PM |
1143 | /* |
1144 | * Returns 1 if this HPT entry has been modified or has pending | |
1145 | * R/C bit changes. | |
1146 | */ | |
6f22bd32 | 1147 | static int hpte_dirty(struct revmap_entry *revp, __be64 *hptp) |
a1b4a0f6 PM |
1148 | { |
1149 | unsigned long rcbits_unset; | |
1150 | ||
1151 | if (revp->guest_rpte & HPTE_GR_MODIFIED) | |
1152 | return 1; | |
1153 | ||
1154 | /* Also need to consider changes in reference and changed bits */ | |
1155 | rcbits_unset = ~revp->guest_rpte & (HPTE_R_R | HPTE_R_C); | |
6f22bd32 AG |
1156 | if ((be64_to_cpu(hptp[0]) & HPTE_V_VALID) && |
1157 | (be64_to_cpu(hptp[1]) & rcbits_unset)) | |
a1b4a0f6 PM |
1158 | return 1; |
1159 | ||
1160 | return 0; | |
1161 | } | |
1162 | ||
6f22bd32 | 1163 | static long record_hpte(unsigned long flags, __be64 *hptp, |
a2932923 PM |
1164 | unsigned long *hpte, struct revmap_entry *revp, |
1165 | int want_valid, int first_pass) | |
1166 | { | |
1167 | unsigned long v, r; | |
a1b4a0f6 | 1168 | unsigned long rcbits_unset; |
a2932923 PM |
1169 | int ok = 1; |
1170 | int valid, dirty; | |
1171 | ||
1172 | /* Unmodified entries are uninteresting except on the first pass */ | |
a1b4a0f6 | 1173 | dirty = hpte_dirty(revp, hptp); |
a2932923 PM |
1174 | if (!first_pass && !dirty) |
1175 | return 0; | |
1176 | ||
1177 | valid = 0; | |
6f22bd32 | 1178 | if (be64_to_cpu(hptp[0]) & (HPTE_V_VALID | HPTE_V_ABSENT)) { |
a2932923 PM |
1179 | valid = 1; |
1180 | if ((flags & KVM_GET_HTAB_BOLTED_ONLY) && | |
6f22bd32 | 1181 | !(be64_to_cpu(hptp[0]) & HPTE_V_BOLTED)) |
a2932923 PM |
1182 | valid = 0; |
1183 | } | |
1184 | if (valid != want_valid) | |
1185 | return 0; | |
1186 | ||
1187 | v = r = 0; | |
1188 | if (valid || dirty) { | |
1189 | /* lock the HPTE so it's stable and read it */ | |
1190 | preempt_disable(); | |
1191 | while (!try_lock_hpte(hptp, HPTE_V_HVLOCK)) | |
1192 | cpu_relax(); | |
6f22bd32 | 1193 | v = be64_to_cpu(hptp[0]); |
a1b4a0f6 PM |
1194 | |
1195 | /* re-evaluate valid and dirty from synchronized HPTE value */ | |
1196 | valid = !!(v & HPTE_V_VALID); | |
1197 | dirty = !!(revp->guest_rpte & HPTE_GR_MODIFIED); | |
1198 | ||
1199 | /* Harvest R and C into guest view if necessary */ | |
1200 | rcbits_unset = ~revp->guest_rpte & (HPTE_R_R | HPTE_R_C); | |
6f22bd32 AG |
1201 | if (valid && (rcbits_unset & be64_to_cpu(hptp[1]))) { |
1202 | revp->guest_rpte |= (be64_to_cpu(hptp[1]) & | |
1203 | (HPTE_R_R | HPTE_R_C)) | HPTE_GR_MODIFIED; | |
a1b4a0f6 PM |
1204 | dirty = 1; |
1205 | } | |
1206 | ||
a2932923 PM |
1207 | if (v & HPTE_V_ABSENT) { |
1208 | v &= ~HPTE_V_ABSENT; | |
1209 | v |= HPTE_V_VALID; | |
a1b4a0f6 | 1210 | valid = 1; |
a2932923 | 1211 | } |
a2932923 PM |
1212 | if ((flags & KVM_GET_HTAB_BOLTED_ONLY) && !(v & HPTE_V_BOLTED)) |
1213 | valid = 0; | |
a1b4a0f6 PM |
1214 | |
1215 | r = revp->guest_rpte; | |
a2932923 PM |
1216 | /* only clear modified if this is the right sort of entry */ |
1217 | if (valid == want_valid && dirty) { | |
1218 | r &= ~HPTE_GR_MODIFIED; | |
1219 | revp->guest_rpte = r; | |
1220 | } | |
1221 | asm volatile(PPC_RELEASE_BARRIER "" : : : "memory"); | |
6f22bd32 | 1222 | hptp[0] &= ~cpu_to_be64(HPTE_V_HVLOCK); |
a2932923 PM |
1223 | preempt_enable(); |
1224 | if (!(valid == want_valid && (first_pass || dirty))) | |
1225 | ok = 0; | |
1226 | } | |
6f22bd32 AG |
1227 | hpte[0] = cpu_to_be64(v); |
1228 | hpte[1] = cpu_to_be64(r); | |
a2932923 PM |
1229 | return ok; |
1230 | } | |
1231 | ||
1232 | static ssize_t kvm_htab_read(struct file *file, char __user *buf, | |
1233 | size_t count, loff_t *ppos) | |
1234 | { | |
1235 | struct kvm_htab_ctx *ctx = file->private_data; | |
1236 | struct kvm *kvm = ctx->kvm; | |
1237 | struct kvm_get_htab_header hdr; | |
6f22bd32 | 1238 | __be64 *hptp; |
a2932923 PM |
1239 | struct revmap_entry *revp; |
1240 | unsigned long i, nb, nw; | |
1241 | unsigned long __user *lbuf; | |
1242 | struct kvm_get_htab_header __user *hptr; | |
1243 | unsigned long flags; | |
1244 | int first_pass; | |
1245 | unsigned long hpte[2]; | |
1246 | ||
1247 | if (!access_ok(VERIFY_WRITE, buf, count)) | |
1248 | return -EFAULT; | |
1249 | ||
1250 | first_pass = ctx->first_pass; | |
1251 | flags = ctx->flags; | |
1252 | ||
1253 | i = ctx->index; | |
6f22bd32 | 1254 | hptp = (__be64 *)(kvm->arch.hpt_virt + (i * HPTE_SIZE)); |
a2932923 PM |
1255 | revp = kvm->arch.revmap + i; |
1256 | lbuf = (unsigned long __user *)buf; | |
1257 | ||
1258 | nb = 0; | |
1259 | while (nb + sizeof(hdr) + HPTE_SIZE < count) { | |
1260 | /* Initialize header */ | |
1261 | hptr = (struct kvm_get_htab_header __user *)buf; | |
a2932923 PM |
1262 | hdr.n_valid = 0; |
1263 | hdr.n_invalid = 0; | |
1264 | nw = nb; | |
1265 | nb += sizeof(hdr); | |
1266 | lbuf = (unsigned long __user *)(buf + sizeof(hdr)); | |
1267 | ||
1268 | /* Skip uninteresting entries, i.e. clean on not-first pass */ | |
1269 | if (!first_pass) { | |
1270 | while (i < kvm->arch.hpt_npte && | |
a1b4a0f6 | 1271 | !hpte_dirty(revp, hptp)) { |
a2932923 PM |
1272 | ++i; |
1273 | hptp += 2; | |
1274 | ++revp; | |
1275 | } | |
1276 | } | |
05dd85f7 | 1277 | hdr.index = i; |
a2932923 PM |
1278 | |
1279 | /* Grab a series of valid entries */ | |
1280 | while (i < kvm->arch.hpt_npte && | |
1281 | hdr.n_valid < 0xffff && | |
1282 | nb + HPTE_SIZE < count && | |
1283 | record_hpte(flags, hptp, hpte, revp, 1, first_pass)) { | |
1284 | /* valid entry, write it out */ | |
1285 | ++hdr.n_valid; | |
1286 | if (__put_user(hpte[0], lbuf) || | |
1287 | __put_user(hpte[1], lbuf + 1)) | |
1288 | return -EFAULT; | |
1289 | nb += HPTE_SIZE; | |
1290 | lbuf += 2; | |
1291 | ++i; | |
1292 | hptp += 2; | |
1293 | ++revp; | |
1294 | } | |
1295 | /* Now skip invalid entries while we can */ | |
1296 | while (i < kvm->arch.hpt_npte && | |
1297 | hdr.n_invalid < 0xffff && | |
1298 | record_hpte(flags, hptp, hpte, revp, 0, first_pass)) { | |
1299 | /* found an invalid entry */ | |
1300 | ++hdr.n_invalid; | |
1301 | ++i; | |
1302 | hptp += 2; | |
1303 | ++revp; | |
1304 | } | |
1305 | ||
1306 | if (hdr.n_valid || hdr.n_invalid) { | |
1307 | /* write back the header */ | |
1308 | if (__copy_to_user(hptr, &hdr, sizeof(hdr))) | |
1309 | return -EFAULT; | |
1310 | nw = nb; | |
1311 | buf = (char __user *)lbuf; | |
1312 | } else { | |
1313 | nb = nw; | |
1314 | } | |
1315 | ||
1316 | /* Check if we've wrapped around the hash table */ | |
1317 | if (i >= kvm->arch.hpt_npte) { | |
1318 | i = 0; | |
1319 | ctx->first_pass = 0; | |
1320 | break; | |
1321 | } | |
1322 | } | |
1323 | ||
1324 | ctx->index = i; | |
1325 | ||
1326 | return nb; | |
1327 | } | |
1328 | ||
1329 | static ssize_t kvm_htab_write(struct file *file, const char __user *buf, | |
1330 | size_t count, loff_t *ppos) | |
1331 | { | |
1332 | struct kvm_htab_ctx *ctx = file->private_data; | |
1333 | struct kvm *kvm = ctx->kvm; | |
1334 | struct kvm_get_htab_header hdr; | |
1335 | unsigned long i, j; | |
1336 | unsigned long v, r; | |
1337 | unsigned long __user *lbuf; | |
6f22bd32 | 1338 | __be64 *hptp; |
a2932923 PM |
1339 | unsigned long tmp[2]; |
1340 | ssize_t nb; | |
1341 | long int err, ret; | |
1342 | int rma_setup; | |
1343 | ||
1344 | if (!access_ok(VERIFY_READ, buf, count)) | |
1345 | return -EFAULT; | |
1346 | ||
1347 | /* lock out vcpus from running while we're doing this */ | |
1348 | mutex_lock(&kvm->lock); | |
1349 | rma_setup = kvm->arch.rma_setup_done; | |
1350 | if (rma_setup) { | |
1351 | kvm->arch.rma_setup_done = 0; /* temporarily */ | |
1352 | /* order rma_setup_done vs. vcpus_running */ | |
1353 | smp_mb(); | |
1354 | if (atomic_read(&kvm->arch.vcpus_running)) { | |
1355 | kvm->arch.rma_setup_done = 1; | |
1356 | mutex_unlock(&kvm->lock); | |
1357 | return -EBUSY; | |
1358 | } | |
1359 | } | |
1360 | ||
1361 | err = 0; | |
1362 | for (nb = 0; nb + sizeof(hdr) <= count; ) { | |
1363 | err = -EFAULT; | |
1364 | if (__copy_from_user(&hdr, buf, sizeof(hdr))) | |
1365 | break; | |
1366 | ||
1367 | err = 0; | |
1368 | if (nb + hdr.n_valid * HPTE_SIZE > count) | |
1369 | break; | |
1370 | ||
1371 | nb += sizeof(hdr); | |
1372 | buf += sizeof(hdr); | |
1373 | ||
1374 | err = -EINVAL; | |
1375 | i = hdr.index; | |
1376 | if (i >= kvm->arch.hpt_npte || | |
1377 | i + hdr.n_valid + hdr.n_invalid > kvm->arch.hpt_npte) | |
1378 | break; | |
1379 | ||
6f22bd32 | 1380 | hptp = (__be64 *)(kvm->arch.hpt_virt + (i * HPTE_SIZE)); |
a2932923 PM |
1381 | lbuf = (unsigned long __user *)buf; |
1382 | for (j = 0; j < hdr.n_valid; ++j) { | |
ffada016 CLG |
1383 | __be64 hpte_v; |
1384 | __be64 hpte_r; | |
1385 | ||
a2932923 | 1386 | err = -EFAULT; |
ffada016 CLG |
1387 | if (__get_user(hpte_v, lbuf) || |
1388 | __get_user(hpte_r, lbuf + 1)) | |
a2932923 | 1389 | goto out; |
ffada016 CLG |
1390 | v = be64_to_cpu(hpte_v); |
1391 | r = be64_to_cpu(hpte_r); | |
a2932923 PM |
1392 | err = -EINVAL; |
1393 | if (!(v & HPTE_V_VALID)) | |
1394 | goto out; | |
1395 | lbuf += 2; | |
1396 | nb += HPTE_SIZE; | |
1397 | ||
6f22bd32 | 1398 | if (be64_to_cpu(hptp[0]) & (HPTE_V_VALID | HPTE_V_ABSENT)) |
a2932923 PM |
1399 | kvmppc_do_h_remove(kvm, 0, i, 0, tmp); |
1400 | err = -EIO; | |
1401 | ret = kvmppc_virtmode_do_h_enter(kvm, H_EXACT, i, v, r, | |
1402 | tmp); | |
1403 | if (ret != H_SUCCESS) { | |
1404 | pr_err("kvm_htab_write ret %ld i=%ld v=%lx " | |
1405 | "r=%lx\n", ret, i, v, r); | |
1406 | goto out; | |
1407 | } | |
1408 | if (!rma_setup && is_vrma_hpte(v)) { | |
341acbb3 | 1409 | unsigned long psize = hpte_base_page_size(v, r); |
a2932923 PM |
1410 | unsigned long senc = slb_pgsize_encoding(psize); |
1411 | unsigned long lpcr; | |
1412 | ||
1413 | kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T | | |
1414 | (VRMA_VSID << SLB_VSID_SHIFT_1T); | |
a0144e2a PM |
1415 | lpcr = senc << (LPCR_VRMASD_SH - 4); |
1416 | kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD); | |
a2932923 PM |
1417 | rma_setup = 1; |
1418 | } | |
1419 | ++i; | |
1420 | hptp += 2; | |
1421 | } | |
1422 | ||
1423 | for (j = 0; j < hdr.n_invalid; ++j) { | |
6f22bd32 | 1424 | if (be64_to_cpu(hptp[0]) & (HPTE_V_VALID | HPTE_V_ABSENT)) |
a2932923 PM |
1425 | kvmppc_do_h_remove(kvm, 0, i, 0, tmp); |
1426 | ++i; | |
1427 | hptp += 2; | |
1428 | } | |
1429 | err = 0; | |
1430 | } | |
1431 | ||
1432 | out: | |
1433 | /* Order HPTE updates vs. rma_setup_done */ | |
1434 | smp_wmb(); | |
1435 | kvm->arch.rma_setup_done = rma_setup; | |
1436 | mutex_unlock(&kvm->lock); | |
1437 | ||
1438 | if (err) | |
1439 | return err; | |
1440 | return nb; | |
1441 | } | |
1442 | ||
1443 | static int kvm_htab_release(struct inode *inode, struct file *filp) | |
1444 | { | |
1445 | struct kvm_htab_ctx *ctx = filp->private_data; | |
1446 | ||
1447 | filp->private_data = NULL; | |
1448 | if (!(ctx->flags & KVM_GET_HTAB_WRITE)) | |
1449 | atomic_dec(&ctx->kvm->arch.hpte_mod_interest); | |
1450 | kvm_put_kvm(ctx->kvm); | |
1451 | kfree(ctx); | |
1452 | return 0; | |
1453 | } | |
1454 | ||
75ef9de1 | 1455 | static const struct file_operations kvm_htab_fops = { |
a2932923 PM |
1456 | .read = kvm_htab_read, |
1457 | .write = kvm_htab_write, | |
1458 | .llseek = default_llseek, | |
1459 | .release = kvm_htab_release, | |
1460 | }; | |
1461 | ||
1462 | int kvm_vm_ioctl_get_htab_fd(struct kvm *kvm, struct kvm_get_htab_fd *ghf) | |
1463 | { | |
1464 | int ret; | |
1465 | struct kvm_htab_ctx *ctx; | |
1466 | int rwflag; | |
1467 | ||
1468 | /* reject flags we don't recognize */ | |
1469 | if (ghf->flags & ~(KVM_GET_HTAB_BOLTED_ONLY | KVM_GET_HTAB_WRITE)) | |
1470 | return -EINVAL; | |
1471 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); | |
1472 | if (!ctx) | |
1473 | return -ENOMEM; | |
1474 | kvm_get_kvm(kvm); | |
1475 | ctx->kvm = kvm; | |
1476 | ctx->index = ghf->start_index; | |
1477 | ctx->flags = ghf->flags; | |
1478 | ctx->first_pass = 1; | |
1479 | ||
1480 | rwflag = (ghf->flags & KVM_GET_HTAB_WRITE) ? O_WRONLY : O_RDONLY; | |
2f84d5ea | 1481 | ret = anon_inode_getfd("kvm-htab", &kvm_htab_fops, ctx, rwflag | O_CLOEXEC); |
a2932923 PM |
1482 | if (ret < 0) { |
1483 | kvm_put_kvm(kvm); | |
1484 | return ret; | |
1485 | } | |
1486 | ||
1487 | if (rwflag == O_RDONLY) { | |
1488 | mutex_lock(&kvm->slots_lock); | |
1489 | atomic_inc(&kvm->arch.hpte_mod_interest); | |
1490 | /* make sure kvmppc_do_h_enter etc. see the increment */ | |
1491 | synchronize_srcu_expedited(&kvm->srcu); | |
1492 | mutex_unlock(&kvm->slots_lock); | |
1493 | } | |
1494 | ||
1495 | return ret; | |
1496 | } | |
1497 | ||
de56a948 PM |
1498 | void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu) |
1499 | { | |
1500 | struct kvmppc_mmu *mmu = &vcpu->arch.mmu; | |
1501 | ||
c17b98cf | 1502 | vcpu->arch.slb_nr = 32; /* POWER7/POWER8 */ |
de56a948 PM |
1503 | |
1504 | mmu->xlate = kvmppc_mmu_book3s_64_hv_xlate; | |
1505 | mmu->reset_msr = kvmppc_mmu_book3s_64_hv_reset_msr; | |
1506 | ||
1507 | vcpu->arch.hflags |= BOOK3S_HFLAG_SLB; | |
1508 | } |