Merge tag 'signal-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/ebieder...
[linux-block.git] / arch / powerpc / kernel / vmlinux.lds.S
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
c51e3a41 2#ifdef CONFIG_PPC64
e8222502 3#define PROVIDE32(x) PROVIDE(__unused__##x)
c51e3a41 4#else
e8222502 5#define PROVIDE32(x) PROVIDE(x)
c51e3a41 6#endif
5f69e388
BH
7
8#define BSS_FIRST_SECTIONS *(.bss.prominit)
441110a5 9#define EMITS_PT_NOTE
4e9e559a 10#define RO_EXCEPTION_TABLE_ALIGN 0
5f69e388 11
325678fd
NP
12#define SOFT_MASK_TABLE(align) \
13 . = ALIGN(align); \
14 __soft_mask_table : AT(ADDR(__soft_mask_table) - LOAD_OFFSET) { \
15 __start___soft_mask_table = .; \
16 KEEP(*(__soft_mask_table)) \
17 __stop___soft_mask_table = .; \
18 }
19
f23699c9
NP
20#define RESTART_TABLE(align) \
21 . = ALIGN(align); \
22 __restart_table : AT(ADDR(__restart_table) - LOAD_OFFSET) { \
23 __start___restart_table = .; \
24 KEEP(*(__restart_table)) \
25 __stop___restart_table = .; \
26 }
27
4846c5de 28#include <asm/page.h>
14cf11af 29#include <asm-generic/vmlinux.lds.h>
bd67fcf9 30#include <asm/cache.h>
62bef288 31#include <asm/thread_info.h>
14cf11af 32
166d97d9 33#define STRICT_ALIGN_SIZE (1 << CONFIG_DATA_SHIFT)
d924cc3f 34
331771e8
ME
35#if STRICT_ALIGN_SIZE < PAGE_SIZE
36#error "CONFIG_DATA_SHIFT must be >= PAGE_SHIFT"
37#endif
38
e19e4ab4
ME
39ENTRY(_stext)
40
c69cccc9 41PHDRS {
af0f3e9e 42 text PT_LOAD FLAGS(7); /* RWX */
ec556271 43 note PT_NOTE FLAGS(0);
c69cccc9
SB
44}
45
cabb5587
SR
46#ifdef CONFIG_PPC64
47OUTPUT_ARCH(powerpc:common64)
48jiffies = jiffies_64;
49#else
14cf11af
PM
50OUTPUT_ARCH(powerpc:common)
51jiffies = jiffies_64 + 4;
cabb5587 52#endif
14cf11af
PM
53SECTIONS
54{
e8222502 55 . = KERNELBASE;
14cf11af 56
e8222502
BH
57/*
58 * Text, read only data and other permanent read-only sections
59 */
60
57f26649
NP
61 _text = .;
62 _stext = .;
63
64 /*
65 * Head text.
66 * This needs to be in its own output section to avoid ld placing
67 * branch trampoline stubs randomly throughout the fixed sections,
68 * which it will do (even if the branch comes from another section)
69 * in order to optimize stub generation.
70 */
71 .head.text : AT(ADDR(.head.text) - LOAD_OFFSET) {
72#ifdef CONFIG_PPC64
73 KEEP(*(.head.text.first_256B));
e0d68273 74#ifdef CONFIG_PPC_BOOK3E_64
57f26649
NP
75#else
76 KEEP(*(.head.text.real_vectors));
77 *(.head.text.real_trampolines);
78 KEEP(*(.head.text.virt_vectors));
79 *(.head.text.virt_trampolines);
80# if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
81 KEEP(*(.head.data.fwnmi_page));
57f26649
NP
82# endif
83#endif
57f26649
NP
84#else /* !CONFIG_PPC64 */
85 HEAD_TEXT
86#endif
af0f3e9e 87 } :text
57f26649 88
7aa5b018
NR
89 __head_end = .;
90
dadc4a1b
NP
91#ifdef CONFIG_PPC64
92 /*
a652758a 93 * ALIGN(0) overrides the default output section alignment because
dadc4a1b
NP
94 * this needs to start right after .head.text in order for fixed
95 * section placement to work.
96 */
a652758a 97 .text ALIGN(0) : AT(ADDR(.text) - LOAD_OFFSET) {
951eedeb 98#ifdef CONFIG_LD_HEAD_STUB_CATCH
4c1d9bb0 99 KEEP(*(.linker_stub_catch));
951eedeb
NP
100 . = . ;
101#endif
102
dadc4a1b 103#else
366234f6 104 .text : AT(ADDR(.text) - LOAD_OFFSET) {
748a7683 105 ALIGN_FUNCTION();
dadc4a1b 106#endif
13beadd9 107 /* careful! __ftr_alt_* sections need to be close to .text */
3ce47d95 108 *(.text.hot .text.hot.* TEXT_MAIN .text.fixup .text.unlikely .text.unlikely.* .fixup __ftr_alt_* .ref.text);
67361cf8
NR
109#ifdef CONFIG_PPC64
110 *(.tramp.ftrace.text);
111#endif
65538966 112 NOINSTR_TEXT
e8222502 113 SCHED_TEXT
6727ad9e 114 CPUIDLE_TEXT
e8222502
BH
115 LOCK_TEXT
116 KPROBES_TEXT
6794c782 117 IRQENTRY_TEXT
be7635e7 118 SOFTIRQENTRY_TEXT
e8c68825
NP
119 /*
120 * -Os builds call FP save/restore functions. The powerpc64
121 * linker generates those on demand in the .sfpr section.
122 * .sfpr gets placed at the beginning of a group of input
123 * sections, which can break start-of-text offset if it is
124 * included with the main text sections, so put it by itself.
125 */
126 *(.sfpr);
7de3b27b
ME
127 MEM_KEEP(init.text)
128 MEM_KEEP(exit.text)
af0f3e9e 129 } :text
e8222502 130
a0591b60 131 . = ALIGN(PAGE_SIZE);
303996da
SR
132 _etext = .;
133 PROVIDE32 (etext = .);
134
e8222502 135 /* Read-only data */
d924cc3f 136 RO_DATA(PAGE_SIZE)
e8222502 137
b6adc6d6
NP
138#ifdef CONFIG_PPC32
139 .sdata2 : AT(ADDR(.sdata2) - LOAD_OFFSET) {
140 *(.sdata2)
141 }
142#endif
143
144 .data.rel.ro : AT(ADDR(.data.rel.ro) - LOAD_OFFSET) {
145 *(.data.rel.ro*)
146 }
147
f21ba449
NP
148 .branch_lt : AT(ADDR(.branch_lt) - LOAD_OFFSET) {
149 *(.branch_lt)
150 }
151
1faa1235
NP
152#ifdef CONFIG_PPC32
153 .got1 : AT(ADDR(.got1) - LOAD_OFFSET) {
154 *(.got1)
155 }
156 .got2 : AT(ADDR(.got2) - LOAD_OFFSET) {
157 __got2_start = .;
158 *(.got2)
159 __got2_end = .;
160 }
f21ba449
NP
161 .got : AT(ADDR(.got) - LOAD_OFFSET) {
162 *(.got)
163 *(.got.plt)
164 }
165 .plt : AT(ADDR(.plt) - LOAD_OFFSET) {
166 /* XXX: is .plt (and .got.plt) required? */
167 *(.plt)
168 }
169
1faa1235 170#else /* CONFIG_PPC32 */
f21ba449
NP
171 .toc1 : AT(ADDR(.toc1) - LOAD_OFFSET) {
172 *(.toc1)
173 }
174
175 .got : AT(ADDR(.got) - LOAD_OFFSET) ALIGN(256) {
1e9eca48 176 *(.got .toc)
f21ba449
NP
177 }
178
325678fd 179 SOFT_MASK_TABLE(8)
f23699c9
NP
180 RESTART_TABLE(8)
181
c787fed1 182#ifdef CONFIG_PPC64_ELF_ABI_V1
3091f5fc
CL
183 .opd : AT(ADDR(.opd) - LOAD_OFFSET) {
184 __start_opd = .;
185 KEEP(*(.opd))
186 __end_opd = .;
187 }
c787fed1 188#endif
3091f5fc 189
a048a07d
NP
190 . = ALIGN(8);
191 __stf_entry_barrier_fixup : AT(ADDR(__stf_entry_barrier_fixup) - LOAD_OFFSET) {
192 __start___stf_entry_barrier_fixup = .;
193 *(__stf_entry_barrier_fixup)
194 __stop___stf_entry_barrier_fixup = .;
195 }
196
9a32a7e7
NP
197 . = ALIGN(8);
198 __uaccess_flush_fixup : AT(ADDR(__uaccess_flush_fixup) - LOAD_OFFSET) {
199 __start___uaccess_flush_fixup = .;
200 *(__uaccess_flush_fixup)
201 __stop___uaccess_flush_fixup = .;
202 }
203
f7964378
NP
204 . = ALIGN(8);
205 __entry_flush_fixup : AT(ADDR(__entry_flush_fixup) - LOAD_OFFSET) {
206 __start___entry_flush_fixup = .;
207 *(__entry_flush_fixup)
208 __stop___entry_flush_fixup = .;
209 }
210
08685be7
NP
211 . = ALIGN(8);
212 __scv_entry_flush_fixup : AT(ADDR(__scv_entry_flush_fixup) - LOAD_OFFSET) {
213 __start___scv_entry_flush_fixup = .;
214 *(__scv_entry_flush_fixup)
215 __stop___scv_entry_flush_fixup = .;
216 }
217
a048a07d
NP
218 . = ALIGN(8);
219 __stf_exit_barrier_fixup : AT(ADDR(__stf_exit_barrier_fixup) - LOAD_OFFSET) {
220 __start___stf_exit_barrier_fixup = .;
221 *(__stf_exit_barrier_fixup)
222 __stop___stf_exit_barrier_fixup = .;
223 }
224
aa8a5e00
ME
225 . = ALIGN(8);
226 __rfi_flush_fixup : AT(ADDR(__rfi_flush_fixup) - LOAD_OFFSET) {
227 __start___rfi_flush_fixup = .;
228 *(__rfi_flush_fixup)
229 __stop___rfi_flush_fixup = .;
230 }
1faa1235 231#endif /* CONFIG_PPC32 */
2eea7f06 232
179ab1cb 233#ifdef CONFIG_PPC_BARRIER_NOSPEC
2eea7f06
MS
234 . = ALIGN(8);
235 __spec_barrier_fixup : AT(ADDR(__spec_barrier_fixup) - LOAD_OFFSET) {
236 __start___barrier_nospec_fixup = .;
237 *(__barrier_nospec_fixup)
238 __stop___barrier_nospec_fixup = .;
239 }
179ab1cb 240#endif /* CONFIG_PPC_BARRIER_NOSPEC */
aa8a5e00 241
3e731858 242#ifdef CONFIG_PPC_E500
76a5eaa3
DC
243 . = ALIGN(8);
244 __spec_btb_flush_fixup : AT(ADDR(__spec_btb_flush_fixup) - LOAD_OFFSET) {
245 __start__btb_flush_fixup = .;
246 *(__btb_flush_fixup)
247 __stop__btb_flush_fixup = .;
248 }
249#endif
14cf11af 250
b150a4d1
ME
251 /*
252 * Various code relies on __init_begin being at the strict RWX boundary.
253 */
254 . = ALIGN(STRICT_ALIGN_SIZE);
255 __srwx_boundary = .;
7082f8e7 256 __end_rodata = .;
b150a4d1
ME
257 __init_begin = .;
258
e8222502
BH
259/*
260 * Init sections discarded at runtime
261 */
67361cf8
NR
262 .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
263 _sinittext = .;
264 INIT_TEXT
2225a8dd
AM
265
266 /*
267 *.init.text might be RO so we must ensure this section ends on
268 * a page boundary.
269 */
270 . = ALIGN(PAGE_SIZE);
67361cf8
NR
271 _einittext = .;
272#ifdef CONFIG_PPC64
273 *(.tramp.ftrace.init);
274#endif
af0f3e9e 275 } :text
e8222502
BH
276
277 /* .exit.text is discarded at runtime, not link time,
278 * to deal with references from __bug_table
279 */
366234f6 280 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
01ba2bdc
SR
281 EXIT_TEXT
282 }
e8222502 283
2225a8dd
AM
284 . = ALIGN(PAGE_SIZE);
285
fdcfeaba 286 INIT_DATA_SECTION(16)
e8222502 287
e8222502 288 . = ALIGN(8);
366234f6 289 __ftr_fixup : AT(ADDR(__ftr_fixup) - LOAD_OFFSET) {
cabb5587 290 __start___ftr_fixup = .;
4c1d9bb0 291 KEEP(*(__ftr_fixup))
cabb5587
SR
292 __stop___ftr_fixup = .;
293 }
2d1b2027 294 . = ALIGN(8);
7c03d653
BH
295 __mmu_ftr_fixup : AT(ADDR(__mmu_ftr_fixup) - LOAD_OFFSET) {
296 __start___mmu_ftr_fixup = .;
4c1d9bb0 297 KEEP(*(__mmu_ftr_fixup))
7c03d653
BH
298 __stop___mmu_ftr_fixup = .;
299 }
300 . = ALIGN(8);
2d1b2027
KG
301 __lwsync_fixup : AT(ADDR(__lwsync_fixup) - LOAD_OFFSET) {
302 __start___lwsync_fixup = .;
4c1d9bb0 303 KEEP(*(__lwsync_fixup))
2d1b2027
KG
304 __stop___lwsync_fixup = .;
305 }
3f639ee8
SR
306#ifdef CONFIG_PPC64
307 . = ALIGN(8);
366234f6 308 __fw_ftr_fixup : AT(ADDR(__fw_ftr_fixup) - LOAD_OFFSET) {
3f639ee8 309 __start___fw_ftr_fixup = .;
4c1d9bb0 310 KEEP(*(__fw_ftr_fixup))
3f639ee8
SR
311 __stop___fw_ftr_fixup = .;
312 }
313#endif
62bef288 314
0415b00d 315 PERCPU_SECTION(L1_CACHE_BYTES)
14cf11af 316
e8222502 317 . = ALIGN(8);
366234f6 318 .machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) {
e8222502 319 __machine_desc_start = . ;
4c1d9bb0 320 KEEP(*(.machine.desc))
e8222502
BH
321 __machine_desc_end = . ;
322 }
2a4b9c5a 323#ifdef CONFIG_RELOCATABLE
549e8152 324 . = ALIGN(8);
9c5f7d39
SP
325 .dynsym : AT(ADDR(.dynsym) - LOAD_OFFSET)
326 {
9c5f7d39 327 __dynamic_symtab = .;
9c5f7d39
SP
328 *(.dynsym)
329 }
549e8152
PM
330 .dynstr : AT(ADDR(.dynstr) - LOAD_OFFSET) { *(.dynstr) }
331 .dynamic : AT(ADDR(.dynamic) - LOAD_OFFSET)
332 {
333 __dynamic_start = .;
334 *(.dynamic)
335 }
336 .hash : AT(ADDR(.hash) - LOAD_OFFSET) { *(.hash) }
ead98360 337 .gnu.hash : AT(ADDR(.gnu.hash) - LOAD_OFFSET) { *(.gnu.hash) }
549e8152
PM
338 .interp : AT(ADDR(.interp) - LOAD_OFFSET) { *(.interp) }
339 .rela.dyn : AT(ADDR(.rela.dyn) - LOAD_OFFSET)
340 {
341 __rela_dyn_start = .;
342 *(.rela*)
343 }
2a4b9c5a 344#endif
4c812318
SR
345 /* .exit.data is discarded at runtime, not link time,
346 * to deal with references from .exit.text
347 */
348 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
349 EXIT_DATA
350 }
e8222502
BH
351
352 /* freed after init ends here */
353 . = ALIGN(PAGE_SIZE);
354 __init_end = .;
355
356/*
357 * And now the various read/write data
358 */
359
360 . = ALIGN(PAGE_SIZE);
361 _sdata = .;
14cf11af 362
366234f6 363 .data : AT(ADDR(.data) - LOAD_OFFSET) {
ca967258 364 DATA_DATA
a1072607 365 *(.data.rel*)
b6adc6d6 366#ifdef CONFIG_PPC32
4c1d9bb0 367 *(SDATA_MAIN)
cabb5587 368#endif
b6adc6d6 369 }
14cf11af 370
e8222502 371 /* The initial task and kernel stack */
63289e7d 372 INIT_TASK_DATA_SECTION(THREAD_ALIGN)
14cf11af 373
75b13483 374 .data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET) {
62bef288 375 PAGE_ALIGNED_DATA(PAGE_SIZE)
e8222502 376 }
14cf11af 377
4af57b78 378 .data..cacheline_aligned : AT(ADDR(.data..cacheline_aligned) - LOAD_OFFSET) {
62bef288 379 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
e8222502 380 }
14cf11af 381
54cb27a7 382 .data..read_mostly : AT(ADDR(.data..read_mostly) - LOAD_OFFSET) {
62bef288 383 READ_MOSTLY_DATA(L1_CACHE_BYTES)
bd67fcf9
TB
384 }
385
5be2a213 386 . = ALIGN(PAGE_SIZE);
366234f6 387 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
62bef288 388 NOSAVE_DATA
e8222502 389 }
4a288563 390
b5effd38
PZ
391 BUG_TABLE
392
903444e4
ME
393 . = ALIGN(PAGE_SIZE);
394 _edata = .;
395 PROVIDE32 (edata = .);
396
e8222502
BH
397/*
398 * And finally the bss
399 */
400
62bef288 401 BSS_SECTION(0, 0, 0)
14cf11af 402
e8222502
BH
403 . = ALIGN(PAGE_SIZE);
404 _end = . ;
405 PROVIDE32 (end = .);
023bf6f1 406
83a092cf 407 DWARF_DEBUG
c604abc3 408 ELF_DETAILS
83a092cf 409
023bf6f1 410 DISCARDS
83a092cf
NP
411 /DISCARD/ : {
412 *(*.EMB.apuinfo)
413 *(.glink .iplt .plt .rela* .comment)
414 *(.gnu.version*)
415 *(.gnu.attributes)
416 *(.eh_frame)
417 }
14cf11af 418}