powerpc: Introduce a function for reporting instruction length
[linux-2.6-block.git] / arch / powerpc / kernel / uprobes.c
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1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
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2/*
3 * User-space Probes (UProbes) for powerpc
4 *
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5 * Copyright IBM Corporation, 2007-2012
6 *
7 * Adapted from the x86 port by Ananth N Mavinakayanahalli <ananth@in.ibm.com>
8 */
9#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/ptrace.h>
12#include <linux/uprobes.h>
13#include <linux/uaccess.h>
14#include <linux/kdebug.h>
15
16#include <asm/sstep.h>
75346251 17#include <asm/inst.h>
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18
19#define UPROBE_TRAP_NR UINT_MAX
20
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21/**
22 * is_trap_insn - check if the instruction is a trap variant
23 * @insn: instruction to be checked.
24 * Returns true if @insn is a trap variant.
25 */
26bool is_trap_insn(uprobe_opcode_t *insn)
27{
28 return (is_trap(*insn));
29}
30
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31/**
32 * arch_uprobe_analyze_insn
33 * @mm: the probed address space.
34 * @arch_uprobe: the probepoint information.
35 * @addr: vaddr to probe.
36 * Return 0 on success or a -ve number on error.
37 */
38int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe,
39 struct mm_struct *mm, unsigned long addr)
40{
41 if (addr & 0x03)
42 return -EINVAL;
43
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44 return 0;
45}
46
47/*
48 * arch_uprobe_pre_xol - prepare to execute out of line.
49 * @auprobe: the probepoint information.
50 * @regs: reflects the saved user state of current task.
51 */
52int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
53{
54 struct arch_uprobe_task *autask = &current->utask->autask;
55
56 autask->saved_trap_nr = current->thread.trap_nr;
57 current->thread.trap_nr = UPROBE_TRAP_NR;
58 regs->nip = current->utask->xol_vaddr;
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59
60 user_enable_single_step(current);
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61 return 0;
62}
63
64/**
65 * uprobe_get_swbp_addr - compute address of swbp given post-swbp regs
66 * @regs: Reflects the saved state of the task after it has hit a breakpoint
67 * instruction.
68 * Return the address of the breakpoint instruction.
69 */
70unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
71{
72 return instruction_pointer(regs);
73}
74
75/*
76 * If xol insn itself traps and generates a signal (SIGILL/SIGSEGV/etc),
77 * then detect the case where a singlestepped instruction jumps back to its
78 * own address. It is assumed that anything like do_page_fault/do_trap/etc
79 * sets thread.trap_nr != UINT_MAX.
80 *
81 * arch_uprobe_pre_xol/arch_uprobe_post_xol save/restore thread.trap_nr,
82 * arch_uprobe_xol_was_trapped() simply checks that ->trap_nr is not equal to
83 * UPROBE_TRAP_NR == UINT_MAX set by arch_uprobe_pre_xol().
84 */
85bool arch_uprobe_xol_was_trapped(struct task_struct *t)
86{
87 if (t->thread.trap_nr != UPROBE_TRAP_NR)
88 return true;
89
90 return false;
91}
92
93/*
94 * Called after single-stepping. To avoid the SMP problems that can
95 * occur when we temporarily put back the original opcode to
96 * single-step, we single-stepped a copy of the instruction.
97 *
98 * This function prepares to resume execution after the single-step.
99 */
100int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
101{
102 struct uprobe_task *utask = current->utask;
103
104 WARN_ON_ONCE(current->thread.trap_nr != UPROBE_TRAP_NR);
105
106 current->thread.trap_nr = utask->autask.saved_trap_nr;
107
108 /*
109 * On powerpc, except for loads and stores, most instructions
110 * including ones that alter code flow (branches, calls, returns)
111 * are emulated in the kernel. We get here only if the emulation
112 * support doesn't exist and have to fix-up the next instruction
113 * to be executed.
114 */
622cf6f4 115 regs->nip = utask->vaddr + ppc_inst_len(ppc_inst_read(&auprobe->insn));
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116
117 user_disable_single_step(current);
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118 return 0;
119}
120
121/* callback routine for handling exceptions. */
122int arch_uprobe_exception_notify(struct notifier_block *self,
123 unsigned long val, void *data)
124{
125 struct die_args *args = data;
126 struct pt_regs *regs = args->regs;
127
128 /* regs == NULL is a kernel bug */
129 if (WARN_ON(!regs))
130 return NOTIFY_DONE;
131
132 /* We are only interested in userspace traps */
133 if (!user_mode(regs))
134 return NOTIFY_DONE;
135
136 switch (val) {
137 case DIE_BPT:
138 if (uprobe_pre_sstep_notifier(regs))
139 return NOTIFY_STOP;
140 break;
141 case DIE_SSTEP:
142 if (uprobe_post_sstep_notifier(regs))
143 return NOTIFY_STOP;
144 default:
145 break;
146 }
147 return NOTIFY_DONE;
148}
149
150/*
151 * This function gets called when XOL instruction either gets trapped or
152 * the thread has a fatal signal, so reset the instruction pointer to its
153 * probed address.
154 */
155void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
156{
157 struct uprobe_task *utask = current->utask;
158
159 current->thread.trap_nr = utask->autask.saved_trap_nr;
160 instruction_pointer_set(regs, utask->vaddr);
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161
162 user_disable_single_step(current);
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163}
164
165/*
166 * See if the instruction can be emulated.
167 * Returns true if instruction was emulated, false otherwise.
168 */
169bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
170{
171 int ret;
172
173 /*
174 * emulate_step() returns 1 if the insn was successfully emulated.
175 * For all other cases, we need to single-step in hardware.
176 */
f8faaffa 177 ret = emulate_step(regs, ppc_inst_read(&auprobe->insn));
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178 if (ret > 0)
179 return true;
180
181 return false;
182}
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183
184unsigned long
185arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs *regs)
186{
187 unsigned long orig_ret_vaddr;
188
189 orig_ret_vaddr = regs->link;
190
191 /* Replace the return addr with trampoline addr */
192 regs->link = trampoline_vaddr;
193
194 return orig_ret_vaddr;
195}
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196
197bool arch_uretprobe_is_alive(struct return_instance *ret, enum rp_check ctx,
198 struct pt_regs *regs)
199{
200 if (ctx == RP_CHECK_CHAIN_CALL)
201 return regs->gpr[1] <= ret->stack;
202 else
203 return regs->gpr[1] < ret->stack;
204}