Commit | Line | Data |
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40ef8cbc PM |
1 | /* |
2 | * | |
3 | * Common boot and setup code. | |
4 | * | |
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #undef DEBUG | |
14 | ||
40ef8cbc PM |
15 | #include <linux/module.h> |
16 | #include <linux/string.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/reboot.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/initrd.h> | |
40ef8cbc PM |
23 | #include <linux/seq_file.h> |
24 | #include <linux/ioport.h> | |
25 | #include <linux/console.h> | |
26 | #include <linux/utsname.h> | |
27 | #include <linux/tty.h> | |
28 | #include <linux/root_dev.h> | |
29 | #include <linux/notifier.h> | |
30 | #include <linux/cpu.h> | |
31 | #include <linux/unistd.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/serial_8250.h> | |
7a0268fa | 34 | #include <linux/bootmem.h> |
12d04eef | 35 | #include <linux/pci.h> |
945feb17 | 36 | #include <linux/lockdep.h> |
95f72d1e | 37 | #include <linux/memblock.h> |
40ef8cbc | 38 | #include <asm/io.h> |
0cc4746c | 39 | #include <asm/kdump.h> |
40ef8cbc PM |
40 | #include <asm/prom.h> |
41 | #include <asm/processor.h> | |
42 | #include <asm/pgtable.h> | |
40ef8cbc PM |
43 | #include <asm/smp.h> |
44 | #include <asm/elf.h> | |
45 | #include <asm/machdep.h> | |
46 | #include <asm/paca.h> | |
40ef8cbc PM |
47 | #include <asm/time.h> |
48 | #include <asm/cputable.h> | |
49 | #include <asm/sections.h> | |
50 | #include <asm/btext.h> | |
51 | #include <asm/nvram.h> | |
52 | #include <asm/setup.h> | |
53 | #include <asm/system.h> | |
54 | #include <asm/rtas.h> | |
55 | #include <asm/iommu.h> | |
56 | #include <asm/serial.h> | |
57 | #include <asm/cache.h> | |
58 | #include <asm/page.h> | |
59 | #include <asm/mmu.h> | |
40ef8cbc | 60 | #include <asm/firmware.h> |
f78541dc | 61 | #include <asm/xmon.h> |
dcad47fc | 62 | #include <asm/udbg.h> |
593e537b | 63 | #include <asm/kexec.h> |
25d21ad6 | 64 | #include <asm/mmu_context.h> |
40ef8cbc | 65 | |
66ba135c SR |
66 | #include "setup.h" |
67 | ||
40ef8cbc PM |
68 | #ifdef DEBUG |
69 | #define DBG(fmt...) udbg_printf(fmt) | |
70 | #else | |
71 | #define DBG(fmt...) | |
72 | #endif | |
73 | ||
40ef8cbc | 74 | int boot_cpuid = 0; |
40ef8cbc PM |
75 | u64 ppc64_pft_size; |
76 | ||
dabcafd3 OJ |
77 | /* Pick defaults since we might want to patch instructions |
78 | * before we've read this from the device tree. | |
79 | */ | |
80 | struct ppc64_caches ppc64_caches = { | |
5a2fe38d OJ |
81 | .dline_size = 0x40, |
82 | .log_dline_size = 6, | |
83 | .iline_size = 0x40, | |
84 | .log_iline_size = 6 | |
dabcafd3 | 85 | }; |
40ef8cbc PM |
86 | EXPORT_SYMBOL_GPL(ppc64_caches); |
87 | ||
88 | /* | |
89 | * These are used in binfmt_elf.c to put aux entries on the stack | |
90 | * for each elf executable being started. | |
91 | */ | |
92 | int dcache_bsize; | |
93 | int icache_bsize; | |
94 | int ucache_bsize; | |
95 | ||
40ef8cbc PM |
96 | #ifdef CONFIG_SMP |
97 | ||
98 | static int smt_enabled_cmdline; | |
99 | ||
100 | /* Look for ibm,smt-enabled OF option */ | |
101 | static void check_smt_enabled(void) | |
102 | { | |
103 | struct device_node *dn; | |
a7f67bdf | 104 | const char *smt_option; |
40ef8cbc PM |
105 | |
106 | /* Allow the command line to overrule the OF option */ | |
107 | if (smt_enabled_cmdline) | |
108 | return; | |
109 | ||
110 | dn = of_find_node_by_path("/options"); | |
111 | ||
112 | if (dn) { | |
e2eb6392 | 113 | smt_option = of_get_property(dn, "ibm,smt-enabled", NULL); |
40ef8cbc PM |
114 | |
115 | if (smt_option) { | |
116 | if (!strcmp(smt_option, "on")) | |
117 | smt_enabled_at_boot = 1; | |
118 | else if (!strcmp(smt_option, "off")) | |
119 | smt_enabled_at_boot = 0; | |
120 | } | |
121 | } | |
122 | } | |
123 | ||
124 | /* Look for smt-enabled= cmdline option */ | |
125 | static int __init early_smt_enabled(char *p) | |
126 | { | |
127 | smt_enabled_cmdline = 1; | |
128 | ||
129 | if (!p) | |
130 | return 0; | |
131 | ||
132 | if (!strcmp(p, "on") || !strcmp(p, "1")) | |
133 | smt_enabled_at_boot = 1; | |
134 | else if (!strcmp(p, "off") || !strcmp(p, "0")) | |
135 | smt_enabled_at_boot = 0; | |
136 | ||
137 | return 0; | |
138 | } | |
139 | early_param("smt-enabled", early_smt_enabled); | |
140 | ||
5ad57078 PM |
141 | #else |
142 | #define check_smt_enabled() | |
40ef8cbc PM |
143 | #endif /* CONFIG_SMP */ |
144 | ||
ee43eb78 | 145 | /* Put the paca pointer into r13 and SPRG_PACA */ |
1426d5a3 | 146 | static void __init setup_paca(struct paca_struct *new_paca) |
4ba99b97 | 147 | { |
1426d5a3 | 148 | local_paca = new_paca; |
ee43eb78 | 149 | mtspr(SPRN_SPRG_PACA, local_paca); |
25d21ad6 BH |
150 | #ifdef CONFIG_PPC_BOOK3E |
151 | mtspr(SPRN_SPRG_TLB_EXFRAME, local_paca->extlb); | |
152 | #endif | |
4ba99b97 ME |
153 | } |
154 | ||
40ef8cbc PM |
155 | /* |
156 | * Early initialization entry point. This is called by head.S | |
157 | * with MMU translation disabled. We rely on the "feature" of | |
158 | * the CPU that ignores the top 2 bits of the address in real | |
159 | * mode so we can access kernel globals normally provided we | |
160 | * only toy with things in the RMO region. From here, we do | |
95f72d1e | 161 | * some early parsing of the device-tree to setup out MEMBLOCK |
40ef8cbc PM |
162 | * data structures, and allocate & initialize the hash table |
163 | * and segment tables so we can start running with translation | |
164 | * enabled. | |
165 | * | |
166 | * It is this function which will call the probe() callback of | |
167 | * the various platform types and copy the matching one to the | |
168 | * global ppc_md structure. Your platform can eventually do | |
169 | * some very early initializations from the probe() routine, but | |
170 | * this is not recommended, be very careful as, for example, the | |
171 | * device-tree is not accessible via normal means at this point. | |
172 | */ | |
173 | ||
174 | void __init early_setup(unsigned long dt_ptr) | |
175 | { | |
24d96495 BH |
176 | /* -------- printk is _NOT_ safe to use here ! ------- */ |
177 | ||
42c4aaad | 178 | /* Identify CPU type */ |
974a76f5 | 179 | identify_cpu(0, mfspr(SPRN_PVR)); |
42c4aaad | 180 | |
33dbcf72 | 181 | /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ |
1426d5a3 ME |
182 | initialise_paca(&boot_paca, 0); |
183 | setup_paca(&boot_paca); | |
33dbcf72 | 184 | |
945feb17 BH |
185 | /* Initialize lockdep early or else spinlocks will blow */ |
186 | lockdep_init(); | |
187 | ||
24d96495 BH |
188 | /* -------- printk is now safe to use ------- */ |
189 | ||
f2fd2513 BH |
190 | /* Enable early debugging if any specified (see udbg.h) */ |
191 | udbg_early_init(); | |
192 | ||
e8222502 | 193 | DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); |
40ef8cbc | 194 | |
40ef8cbc | 195 | /* |
3c607ce2 LV |
196 | * Do early initialization using the flattened device |
197 | * tree, such as retrieving the physical memory map or | |
198 | * calculating/retrieving the hash table size. | |
40ef8cbc PM |
199 | */ |
200 | early_init_devtree(__va(dt_ptr)); | |
201 | ||
4df20460 | 202 | /* Now we know the logical id of our boot cpu, setup the paca. */ |
1426d5a3 | 203 | setup_paca(&paca[boot_cpuid]); |
4df20460 AB |
204 | |
205 | /* Fix up paca fields required for the boot cpu */ | |
206 | get_paca()->cpu_start = 1; | |
4df20460 | 207 | |
e8222502 BH |
208 | /* Probe the machine type */ |
209 | probe_machine(); | |
40ef8cbc | 210 | |
47310413 | 211 | setup_kdump_trampoline(); |
0cc4746c | 212 | |
40ef8cbc PM |
213 | DBG("Found, Initializing memory management...\n"); |
214 | ||
757c74d2 BH |
215 | /* Initialize the hash table or TLB handling */ |
216 | early_init_mmu(); | |
40ef8cbc PM |
217 | |
218 | DBG(" <- early_setup()\n"); | |
219 | } | |
220 | ||
799d6046 PM |
221 | #ifdef CONFIG_SMP |
222 | void early_setup_secondary(void) | |
223 | { | |
d04c56f7 | 224 | /* Mark interrupts enabled in PACA */ |
757c74d2 | 225 | get_paca()->soft_enabled = 0; |
799d6046 | 226 | |
757c74d2 BH |
227 | /* Initialize the hash table or TLB handling */ |
228 | early_init_mmu_secondary(); | |
799d6046 PM |
229 | } |
230 | ||
231 | #endif /* CONFIG_SMP */ | |
40ef8cbc | 232 | |
b8f51021 ME |
233 | #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) |
234 | void smp_release_cpus(void) | |
235 | { | |
758438a7 | 236 | unsigned long *ptr; |
b8f51021 ME |
237 | |
238 | DBG(" -> smp_release_cpus()\n"); | |
239 | ||
240 | /* All secondary cpus are spinning on a common spinloop, release them | |
241 | * all now so they can start to spin on their individual paca | |
242 | * spinloops. For non SMP kernels, the secondary cpus never get out | |
243 | * of the common spinloop. | |
1f6a93e4 | 244 | */ |
b8f51021 | 245 | |
758438a7 ME |
246 | ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop |
247 | - PHYSICAL_START); | |
1f6a93e4 | 248 | *ptr = __pa(generic_secondary_smp_init); |
b8f51021 ME |
249 | mb(); |
250 | ||
251 | DBG(" <- smp_release_cpus()\n"); | |
252 | } | |
253 | #endif /* CONFIG_SMP || CONFIG_KEXEC */ | |
254 | ||
40ef8cbc | 255 | /* |
799d6046 PM |
256 | * Initialize some remaining members of the ppc64_caches and systemcfg |
257 | * structures | |
40ef8cbc PM |
258 | * (at least until we get rid of them completely). This is mostly some |
259 | * cache informations about the CPU that will be used by cache flush | |
260 | * routines and/or provided to userland | |
261 | */ | |
262 | static void __init initialize_cache_info(void) | |
263 | { | |
264 | struct device_node *np; | |
265 | unsigned long num_cpus = 0; | |
266 | ||
267 | DBG(" -> initialize_cache_info()\n"); | |
268 | ||
269 | for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { | |
270 | num_cpus += 1; | |
271 | ||
272 | /* We're assuming *all* of the CPUs have the same | |
273 | * d-cache and i-cache sizes... -Peter | |
274 | */ | |
275 | ||
276 | if ( num_cpus == 1 ) { | |
a7f67bdf | 277 | const u32 *sizep, *lsizep; |
40ef8cbc | 278 | u32 size, lsize; |
40ef8cbc PM |
279 | |
280 | size = 0; | |
281 | lsize = cur_cpu_spec->dcache_bsize; | |
e2eb6392 | 282 | sizep = of_get_property(np, "d-cache-size", NULL); |
40ef8cbc PM |
283 | if (sizep != NULL) |
284 | size = *sizep; | |
20474abd BH |
285 | lsizep = of_get_property(np, "d-cache-block-size", NULL); |
286 | /* fallback if block size missing */ | |
287 | if (lsizep == NULL) | |
288 | lsizep = of_get_property(np, "d-cache-line-size", NULL); | |
40ef8cbc PM |
289 | if (lsizep != NULL) |
290 | lsize = *lsizep; | |
291 | if (sizep == 0 || lsizep == 0) | |
292 | DBG("Argh, can't find dcache properties ! " | |
293 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
294 | ||
a7f290da BH |
295 | ppc64_caches.dsize = size; |
296 | ppc64_caches.dline_size = lsize; | |
40ef8cbc PM |
297 | ppc64_caches.log_dline_size = __ilog2(lsize); |
298 | ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; | |
299 | ||
300 | size = 0; | |
301 | lsize = cur_cpu_spec->icache_bsize; | |
e2eb6392 | 302 | sizep = of_get_property(np, "i-cache-size", NULL); |
40ef8cbc PM |
303 | if (sizep != NULL) |
304 | size = *sizep; | |
20474abd BH |
305 | lsizep = of_get_property(np, "i-cache-block-size", NULL); |
306 | if (lsizep == NULL) | |
307 | lsizep = of_get_property(np, "i-cache-line-size", NULL); | |
40ef8cbc PM |
308 | if (lsizep != NULL) |
309 | lsize = *lsizep; | |
310 | if (sizep == 0 || lsizep == 0) | |
311 | DBG("Argh, can't find icache properties ! " | |
312 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
313 | ||
a7f290da BH |
314 | ppc64_caches.isize = size; |
315 | ppc64_caches.iline_size = lsize; | |
40ef8cbc PM |
316 | ppc64_caches.log_iline_size = __ilog2(lsize); |
317 | ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; | |
318 | } | |
319 | } | |
320 | ||
40ef8cbc PM |
321 | DBG(" <- initialize_cache_info()\n"); |
322 | } | |
323 | ||
40ef8cbc PM |
324 | |
325 | /* | |
326 | * Do some initial setup of the system. The parameters are those which | |
327 | * were passed in from the bootloader. | |
328 | */ | |
329 | void __init setup_system(void) | |
330 | { | |
331 | DBG(" -> setup_system()\n"); | |
332 | ||
826ea8f2 TB |
333 | /* Apply the CPUs-specific and firmware specific fixups to kernel |
334 | * text (nop out sections not relevant to this CPU or this firmware) | |
42c4aaad | 335 | */ |
0909c8c2 | 336 | do_feature_fixups(cur_cpu_spec->cpu_features, |
42c4aaad | 337 | &__start___ftr_fixup, &__stop___ftr_fixup); |
7c03d653 BH |
338 | do_feature_fixups(cur_cpu_spec->mmu_features, |
339 | &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup); | |
826ea8f2 TB |
340 | do_feature_fixups(powerpc_firmware_features, |
341 | &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); | |
2d1b2027 KG |
342 | do_lwsync_fixups(cur_cpu_spec->cpu_features, |
343 | &__start___lwsync_fixup, &__stop___lwsync_fixup); | |
42c4aaad | 344 | |
40ef8cbc PM |
345 | /* |
346 | * Unflatten the device-tree passed by prom_init or kexec | |
347 | */ | |
348 | unflatten_device_tree(); | |
349 | ||
350 | /* | |
351 | * Fill the ppc64_caches & systemcfg structures with informations | |
0ebfff14 | 352 | * retrieved from the device-tree. |
40ef8cbc PM |
353 | */ |
354 | initialize_cache_info(); | |
355 | ||
356 | #ifdef CONFIG_PPC_RTAS | |
357 | /* | |
358 | * Initialize RTAS if available | |
359 | */ | |
360 | rtas_initialize(); | |
361 | #endif /* CONFIG_PPC_RTAS */ | |
40ef8cbc PM |
362 | |
363 | /* | |
364 | * Check if we have an initrd provided via the device-tree | |
365 | */ | |
366 | check_for_initrd(); | |
40ef8cbc PM |
367 | |
368 | /* | |
369 | * Do some platform specific early initializations, that includes | |
370 | * setting up the hash table pointers. It also sets up some interrupt-mapping | |
371 | * related options that will be used by finish_device_tree() | |
372 | */ | |
57744ea9 GL |
373 | if (ppc_md.init_early) |
374 | ppc_md.init_early(); | |
40ef8cbc | 375 | |
463ce0e1 BH |
376 | /* |
377 | * We can discover serial ports now since the above did setup the | |
378 | * hash table management for us, thus ioremap works. We do that early | |
379 | * so that further code can be debugged | |
380 | */ | |
463ce0e1 | 381 | find_legacy_serial_ports(); |
463ce0e1 | 382 | |
40ef8cbc PM |
383 | /* |
384 | * Register early console | |
385 | */ | |
386 | register_early_udbg_console(); | |
40ef8cbc | 387 | |
47679283 ME |
388 | /* |
389 | * Initialize xmon | |
390 | */ | |
391 | xmon_setup(); | |
480f6f35 | 392 | |
5ad57078 PM |
393 | check_smt_enabled(); |
394 | smp_setup_cpu_maps(); | |
40ef8cbc | 395 | |
f018b36f | 396 | #ifdef CONFIG_SMP |
40ef8cbc PM |
397 | /* Release secondary cpus out of their spinloops at 0x60 now that |
398 | * we can map physical -> logical CPU ids | |
399 | */ | |
400 | smp_release_cpus(); | |
f018b36f | 401 | #endif |
40ef8cbc | 402 | |
96b644bd | 403 | printk("Starting Linux PPC64 %s\n", init_utsname()->version); |
40ef8cbc PM |
404 | |
405 | printk("-----------------------------------------------------\n"); | |
fe333321 | 406 | printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); |
95f72d1e | 407 | printk("physicalMemorySize = 0x%llx\n", memblock_phys_mem_size()); |
9697add0 AB |
408 | if (ppc64_caches.dline_size != 0x80) |
409 | printk("ppc64_caches.dcache_line_size = 0x%x\n", | |
410 | ppc64_caches.dline_size); | |
411 | if (ppc64_caches.iline_size != 0x80) | |
412 | printk("ppc64_caches.icache_line_size = 0x%x\n", | |
413 | ppc64_caches.iline_size); | |
94491685 | 414 | #ifdef CONFIG_PPC_STD_MMU_64 |
9697add0 AB |
415 | if (htab_address) |
416 | printk("htab_address = 0x%p\n", htab_address); | |
40ef8cbc | 417 | printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); |
94491685 | 418 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
b160544c | 419 | if (PHYSICAL_START > 0) |
e468455e ME |
420 | printk("physical_start = 0x%llx\n", |
421 | (unsigned long long)PHYSICAL_START); | |
40ef8cbc | 422 | printk("-----------------------------------------------------\n"); |
40ef8cbc | 423 | |
40ef8cbc PM |
424 | DBG(" <- setup_system()\n"); |
425 | } | |
426 | ||
095c7965 AB |
427 | static u64 slb0_limit(void) |
428 | { | |
429 | if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) { | |
430 | return 1UL << SID_SHIFT_1T; | |
431 | } | |
432 | return 1UL << SID_SHIFT; | |
433 | } | |
434 | ||
40ef8cbc PM |
435 | static void __init irqstack_early_init(void) |
436 | { | |
095c7965 | 437 | u64 limit = slb0_limit(); |
40ef8cbc PM |
438 | unsigned int i; |
439 | ||
440 | /* | |
441 | * interrupt stacks must be under 256MB, we cannot afford to take | |
442 | * SLB misses on them. | |
443 | */ | |
0e551954 | 444 | for_each_possible_cpu(i) { |
3c726f8d | 445 | softirq_ctx[i] = (struct thread_info *) |
95f72d1e | 446 | __va(memblock_alloc_base(THREAD_SIZE, |
095c7965 | 447 | THREAD_SIZE, limit)); |
3c726f8d | 448 | hardirq_ctx[i] = (struct thread_info *) |
95f72d1e | 449 | __va(memblock_alloc_base(THREAD_SIZE, |
095c7965 | 450 | THREAD_SIZE, limit)); |
40ef8cbc PM |
451 | } |
452 | } | |
40ef8cbc | 453 | |
2d27cfd3 BH |
454 | #ifdef CONFIG_PPC_BOOK3E |
455 | static void __init exc_lvl_early_init(void) | |
456 | { | |
457 | unsigned int i; | |
458 | ||
459 | for_each_possible_cpu(i) { | |
460 | critirq_ctx[i] = (struct thread_info *) | |
95f72d1e | 461 | __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
2d27cfd3 | 462 | dbgirq_ctx[i] = (struct thread_info *) |
95f72d1e | 463 | __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
2d27cfd3 | 464 | mcheckirq_ctx[i] = (struct thread_info *) |
95f72d1e | 465 | __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
2d27cfd3 BH |
466 | } |
467 | } | |
468 | #else | |
469 | #define exc_lvl_early_init() | |
470 | #endif | |
471 | ||
40ef8cbc PM |
472 | /* |
473 | * Stack space used when we detect a bad kernel stack pointer, and | |
474 | * early in SMP boots before relocation is enabled. | |
475 | */ | |
476 | static void __init emergency_stack_init(void) | |
477 | { | |
095c7965 | 478 | u64 limit; |
40ef8cbc PM |
479 | unsigned int i; |
480 | ||
481 | /* | |
482 | * Emergency stacks must be under 256MB, we cannot afford to take | |
483 | * SLB misses on them. The ABI also requires them to be 128-byte | |
484 | * aligned. | |
485 | * | |
486 | * Since we use these as temporary stacks during secondary CPU | |
487 | * bringup, we need to get at them in real mode. This means they | |
488 | * must also be within the RMO region. | |
489 | */ | |
cd3db0c4 | 490 | limit = min(slb0_limit(), ppc64_rma_size); |
40ef8cbc | 491 | |
3243d874 ME |
492 | for_each_possible_cpu(i) { |
493 | unsigned long sp; | |
95f72d1e | 494 | sp = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit); |
3243d874 ME |
495 | sp += THREAD_SIZE; |
496 | paca[i].emergency_sp = __va(sp); | |
497 | } | |
40ef8cbc PM |
498 | } |
499 | ||
40ef8cbc PM |
500 | /* |
501 | * Called into from start_kernel, after lock_kernel has been called. | |
502 | * Initializes bootmem, which is unsed to manage page allocation until | |
503 | * mem_init is called. | |
504 | */ | |
505 | void __init setup_arch(char **cmdline_p) | |
506 | { | |
40ef8cbc PM |
507 | ppc64_boot_msg(0x12, "Setup Arch"); |
508 | ||
509 | *cmdline_p = cmd_line; | |
510 | ||
511 | /* | |
512 | * Set cache line size based on type of cpu as a default. | |
513 | * Systems with OF can look in the properties on the cpu node(s) | |
514 | * for a possibly more accurate value. | |
515 | */ | |
516 | dcache_bsize = ppc64_caches.dline_size; | |
517 | icache_bsize = ppc64_caches.iline_size; | |
518 | ||
519 | /* reboot on panic */ | |
520 | panic_timeout = 180; | |
40ef8cbc PM |
521 | |
522 | if (ppc_md.panic) | |
7e990266 | 523 | setup_panic(); |
40ef8cbc | 524 | |
4846c5de | 525 | init_mm.start_code = (unsigned long)_stext; |
40ef8cbc PM |
526 | init_mm.end_code = (unsigned long) _etext; |
527 | init_mm.end_data = (unsigned long) _edata; | |
528 | init_mm.brk = klimit; | |
529 | ||
530 | irqstack_early_init(); | |
2d27cfd3 | 531 | exc_lvl_early_init(); |
40ef8cbc PM |
532 | emergency_stack_init(); |
533 | ||
94491685 | 534 | #ifdef CONFIG_PPC_STD_MMU_64 |
40ef8cbc | 535 | stabs_alloc(); |
94491685 | 536 | #endif |
40ef8cbc PM |
537 | /* set up the bootmem stuff with available memory */ |
538 | do_init_bootmem(); | |
539 | sparse_init(); | |
540 | ||
0458060c PM |
541 | #ifdef CONFIG_DUMMY_CONSOLE |
542 | conswitchp = &dummy_con; | |
543 | #endif | |
544 | ||
38db7e74 GL |
545 | if (ppc_md.setup_arch) |
546 | ppc_md.setup_arch(); | |
40ef8cbc | 547 | |
40ef8cbc | 548 | paging_init(); |
6f0ef0f5 BH |
549 | |
550 | /* Initialize the MMU context management stuff */ | |
551 | mmu_context_init(); | |
552 | ||
40ef8cbc PM |
553 | ppc64_boot_msg(0x15, "Setup Done"); |
554 | } | |
555 | ||
556 | ||
557 | /* ToDo: do something useful if ppc_md is not yet setup. */ | |
558 | #define PPC64_LINUX_FUNCTION 0x0f000000 | |
559 | #define PPC64_IPL_MESSAGE 0xc0000000 | |
560 | #define PPC64_TERM_MESSAGE 0xb0000000 | |
561 | ||
562 | static void ppc64_do_msg(unsigned int src, const char *msg) | |
563 | { | |
564 | if (ppc_md.progress) { | |
565 | char buf[128]; | |
566 | ||
567 | sprintf(buf, "%08X\n", src); | |
568 | ppc_md.progress(buf, 0); | |
569 | snprintf(buf, 128, "%s", msg); | |
570 | ppc_md.progress(buf, 0); | |
571 | } | |
572 | } | |
573 | ||
574 | /* Print a boot progress message. */ | |
575 | void ppc64_boot_msg(unsigned int src, const char *msg) | |
576 | { | |
577 | ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); | |
578 | printk("[boot]%04x %s\n", src, msg); | |
579 | } | |
580 | ||
7a0268fa | 581 | #ifdef CONFIG_SMP |
c2a7e818 TH |
582 | #define PCPU_DYN_SIZE () |
583 | ||
584 | static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align) | |
7a0268fa | 585 | { |
c2a7e818 TH |
586 | return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align, |
587 | __pa(MAX_DMA_ADDRESS)); | |
588 | } | |
7a0268fa | 589 | |
c2a7e818 TH |
590 | static void __init pcpu_fc_free(void *ptr, size_t size) |
591 | { | |
592 | free_bootmem(__pa(ptr), size); | |
593 | } | |
7a0268fa | 594 | |
c2a7e818 TH |
595 | static int pcpu_cpu_distance(unsigned int from, unsigned int to) |
596 | { | |
597 | if (cpu_to_node(from) == cpu_to_node(to)) | |
598 | return LOCAL_DISTANCE; | |
599 | else | |
600 | return REMOTE_DISTANCE; | |
601 | } | |
602 | ||
603 | void __init setup_per_cpu_areas(void) | |
604 | { | |
605 | const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE; | |
606 | size_t atom_size; | |
607 | unsigned long delta; | |
608 | unsigned int cpu; | |
609 | int rc; | |
610 | ||
611 | /* | |
612 | * Linear mapping is one of 4K, 1M and 16M. For 4K, no need | |
613 | * to group units. For larger mappings, use 1M atom which | |
614 | * should be large enough to contain a number of units. | |
615 | */ | |
616 | if (mmu_linear_psize == MMU_PAGE_4K) | |
617 | atom_size = PAGE_SIZE; | |
618 | else | |
619 | atom_size = 1 << 20; | |
620 | ||
621 | rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance, | |
622 | pcpu_fc_alloc, pcpu_fc_free); | |
623 | if (rc < 0) | |
624 | panic("cannot initialize percpu area (err=%d)", rc); | |
625 | ||
626 | delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; | |
627 | for_each_possible_cpu(cpu) | |
628 | paca[cpu].data_offset = delta + pcpu_unit_offsets[cpu]; | |
7a0268fa AB |
629 | } |
630 | #endif | |
4cb3cee0 BH |
631 | |
632 | ||
633 | #ifdef CONFIG_PPC_INDIRECT_IO | |
634 | struct ppc_pci_io ppc_pci_io; | |
635 | EXPORT_SYMBOL(ppc_pci_io); | |
636 | #endif /* CONFIG_PPC_INDIRECT_IO */ | |
637 |