Commit | Line | Data |
---|---|---|
40ef8cbc PM |
1 | /* |
2 | * | |
3 | * Common boot and setup code. | |
4 | * | |
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #undef DEBUG | |
14 | ||
40ef8cbc PM |
15 | #include <linux/module.h> |
16 | #include <linux/string.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/reboot.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/initrd.h> | |
40ef8cbc PM |
23 | #include <linux/seq_file.h> |
24 | #include <linux/ioport.h> | |
25 | #include <linux/console.h> | |
26 | #include <linux/utsname.h> | |
27 | #include <linux/tty.h> | |
28 | #include <linux/root_dev.h> | |
29 | #include <linux/notifier.h> | |
30 | #include <linux/cpu.h> | |
31 | #include <linux/unistd.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/serial_8250.h> | |
7a0268fa | 34 | #include <linux/bootmem.h> |
12d04eef | 35 | #include <linux/pci.h> |
40ef8cbc | 36 | #include <asm/io.h> |
0cc4746c | 37 | #include <asm/kdump.h> |
40ef8cbc PM |
38 | #include <asm/prom.h> |
39 | #include <asm/processor.h> | |
40 | #include <asm/pgtable.h> | |
40ef8cbc PM |
41 | #include <asm/smp.h> |
42 | #include <asm/elf.h> | |
43 | #include <asm/machdep.h> | |
44 | #include <asm/paca.h> | |
40ef8cbc PM |
45 | #include <asm/time.h> |
46 | #include <asm/cputable.h> | |
47 | #include <asm/sections.h> | |
48 | #include <asm/btext.h> | |
49 | #include <asm/nvram.h> | |
50 | #include <asm/setup.h> | |
51 | #include <asm/system.h> | |
52 | #include <asm/rtas.h> | |
53 | #include <asm/iommu.h> | |
54 | #include <asm/serial.h> | |
55 | #include <asm/cache.h> | |
56 | #include <asm/page.h> | |
57 | #include <asm/mmu.h> | |
58 | #include <asm/lmb.h> | |
40ef8cbc | 59 | #include <asm/firmware.h> |
f78541dc | 60 | #include <asm/xmon.h> |
dcad47fc | 61 | #include <asm/udbg.h> |
593e537b | 62 | #include <asm/kexec.h> |
40ef8cbc | 63 | |
66ba135c SR |
64 | #include "setup.h" |
65 | ||
40ef8cbc PM |
66 | #ifdef DEBUG |
67 | #define DBG(fmt...) udbg_printf(fmt) | |
68 | #else | |
69 | #define DBG(fmt...) | |
70 | #endif | |
71 | ||
40ef8cbc PM |
72 | int have_of = 1; |
73 | int boot_cpuid = 0; | |
40ef8cbc PM |
74 | u64 ppc64_pft_size; |
75 | ||
dabcafd3 OJ |
76 | /* Pick defaults since we might want to patch instructions |
77 | * before we've read this from the device tree. | |
78 | */ | |
79 | struct ppc64_caches ppc64_caches = { | |
5a2fe38d OJ |
80 | .dline_size = 0x40, |
81 | .log_dline_size = 6, | |
82 | .iline_size = 0x40, | |
83 | .log_iline_size = 6 | |
dabcafd3 | 84 | }; |
40ef8cbc PM |
85 | EXPORT_SYMBOL_GPL(ppc64_caches); |
86 | ||
87 | /* | |
88 | * These are used in binfmt_elf.c to put aux entries on the stack | |
89 | * for each elf executable being started. | |
90 | */ | |
91 | int dcache_bsize; | |
92 | int icache_bsize; | |
93 | int ucache_bsize; | |
94 | ||
40ef8cbc PM |
95 | #ifdef CONFIG_SMP |
96 | ||
97 | static int smt_enabled_cmdline; | |
98 | ||
99 | /* Look for ibm,smt-enabled OF option */ | |
100 | static void check_smt_enabled(void) | |
101 | { | |
102 | struct device_node *dn; | |
a7f67bdf | 103 | const char *smt_option; |
40ef8cbc PM |
104 | |
105 | /* Allow the command line to overrule the OF option */ | |
106 | if (smt_enabled_cmdline) | |
107 | return; | |
108 | ||
109 | dn = of_find_node_by_path("/options"); | |
110 | ||
111 | if (dn) { | |
e2eb6392 | 112 | smt_option = of_get_property(dn, "ibm,smt-enabled", NULL); |
40ef8cbc PM |
113 | |
114 | if (smt_option) { | |
115 | if (!strcmp(smt_option, "on")) | |
116 | smt_enabled_at_boot = 1; | |
117 | else if (!strcmp(smt_option, "off")) | |
118 | smt_enabled_at_boot = 0; | |
119 | } | |
120 | } | |
121 | } | |
122 | ||
123 | /* Look for smt-enabled= cmdline option */ | |
124 | static int __init early_smt_enabled(char *p) | |
125 | { | |
126 | smt_enabled_cmdline = 1; | |
127 | ||
128 | if (!p) | |
129 | return 0; | |
130 | ||
131 | if (!strcmp(p, "on") || !strcmp(p, "1")) | |
132 | smt_enabled_at_boot = 1; | |
133 | else if (!strcmp(p, "off") || !strcmp(p, "0")) | |
134 | smt_enabled_at_boot = 0; | |
135 | ||
136 | return 0; | |
137 | } | |
138 | early_param("smt-enabled", early_smt_enabled); | |
139 | ||
5ad57078 PM |
140 | #else |
141 | #define check_smt_enabled() | |
40ef8cbc PM |
142 | #endif /* CONFIG_SMP */ |
143 | ||
4ba99b97 ME |
144 | /* Put the paca pointer into r13 and SPRG3 */ |
145 | void __init setup_paca(int cpu) | |
146 | { | |
147 | local_paca = &paca[cpu]; | |
148 | mtspr(SPRN_SPRG3, local_paca); | |
149 | } | |
150 | ||
40ef8cbc PM |
151 | /* |
152 | * Early initialization entry point. This is called by head.S | |
153 | * with MMU translation disabled. We rely on the "feature" of | |
154 | * the CPU that ignores the top 2 bits of the address in real | |
155 | * mode so we can access kernel globals normally provided we | |
156 | * only toy with things in the RMO region. From here, we do | |
157 | * some early parsing of the device-tree to setup out LMB | |
158 | * data structures, and allocate & initialize the hash table | |
159 | * and segment tables so we can start running with translation | |
160 | * enabled. | |
161 | * | |
162 | * It is this function which will call the probe() callback of | |
163 | * the various platform types and copy the matching one to the | |
164 | * global ppc_md structure. Your platform can eventually do | |
165 | * some very early initializations from the probe() routine, but | |
166 | * this is not recommended, be very careful as, for example, the | |
167 | * device-tree is not accessible via normal means at this point. | |
168 | */ | |
169 | ||
170 | void __init early_setup(unsigned long dt_ptr) | |
171 | { | |
42c4aaad | 172 | /* Identify CPU type */ |
974a76f5 | 173 | identify_cpu(0, mfspr(SPRN_PVR)); |
42c4aaad | 174 | |
33dbcf72 ME |
175 | /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ |
176 | setup_paca(0); | |
177 | ||
296167ae ME |
178 | /* Enable early debugging if any specified (see udbg.h) */ |
179 | udbg_early_init(); | |
40ef8cbc | 180 | |
e8222502 | 181 | DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); |
40ef8cbc | 182 | |
40ef8cbc | 183 | /* |
3c607ce2 LV |
184 | * Do early initialization using the flattened device |
185 | * tree, such as retrieving the physical memory map or | |
186 | * calculating/retrieving the hash table size. | |
40ef8cbc PM |
187 | */ |
188 | early_init_devtree(__va(dt_ptr)); | |
189 | ||
4df20460 | 190 | /* Now we know the logical id of our boot cpu, setup the paca. */ |
4ba99b97 | 191 | setup_paca(boot_cpuid); |
4df20460 AB |
192 | |
193 | /* Fix up paca fields required for the boot cpu */ | |
194 | get_paca()->cpu_start = 1; | |
195 | get_paca()->stab_real = __pa((u64)&initial_stab); | |
196 | get_paca()->stab_addr = (u64)&initial_stab; | |
197 | ||
e8222502 BH |
198 | /* Probe the machine type */ |
199 | probe_machine(); | |
40ef8cbc | 200 | |
47310413 | 201 | setup_kdump_trampoline(); |
0cc4746c | 202 | |
40ef8cbc PM |
203 | DBG("Found, Initializing memory management...\n"); |
204 | ||
205 | /* | |
3c726f8d BH |
206 | * Initialize the MMU Hash table and create the linear mapping |
207 | * of memory. Has to be done before stab/slb initialization as | |
208 | * this is currently where the page size encoding is obtained | |
40ef8cbc | 209 | */ |
3c726f8d | 210 | htab_initialize(); |
40ef8cbc PM |
211 | |
212 | /* | |
3c726f8d | 213 | * Initialize stab / SLB management except on iSeries |
40ef8cbc | 214 | */ |
856d08ec SR |
215 | if (cpu_has_feature(CPU_FTR_SLB)) |
216 | slb_initialize(); | |
217 | else if (!firmware_has_feature(FW_FEATURE_ISERIES)) | |
218 | stab_initialize(get_paca()->stab_real); | |
40ef8cbc PM |
219 | |
220 | DBG(" <- early_setup()\n"); | |
221 | } | |
222 | ||
799d6046 PM |
223 | #ifdef CONFIG_SMP |
224 | void early_setup_secondary(void) | |
225 | { | |
226 | struct paca_struct *lpaca = get_paca(); | |
227 | ||
d04c56f7 PM |
228 | /* Mark interrupts enabled in PACA */ |
229 | lpaca->soft_enabled = 0; | |
799d6046 PM |
230 | |
231 | /* Initialize hash table for that CPU */ | |
232 | htab_initialize_secondary(); | |
233 | ||
234 | /* Initialize STAB/SLB. We use a virtual address as it works | |
235 | * in real mode on pSeries and we want a virutal address on | |
236 | * iSeries anyway | |
237 | */ | |
238 | if (cpu_has_feature(CPU_FTR_SLB)) | |
239 | slb_initialize(); | |
240 | else | |
241 | stab_initialize(lpaca->stab_addr); | |
242 | } | |
243 | ||
244 | #endif /* CONFIG_SMP */ | |
40ef8cbc | 245 | |
b8f51021 ME |
246 | #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) |
247 | void smp_release_cpus(void) | |
248 | { | |
249 | extern unsigned long __secondary_hold_spinloop; | |
758438a7 | 250 | unsigned long *ptr; |
b8f51021 ME |
251 | |
252 | DBG(" -> smp_release_cpus()\n"); | |
253 | ||
254 | /* All secondary cpus are spinning on a common spinloop, release them | |
255 | * all now so they can start to spin on their individual paca | |
256 | * spinloops. For non SMP kernels, the secondary cpus never get out | |
257 | * of the common spinloop. | |
258 | * This is useless but harmless on iSeries, secondaries are already | |
259 | * waiting on their paca spinloops. */ | |
260 | ||
758438a7 ME |
261 | ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop |
262 | - PHYSICAL_START); | |
263 | *ptr = 1; | |
b8f51021 ME |
264 | mb(); |
265 | ||
266 | DBG(" <- smp_release_cpus()\n"); | |
267 | } | |
268 | #endif /* CONFIG_SMP || CONFIG_KEXEC */ | |
269 | ||
40ef8cbc | 270 | /* |
799d6046 PM |
271 | * Initialize some remaining members of the ppc64_caches and systemcfg |
272 | * structures | |
40ef8cbc PM |
273 | * (at least until we get rid of them completely). This is mostly some |
274 | * cache informations about the CPU that will be used by cache flush | |
275 | * routines and/or provided to userland | |
276 | */ | |
277 | static void __init initialize_cache_info(void) | |
278 | { | |
279 | struct device_node *np; | |
280 | unsigned long num_cpus = 0; | |
281 | ||
282 | DBG(" -> initialize_cache_info()\n"); | |
283 | ||
284 | for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { | |
285 | num_cpus += 1; | |
286 | ||
287 | /* We're assuming *all* of the CPUs have the same | |
288 | * d-cache and i-cache sizes... -Peter | |
289 | */ | |
290 | ||
291 | if ( num_cpus == 1 ) { | |
a7f67bdf | 292 | const u32 *sizep, *lsizep; |
40ef8cbc | 293 | u32 size, lsize; |
40ef8cbc PM |
294 | |
295 | size = 0; | |
296 | lsize = cur_cpu_spec->dcache_bsize; | |
e2eb6392 | 297 | sizep = of_get_property(np, "d-cache-size", NULL); |
40ef8cbc PM |
298 | if (sizep != NULL) |
299 | size = *sizep; | |
20474abd BH |
300 | lsizep = of_get_property(np, "d-cache-block-size", NULL); |
301 | /* fallback if block size missing */ | |
302 | if (lsizep == NULL) | |
303 | lsizep = of_get_property(np, "d-cache-line-size", NULL); | |
40ef8cbc PM |
304 | if (lsizep != NULL) |
305 | lsize = *lsizep; | |
306 | if (sizep == 0 || lsizep == 0) | |
307 | DBG("Argh, can't find dcache properties ! " | |
308 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
309 | ||
a7f290da BH |
310 | ppc64_caches.dsize = size; |
311 | ppc64_caches.dline_size = lsize; | |
40ef8cbc PM |
312 | ppc64_caches.log_dline_size = __ilog2(lsize); |
313 | ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; | |
314 | ||
315 | size = 0; | |
316 | lsize = cur_cpu_spec->icache_bsize; | |
e2eb6392 | 317 | sizep = of_get_property(np, "i-cache-size", NULL); |
40ef8cbc PM |
318 | if (sizep != NULL) |
319 | size = *sizep; | |
20474abd BH |
320 | lsizep = of_get_property(np, "i-cache-block-size", NULL); |
321 | if (lsizep == NULL) | |
322 | lsizep = of_get_property(np, "i-cache-line-size", NULL); | |
40ef8cbc PM |
323 | if (lsizep != NULL) |
324 | lsize = *lsizep; | |
325 | if (sizep == 0 || lsizep == 0) | |
326 | DBG("Argh, can't find icache properties ! " | |
327 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
328 | ||
a7f290da BH |
329 | ppc64_caches.isize = size; |
330 | ppc64_caches.iline_size = lsize; | |
40ef8cbc PM |
331 | ppc64_caches.log_iline_size = __ilog2(lsize); |
332 | ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; | |
333 | } | |
334 | } | |
335 | ||
40ef8cbc PM |
336 | DBG(" <- initialize_cache_info()\n"); |
337 | } | |
338 | ||
40ef8cbc PM |
339 | |
340 | /* | |
341 | * Do some initial setup of the system. The parameters are those which | |
342 | * were passed in from the bootloader. | |
343 | */ | |
344 | void __init setup_system(void) | |
345 | { | |
346 | DBG(" -> setup_system()\n"); | |
347 | ||
826ea8f2 TB |
348 | /* Apply the CPUs-specific and firmware specific fixups to kernel |
349 | * text (nop out sections not relevant to this CPU or this firmware) | |
42c4aaad | 350 | */ |
0909c8c2 | 351 | do_feature_fixups(cur_cpu_spec->cpu_features, |
42c4aaad | 352 | &__start___ftr_fixup, &__stop___ftr_fixup); |
826ea8f2 TB |
353 | do_feature_fixups(powerpc_firmware_features, |
354 | &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); | |
42c4aaad | 355 | |
40ef8cbc PM |
356 | /* |
357 | * Unflatten the device-tree passed by prom_init or kexec | |
358 | */ | |
359 | unflatten_device_tree(); | |
360 | ||
361 | /* | |
362 | * Fill the ppc64_caches & systemcfg structures with informations | |
0ebfff14 | 363 | * retrieved from the device-tree. |
40ef8cbc PM |
364 | */ |
365 | initialize_cache_info(); | |
366 | ||
0ebfff14 BH |
367 | /* |
368 | * Initialize irq remapping subsystem | |
369 | */ | |
370 | irq_early_init(); | |
371 | ||
40ef8cbc PM |
372 | #ifdef CONFIG_PPC_RTAS |
373 | /* | |
374 | * Initialize RTAS if available | |
375 | */ | |
376 | rtas_initialize(); | |
377 | #endif /* CONFIG_PPC_RTAS */ | |
40ef8cbc PM |
378 | |
379 | /* | |
380 | * Check if we have an initrd provided via the device-tree | |
381 | */ | |
382 | check_for_initrd(); | |
40ef8cbc PM |
383 | |
384 | /* | |
385 | * Do some platform specific early initializations, that includes | |
386 | * setting up the hash table pointers. It also sets up some interrupt-mapping | |
387 | * related options that will be used by finish_device_tree() | |
388 | */ | |
57744ea9 GL |
389 | if (ppc_md.init_early) |
390 | ppc_md.init_early(); | |
40ef8cbc | 391 | |
463ce0e1 BH |
392 | /* |
393 | * We can discover serial ports now since the above did setup the | |
394 | * hash table management for us, thus ioremap works. We do that early | |
395 | * so that further code can be debugged | |
396 | */ | |
463ce0e1 | 397 | find_legacy_serial_ports(); |
463ce0e1 | 398 | |
40ef8cbc PM |
399 | /* |
400 | * Register early console | |
401 | */ | |
402 | register_early_udbg_console(); | |
40ef8cbc | 403 | |
47679283 ME |
404 | /* |
405 | * Initialize xmon | |
406 | */ | |
407 | xmon_setup(); | |
480f6f35 | 408 | |
5ad57078 PM |
409 | check_smt_enabled(); |
410 | smp_setup_cpu_maps(); | |
40ef8cbc | 411 | |
f018b36f | 412 | #ifdef CONFIG_SMP |
40ef8cbc PM |
413 | /* Release secondary cpus out of their spinloops at 0x60 now that |
414 | * we can map physical -> logical CPU ids | |
415 | */ | |
416 | smp_release_cpus(); | |
f018b36f | 417 | #endif |
40ef8cbc | 418 | |
96b644bd | 419 | printk("Starting Linux PPC64 %s\n", init_utsname()->version); |
40ef8cbc PM |
420 | |
421 | printk("-----------------------------------------------------\n"); | |
422 | printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size); | |
a7f290da | 423 | printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size()); |
9697add0 AB |
424 | if (ppc64_caches.dline_size != 0x80) |
425 | printk("ppc64_caches.dcache_line_size = 0x%x\n", | |
426 | ppc64_caches.dline_size); | |
427 | if (ppc64_caches.iline_size != 0x80) | |
428 | printk("ppc64_caches.icache_line_size = 0x%x\n", | |
429 | ppc64_caches.iline_size); | |
430 | if (htab_address) | |
431 | printk("htab_address = 0x%p\n", htab_address); | |
40ef8cbc | 432 | printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); |
398ab1fc ME |
433 | #if PHYSICAL_START > 0 |
434 | printk("physical_start = 0x%x\n", PHYSICAL_START); | |
435 | #endif | |
40ef8cbc | 436 | printk("-----------------------------------------------------\n"); |
40ef8cbc | 437 | |
40ef8cbc PM |
438 | DBG(" <- setup_system()\n"); |
439 | } | |
440 | ||
40ef8cbc PM |
441 | #ifdef CONFIG_IRQSTACKS |
442 | static void __init irqstack_early_init(void) | |
443 | { | |
444 | unsigned int i; | |
445 | ||
446 | /* | |
447 | * interrupt stacks must be under 256MB, we cannot afford to take | |
448 | * SLB misses on them. | |
449 | */ | |
0e551954 | 450 | for_each_possible_cpu(i) { |
3c726f8d BH |
451 | softirq_ctx[i] = (struct thread_info *) |
452 | __va(lmb_alloc_base(THREAD_SIZE, | |
453 | THREAD_SIZE, 0x10000000)); | |
454 | hardirq_ctx[i] = (struct thread_info *) | |
455 | __va(lmb_alloc_base(THREAD_SIZE, | |
456 | THREAD_SIZE, 0x10000000)); | |
40ef8cbc PM |
457 | } |
458 | } | |
459 | #else | |
460 | #define irqstack_early_init() | |
461 | #endif | |
462 | ||
463 | /* | |
464 | * Stack space used when we detect a bad kernel stack pointer, and | |
465 | * early in SMP boots before relocation is enabled. | |
466 | */ | |
467 | static void __init emergency_stack_init(void) | |
468 | { | |
469 | unsigned long limit; | |
470 | unsigned int i; | |
471 | ||
472 | /* | |
473 | * Emergency stacks must be under 256MB, we cannot afford to take | |
474 | * SLB misses on them. The ABI also requires them to be 128-byte | |
475 | * aligned. | |
476 | * | |
477 | * Since we use these as temporary stacks during secondary CPU | |
478 | * bringup, we need to get at them in real mode. This means they | |
479 | * must also be within the RMO region. | |
480 | */ | |
481 | limit = min(0x10000000UL, lmb.rmo_size); | |
482 | ||
0e551954 | 483 | for_each_possible_cpu(i) |
3c726f8d BH |
484 | paca[i].emergency_sp = |
485 | __va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE; | |
40ef8cbc PM |
486 | } |
487 | ||
40ef8cbc PM |
488 | /* |
489 | * Called into from start_kernel, after lock_kernel has been called. | |
490 | * Initializes bootmem, which is unsed to manage page allocation until | |
491 | * mem_init is called. | |
492 | */ | |
493 | void __init setup_arch(char **cmdline_p) | |
494 | { | |
40ef8cbc PM |
495 | ppc64_boot_msg(0x12, "Setup Arch"); |
496 | ||
497 | *cmdline_p = cmd_line; | |
498 | ||
499 | /* | |
500 | * Set cache line size based on type of cpu as a default. | |
501 | * Systems with OF can look in the properties on the cpu node(s) | |
502 | * for a possibly more accurate value. | |
503 | */ | |
504 | dcache_bsize = ppc64_caches.dline_size; | |
505 | icache_bsize = ppc64_caches.iline_size; | |
506 | ||
507 | /* reboot on panic */ | |
508 | panic_timeout = 180; | |
40ef8cbc PM |
509 | |
510 | if (ppc_md.panic) | |
7e990266 | 511 | setup_panic(); |
40ef8cbc PM |
512 | |
513 | init_mm.start_code = PAGE_OFFSET; | |
514 | init_mm.end_code = (unsigned long) _etext; | |
515 | init_mm.end_data = (unsigned long) _edata; | |
516 | init_mm.brk = klimit; | |
517 | ||
518 | irqstack_early_init(); | |
519 | emergency_stack_init(); | |
520 | ||
40ef8cbc PM |
521 | stabs_alloc(); |
522 | ||
523 | /* set up the bootmem stuff with available memory */ | |
524 | do_init_bootmem(); | |
525 | sparse_init(); | |
526 | ||
0458060c PM |
527 | #ifdef CONFIG_DUMMY_CONSOLE |
528 | conswitchp = &dummy_con; | |
529 | #endif | |
530 | ||
38db7e74 GL |
531 | if (ppc_md.setup_arch) |
532 | ppc_md.setup_arch(); | |
40ef8cbc | 533 | |
40ef8cbc PM |
534 | paging_init(); |
535 | ppc64_boot_msg(0x15, "Setup Done"); | |
536 | } | |
537 | ||
538 | ||
539 | /* ToDo: do something useful if ppc_md is not yet setup. */ | |
540 | #define PPC64_LINUX_FUNCTION 0x0f000000 | |
541 | #define PPC64_IPL_MESSAGE 0xc0000000 | |
542 | #define PPC64_TERM_MESSAGE 0xb0000000 | |
543 | ||
544 | static void ppc64_do_msg(unsigned int src, const char *msg) | |
545 | { | |
546 | if (ppc_md.progress) { | |
547 | char buf[128]; | |
548 | ||
549 | sprintf(buf, "%08X\n", src); | |
550 | ppc_md.progress(buf, 0); | |
551 | snprintf(buf, 128, "%s", msg); | |
552 | ppc_md.progress(buf, 0); | |
553 | } | |
554 | } | |
555 | ||
556 | /* Print a boot progress message. */ | |
557 | void ppc64_boot_msg(unsigned int src, const char *msg) | |
558 | { | |
559 | ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); | |
560 | printk("[boot]%04x %s\n", src, msg); | |
561 | } | |
562 | ||
563 | /* Print a termination message (print only -- does not stop the kernel) */ | |
564 | void ppc64_terminate_msg(unsigned int src, const char *msg) | |
565 | { | |
566 | ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg); | |
567 | printk("[terminate]%04x %s\n", src, msg); | |
568 | } | |
569 | ||
40ef8cbc PM |
570 | void cpu_die(void) |
571 | { | |
572 | if (ppc_md.cpu_die) | |
573 | ppc_md.cpu_die(); | |
574 | } | |
7a0268fa AB |
575 | |
576 | #ifdef CONFIG_SMP | |
577 | void __init setup_per_cpu_areas(void) | |
578 | { | |
579 | int i; | |
580 | unsigned long size; | |
581 | char *ptr; | |
582 | ||
583 | /* Copy section for each CPU (we discard the original) */ | |
b6e3590f | 584 | size = ALIGN(__per_cpu_end - __per_cpu_start, PAGE_SIZE); |
7a0268fa AB |
585 | #ifdef CONFIG_MODULES |
586 | if (size < PERCPU_ENOUGH_ROOM) | |
587 | size = PERCPU_ENOUGH_ROOM; | |
588 | #endif | |
589 | ||
0e551954 | 590 | for_each_possible_cpu(i) { |
b6e3590f | 591 | ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size); |
7a0268fa AB |
592 | if (!ptr) |
593 | panic("Cannot allocate cpu data for CPU %d\n", i); | |
594 | ||
595 | paca[i].data_offset = ptr - __per_cpu_start; | |
596 | memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); | |
597 | } | |
d5a7430d MT |
598 | |
599 | /* Now that per_cpu is setup, initialize cpu_sibling_map */ | |
600 | smp_setup_cpu_sibling_map(); | |
7a0268fa AB |
601 | } |
602 | #endif | |
4cb3cee0 BH |
603 | |
604 | ||
605 | #ifdef CONFIG_PPC_INDIRECT_IO | |
606 | struct ppc_pci_io ppc_pci_io; | |
607 | EXPORT_SYMBOL(ppc_pci_io); | |
608 | #endif /* CONFIG_PPC_INDIRECT_IO */ | |
609 |