Commit | Line | Data |
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40ef8cbc PM |
1 | /* |
2 | * | |
3 | * Common boot and setup code. | |
4 | * | |
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #undef DEBUG | |
14 | ||
40ef8cbc PM |
15 | #include <linux/module.h> |
16 | #include <linux/string.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/reboot.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/initrd.h> | |
40ef8cbc PM |
23 | #include <linux/seq_file.h> |
24 | #include <linux/ioport.h> | |
25 | #include <linux/console.h> | |
26 | #include <linux/utsname.h> | |
27 | #include <linux/tty.h> | |
28 | #include <linux/root_dev.h> | |
29 | #include <linux/notifier.h> | |
30 | #include <linux/cpu.h> | |
31 | #include <linux/unistd.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/serial_8250.h> | |
7a0268fa | 34 | #include <linux/bootmem.h> |
12d04eef | 35 | #include <linux/pci.h> |
945feb17 | 36 | #include <linux/lockdep.h> |
d9b2b2a2 | 37 | #include <linux/lmb.h> |
40ef8cbc | 38 | #include <asm/io.h> |
0cc4746c | 39 | #include <asm/kdump.h> |
40ef8cbc PM |
40 | #include <asm/prom.h> |
41 | #include <asm/processor.h> | |
42 | #include <asm/pgtable.h> | |
40ef8cbc PM |
43 | #include <asm/smp.h> |
44 | #include <asm/elf.h> | |
45 | #include <asm/machdep.h> | |
46 | #include <asm/paca.h> | |
40ef8cbc PM |
47 | #include <asm/time.h> |
48 | #include <asm/cputable.h> | |
49 | #include <asm/sections.h> | |
50 | #include <asm/btext.h> | |
51 | #include <asm/nvram.h> | |
52 | #include <asm/setup.h> | |
53 | #include <asm/system.h> | |
54 | #include <asm/rtas.h> | |
55 | #include <asm/iommu.h> | |
56 | #include <asm/serial.h> | |
57 | #include <asm/cache.h> | |
58 | #include <asm/page.h> | |
59 | #include <asm/mmu.h> | |
40ef8cbc | 60 | #include <asm/firmware.h> |
f78541dc | 61 | #include <asm/xmon.h> |
dcad47fc | 62 | #include <asm/udbg.h> |
593e537b | 63 | #include <asm/kexec.h> |
ec3cf2ec | 64 | #include <asm/swiotlb.h> |
25d21ad6 | 65 | #include <asm/mmu_context.h> |
40ef8cbc | 66 | |
66ba135c SR |
67 | #include "setup.h" |
68 | ||
40ef8cbc PM |
69 | #ifdef DEBUG |
70 | #define DBG(fmt...) udbg_printf(fmt) | |
71 | #else | |
72 | #define DBG(fmt...) | |
73 | #endif | |
74 | ||
40ef8cbc | 75 | int boot_cpuid = 0; |
40ef8cbc PM |
76 | u64 ppc64_pft_size; |
77 | ||
dabcafd3 OJ |
78 | /* Pick defaults since we might want to patch instructions |
79 | * before we've read this from the device tree. | |
80 | */ | |
81 | struct ppc64_caches ppc64_caches = { | |
5a2fe38d OJ |
82 | .dline_size = 0x40, |
83 | .log_dline_size = 6, | |
84 | .iline_size = 0x40, | |
85 | .log_iline_size = 6 | |
dabcafd3 | 86 | }; |
40ef8cbc PM |
87 | EXPORT_SYMBOL_GPL(ppc64_caches); |
88 | ||
89 | /* | |
90 | * These are used in binfmt_elf.c to put aux entries on the stack | |
91 | * for each elf executable being started. | |
92 | */ | |
93 | int dcache_bsize; | |
94 | int icache_bsize; | |
95 | int ucache_bsize; | |
96 | ||
40ef8cbc PM |
97 | #ifdef CONFIG_SMP |
98 | ||
99 | static int smt_enabled_cmdline; | |
100 | ||
101 | /* Look for ibm,smt-enabled OF option */ | |
102 | static void check_smt_enabled(void) | |
103 | { | |
104 | struct device_node *dn; | |
a7f67bdf | 105 | const char *smt_option; |
40ef8cbc PM |
106 | |
107 | /* Allow the command line to overrule the OF option */ | |
108 | if (smt_enabled_cmdline) | |
109 | return; | |
110 | ||
111 | dn = of_find_node_by_path("/options"); | |
112 | ||
113 | if (dn) { | |
e2eb6392 | 114 | smt_option = of_get_property(dn, "ibm,smt-enabled", NULL); |
40ef8cbc PM |
115 | |
116 | if (smt_option) { | |
117 | if (!strcmp(smt_option, "on")) | |
118 | smt_enabled_at_boot = 1; | |
119 | else if (!strcmp(smt_option, "off")) | |
120 | smt_enabled_at_boot = 0; | |
121 | } | |
122 | } | |
123 | } | |
124 | ||
125 | /* Look for smt-enabled= cmdline option */ | |
126 | static int __init early_smt_enabled(char *p) | |
127 | { | |
128 | smt_enabled_cmdline = 1; | |
129 | ||
130 | if (!p) | |
131 | return 0; | |
132 | ||
133 | if (!strcmp(p, "on") || !strcmp(p, "1")) | |
134 | smt_enabled_at_boot = 1; | |
135 | else if (!strcmp(p, "off") || !strcmp(p, "0")) | |
136 | smt_enabled_at_boot = 0; | |
137 | ||
138 | return 0; | |
139 | } | |
140 | early_param("smt-enabled", early_smt_enabled); | |
141 | ||
5ad57078 PM |
142 | #else |
143 | #define check_smt_enabled() | |
40ef8cbc PM |
144 | #endif /* CONFIG_SMP */ |
145 | ||
ee43eb78 | 146 | /* Put the paca pointer into r13 and SPRG_PACA */ |
1426d5a3 | 147 | static void __init setup_paca(struct paca_struct *new_paca) |
4ba99b97 | 148 | { |
1426d5a3 | 149 | local_paca = new_paca; |
ee43eb78 | 150 | mtspr(SPRN_SPRG_PACA, local_paca); |
25d21ad6 BH |
151 | #ifdef CONFIG_PPC_BOOK3E |
152 | mtspr(SPRN_SPRG_TLB_EXFRAME, local_paca->extlb); | |
153 | #endif | |
4ba99b97 ME |
154 | } |
155 | ||
40ef8cbc PM |
156 | /* |
157 | * Early initialization entry point. This is called by head.S | |
158 | * with MMU translation disabled. We rely on the "feature" of | |
159 | * the CPU that ignores the top 2 bits of the address in real | |
160 | * mode so we can access kernel globals normally provided we | |
161 | * only toy with things in the RMO region. From here, we do | |
162 | * some early parsing of the device-tree to setup out LMB | |
163 | * data structures, and allocate & initialize the hash table | |
164 | * and segment tables so we can start running with translation | |
165 | * enabled. | |
166 | * | |
167 | * It is this function which will call the probe() callback of | |
168 | * the various platform types and copy the matching one to the | |
169 | * global ppc_md structure. Your platform can eventually do | |
170 | * some very early initializations from the probe() routine, but | |
171 | * this is not recommended, be very careful as, for example, the | |
172 | * device-tree is not accessible via normal means at this point. | |
173 | */ | |
174 | ||
175 | void __init early_setup(unsigned long dt_ptr) | |
176 | { | |
24d96495 BH |
177 | /* -------- printk is _NOT_ safe to use here ! ------- */ |
178 | ||
42c4aaad | 179 | /* Identify CPU type */ |
974a76f5 | 180 | identify_cpu(0, mfspr(SPRN_PVR)); |
42c4aaad | 181 | |
33dbcf72 | 182 | /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ |
1426d5a3 ME |
183 | initialise_paca(&boot_paca, 0); |
184 | setup_paca(&boot_paca); | |
33dbcf72 | 185 | |
945feb17 BH |
186 | /* Initialize lockdep early or else spinlocks will blow */ |
187 | lockdep_init(); | |
188 | ||
24d96495 BH |
189 | /* -------- printk is now safe to use ------- */ |
190 | ||
f2fd2513 BH |
191 | /* Enable early debugging if any specified (see udbg.h) */ |
192 | udbg_early_init(); | |
193 | ||
e8222502 | 194 | DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); |
40ef8cbc | 195 | |
40ef8cbc | 196 | /* |
3c607ce2 LV |
197 | * Do early initialization using the flattened device |
198 | * tree, such as retrieving the physical memory map or | |
199 | * calculating/retrieving the hash table size. | |
40ef8cbc PM |
200 | */ |
201 | early_init_devtree(__va(dt_ptr)); | |
202 | ||
4df20460 | 203 | /* Now we know the logical id of our boot cpu, setup the paca. */ |
1426d5a3 | 204 | setup_paca(&paca[boot_cpuid]); |
4df20460 AB |
205 | |
206 | /* Fix up paca fields required for the boot cpu */ | |
207 | get_paca()->cpu_start = 1; | |
4df20460 | 208 | |
e8222502 BH |
209 | /* Probe the machine type */ |
210 | probe_machine(); | |
40ef8cbc | 211 | |
47310413 | 212 | setup_kdump_trampoline(); |
0cc4746c | 213 | |
40ef8cbc PM |
214 | DBG("Found, Initializing memory management...\n"); |
215 | ||
757c74d2 BH |
216 | /* Initialize the hash table or TLB handling */ |
217 | early_init_mmu(); | |
40ef8cbc PM |
218 | |
219 | DBG(" <- early_setup()\n"); | |
220 | } | |
221 | ||
799d6046 PM |
222 | #ifdef CONFIG_SMP |
223 | void early_setup_secondary(void) | |
224 | { | |
d04c56f7 | 225 | /* Mark interrupts enabled in PACA */ |
757c74d2 | 226 | get_paca()->soft_enabled = 0; |
799d6046 | 227 | |
757c74d2 BH |
228 | /* Initialize the hash table or TLB handling */ |
229 | early_init_mmu_secondary(); | |
799d6046 PM |
230 | } |
231 | ||
232 | #endif /* CONFIG_SMP */ | |
40ef8cbc | 233 | |
b8f51021 ME |
234 | #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) |
235 | void smp_release_cpus(void) | |
236 | { | |
758438a7 | 237 | unsigned long *ptr; |
b8f51021 ME |
238 | |
239 | DBG(" -> smp_release_cpus()\n"); | |
240 | ||
241 | /* All secondary cpus are spinning on a common spinloop, release them | |
242 | * all now so they can start to spin on their individual paca | |
243 | * spinloops. For non SMP kernels, the secondary cpus never get out | |
244 | * of the common spinloop. | |
1f6a93e4 | 245 | */ |
b8f51021 | 246 | |
758438a7 ME |
247 | ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop |
248 | - PHYSICAL_START); | |
1f6a93e4 | 249 | *ptr = __pa(generic_secondary_smp_init); |
b8f51021 ME |
250 | mb(); |
251 | ||
252 | DBG(" <- smp_release_cpus()\n"); | |
253 | } | |
254 | #endif /* CONFIG_SMP || CONFIG_KEXEC */ | |
255 | ||
40ef8cbc | 256 | /* |
799d6046 PM |
257 | * Initialize some remaining members of the ppc64_caches and systemcfg |
258 | * structures | |
40ef8cbc PM |
259 | * (at least until we get rid of them completely). This is mostly some |
260 | * cache informations about the CPU that will be used by cache flush | |
261 | * routines and/or provided to userland | |
262 | */ | |
263 | static void __init initialize_cache_info(void) | |
264 | { | |
265 | struct device_node *np; | |
266 | unsigned long num_cpus = 0; | |
267 | ||
268 | DBG(" -> initialize_cache_info()\n"); | |
269 | ||
270 | for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { | |
271 | num_cpus += 1; | |
272 | ||
273 | /* We're assuming *all* of the CPUs have the same | |
274 | * d-cache and i-cache sizes... -Peter | |
275 | */ | |
276 | ||
277 | if ( num_cpus == 1 ) { | |
a7f67bdf | 278 | const u32 *sizep, *lsizep; |
40ef8cbc | 279 | u32 size, lsize; |
40ef8cbc PM |
280 | |
281 | size = 0; | |
282 | lsize = cur_cpu_spec->dcache_bsize; | |
e2eb6392 | 283 | sizep = of_get_property(np, "d-cache-size", NULL); |
40ef8cbc PM |
284 | if (sizep != NULL) |
285 | size = *sizep; | |
20474abd BH |
286 | lsizep = of_get_property(np, "d-cache-block-size", NULL); |
287 | /* fallback if block size missing */ | |
288 | if (lsizep == NULL) | |
289 | lsizep = of_get_property(np, "d-cache-line-size", NULL); | |
40ef8cbc PM |
290 | if (lsizep != NULL) |
291 | lsize = *lsizep; | |
292 | if (sizep == 0 || lsizep == 0) | |
293 | DBG("Argh, can't find dcache properties ! " | |
294 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
295 | ||
a7f290da BH |
296 | ppc64_caches.dsize = size; |
297 | ppc64_caches.dline_size = lsize; | |
40ef8cbc PM |
298 | ppc64_caches.log_dline_size = __ilog2(lsize); |
299 | ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; | |
300 | ||
301 | size = 0; | |
302 | lsize = cur_cpu_spec->icache_bsize; | |
e2eb6392 | 303 | sizep = of_get_property(np, "i-cache-size", NULL); |
40ef8cbc PM |
304 | if (sizep != NULL) |
305 | size = *sizep; | |
20474abd BH |
306 | lsizep = of_get_property(np, "i-cache-block-size", NULL); |
307 | if (lsizep == NULL) | |
308 | lsizep = of_get_property(np, "i-cache-line-size", NULL); | |
40ef8cbc PM |
309 | if (lsizep != NULL) |
310 | lsize = *lsizep; | |
311 | if (sizep == 0 || lsizep == 0) | |
312 | DBG("Argh, can't find icache properties ! " | |
313 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
314 | ||
a7f290da BH |
315 | ppc64_caches.isize = size; |
316 | ppc64_caches.iline_size = lsize; | |
40ef8cbc PM |
317 | ppc64_caches.log_iline_size = __ilog2(lsize); |
318 | ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; | |
319 | } | |
320 | } | |
321 | ||
40ef8cbc PM |
322 | DBG(" <- initialize_cache_info()\n"); |
323 | } | |
324 | ||
40ef8cbc PM |
325 | |
326 | /* | |
327 | * Do some initial setup of the system. The parameters are those which | |
328 | * were passed in from the bootloader. | |
329 | */ | |
330 | void __init setup_system(void) | |
331 | { | |
332 | DBG(" -> setup_system()\n"); | |
333 | ||
826ea8f2 TB |
334 | /* Apply the CPUs-specific and firmware specific fixups to kernel |
335 | * text (nop out sections not relevant to this CPU or this firmware) | |
42c4aaad | 336 | */ |
0909c8c2 | 337 | do_feature_fixups(cur_cpu_spec->cpu_features, |
42c4aaad | 338 | &__start___ftr_fixup, &__stop___ftr_fixup); |
7c03d653 BH |
339 | do_feature_fixups(cur_cpu_spec->mmu_features, |
340 | &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup); | |
826ea8f2 TB |
341 | do_feature_fixups(powerpc_firmware_features, |
342 | &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); | |
2d1b2027 KG |
343 | do_lwsync_fixups(cur_cpu_spec->cpu_features, |
344 | &__start___lwsync_fixup, &__stop___lwsync_fixup); | |
42c4aaad | 345 | |
40ef8cbc PM |
346 | /* |
347 | * Unflatten the device-tree passed by prom_init or kexec | |
348 | */ | |
349 | unflatten_device_tree(); | |
350 | ||
351 | /* | |
352 | * Fill the ppc64_caches & systemcfg structures with informations | |
0ebfff14 | 353 | * retrieved from the device-tree. |
40ef8cbc PM |
354 | */ |
355 | initialize_cache_info(); | |
356 | ||
357 | #ifdef CONFIG_PPC_RTAS | |
358 | /* | |
359 | * Initialize RTAS if available | |
360 | */ | |
361 | rtas_initialize(); | |
362 | #endif /* CONFIG_PPC_RTAS */ | |
40ef8cbc PM |
363 | |
364 | /* | |
365 | * Check if we have an initrd provided via the device-tree | |
366 | */ | |
367 | check_for_initrd(); | |
40ef8cbc PM |
368 | |
369 | /* | |
370 | * Do some platform specific early initializations, that includes | |
371 | * setting up the hash table pointers. It also sets up some interrupt-mapping | |
372 | * related options that will be used by finish_device_tree() | |
373 | */ | |
57744ea9 GL |
374 | if (ppc_md.init_early) |
375 | ppc_md.init_early(); | |
40ef8cbc | 376 | |
463ce0e1 BH |
377 | /* |
378 | * We can discover serial ports now since the above did setup the | |
379 | * hash table management for us, thus ioremap works. We do that early | |
380 | * so that further code can be debugged | |
381 | */ | |
463ce0e1 | 382 | find_legacy_serial_ports(); |
463ce0e1 | 383 | |
40ef8cbc PM |
384 | /* |
385 | * Register early console | |
386 | */ | |
387 | register_early_udbg_console(); | |
40ef8cbc | 388 | |
47679283 ME |
389 | /* |
390 | * Initialize xmon | |
391 | */ | |
392 | xmon_setup(); | |
480f6f35 | 393 | |
5ad57078 PM |
394 | check_smt_enabled(); |
395 | smp_setup_cpu_maps(); | |
40ef8cbc | 396 | |
f018b36f | 397 | #ifdef CONFIG_SMP |
40ef8cbc PM |
398 | /* Release secondary cpus out of their spinloops at 0x60 now that |
399 | * we can map physical -> logical CPU ids | |
400 | */ | |
401 | smp_release_cpus(); | |
f018b36f | 402 | #endif |
40ef8cbc | 403 | |
96b644bd | 404 | printk("Starting Linux PPC64 %s\n", init_utsname()->version); |
40ef8cbc PM |
405 | |
406 | printk("-----------------------------------------------------\n"); | |
fe333321 IM |
407 | printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); |
408 | printk("physicalMemorySize = 0x%llx\n", lmb_phys_mem_size()); | |
9697add0 AB |
409 | if (ppc64_caches.dline_size != 0x80) |
410 | printk("ppc64_caches.dcache_line_size = 0x%x\n", | |
411 | ppc64_caches.dline_size); | |
412 | if (ppc64_caches.iline_size != 0x80) | |
413 | printk("ppc64_caches.icache_line_size = 0x%x\n", | |
414 | ppc64_caches.iline_size); | |
94491685 | 415 | #ifdef CONFIG_PPC_STD_MMU_64 |
9697add0 AB |
416 | if (htab_address) |
417 | printk("htab_address = 0x%p\n", htab_address); | |
40ef8cbc | 418 | printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); |
94491685 | 419 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
b160544c | 420 | if (PHYSICAL_START > 0) |
e468455e ME |
421 | printk("physical_start = 0x%llx\n", |
422 | (unsigned long long)PHYSICAL_START); | |
40ef8cbc | 423 | printk("-----------------------------------------------------\n"); |
40ef8cbc | 424 | |
40ef8cbc PM |
425 | DBG(" <- setup_system()\n"); |
426 | } | |
427 | ||
40ef8cbc PM |
428 | #ifdef CONFIG_IRQSTACKS |
429 | static void __init irqstack_early_init(void) | |
430 | { | |
431 | unsigned int i; | |
432 | ||
433 | /* | |
434 | * interrupt stacks must be under 256MB, we cannot afford to take | |
435 | * SLB misses on them. | |
436 | */ | |
0e551954 | 437 | for_each_possible_cpu(i) { |
3c726f8d BH |
438 | softirq_ctx[i] = (struct thread_info *) |
439 | __va(lmb_alloc_base(THREAD_SIZE, | |
440 | THREAD_SIZE, 0x10000000)); | |
441 | hardirq_ctx[i] = (struct thread_info *) | |
442 | __va(lmb_alloc_base(THREAD_SIZE, | |
443 | THREAD_SIZE, 0x10000000)); | |
40ef8cbc PM |
444 | } |
445 | } | |
446 | #else | |
447 | #define irqstack_early_init() | |
448 | #endif | |
449 | ||
2d27cfd3 BH |
450 | #ifdef CONFIG_PPC_BOOK3E |
451 | static void __init exc_lvl_early_init(void) | |
452 | { | |
453 | unsigned int i; | |
454 | ||
455 | for_each_possible_cpu(i) { | |
456 | critirq_ctx[i] = (struct thread_info *) | |
457 | __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); | |
458 | dbgirq_ctx[i] = (struct thread_info *) | |
459 | __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); | |
460 | mcheckirq_ctx[i] = (struct thread_info *) | |
461 | __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); | |
462 | } | |
463 | } | |
464 | #else | |
465 | #define exc_lvl_early_init() | |
466 | #endif | |
467 | ||
40ef8cbc PM |
468 | /* |
469 | * Stack space used when we detect a bad kernel stack pointer, and | |
470 | * early in SMP boots before relocation is enabled. | |
471 | */ | |
472 | static void __init emergency_stack_init(void) | |
473 | { | |
474 | unsigned long limit; | |
475 | unsigned int i; | |
476 | ||
477 | /* | |
478 | * Emergency stacks must be under 256MB, we cannot afford to take | |
479 | * SLB misses on them. The ABI also requires them to be 128-byte | |
480 | * aligned. | |
481 | * | |
482 | * Since we use these as temporary stacks during secondary CPU | |
483 | * bringup, we need to get at them in real mode. This means they | |
484 | * must also be within the RMO region. | |
485 | */ | |
fe333321 | 486 | limit = min(0x10000000ULL, lmb.rmo_size); |
40ef8cbc | 487 | |
3243d874 ME |
488 | for_each_possible_cpu(i) { |
489 | unsigned long sp; | |
490 | sp = lmb_alloc_base(THREAD_SIZE, THREAD_SIZE, limit); | |
491 | sp += THREAD_SIZE; | |
492 | paca[i].emergency_sp = __va(sp); | |
493 | } | |
40ef8cbc PM |
494 | } |
495 | ||
40ef8cbc PM |
496 | /* |
497 | * Called into from start_kernel, after lock_kernel has been called. | |
498 | * Initializes bootmem, which is unsed to manage page allocation until | |
499 | * mem_init is called. | |
500 | */ | |
501 | void __init setup_arch(char **cmdline_p) | |
502 | { | |
40ef8cbc PM |
503 | ppc64_boot_msg(0x12, "Setup Arch"); |
504 | ||
505 | *cmdline_p = cmd_line; | |
506 | ||
507 | /* | |
508 | * Set cache line size based on type of cpu as a default. | |
509 | * Systems with OF can look in the properties on the cpu node(s) | |
510 | * for a possibly more accurate value. | |
511 | */ | |
512 | dcache_bsize = ppc64_caches.dline_size; | |
513 | icache_bsize = ppc64_caches.iline_size; | |
514 | ||
515 | /* reboot on panic */ | |
516 | panic_timeout = 180; | |
40ef8cbc PM |
517 | |
518 | if (ppc_md.panic) | |
7e990266 | 519 | setup_panic(); |
40ef8cbc | 520 | |
4846c5de | 521 | init_mm.start_code = (unsigned long)_stext; |
40ef8cbc PM |
522 | init_mm.end_code = (unsigned long) _etext; |
523 | init_mm.end_data = (unsigned long) _edata; | |
524 | init_mm.brk = klimit; | |
525 | ||
526 | irqstack_early_init(); | |
2d27cfd3 | 527 | exc_lvl_early_init(); |
40ef8cbc PM |
528 | emergency_stack_init(); |
529 | ||
94491685 | 530 | #ifdef CONFIG_PPC_STD_MMU_64 |
40ef8cbc | 531 | stabs_alloc(); |
94491685 | 532 | #endif |
40ef8cbc PM |
533 | /* set up the bootmem stuff with available memory */ |
534 | do_init_bootmem(); | |
535 | sparse_init(); | |
536 | ||
0458060c PM |
537 | #ifdef CONFIG_DUMMY_CONSOLE |
538 | conswitchp = &dummy_con; | |
539 | #endif | |
540 | ||
38db7e74 GL |
541 | if (ppc_md.setup_arch) |
542 | ppc_md.setup_arch(); | |
40ef8cbc | 543 | |
ec3cf2ec BB |
544 | #ifdef CONFIG_SWIOTLB |
545 | if (ppc_swiotlb_enable) | |
ad32e8cb | 546 | swiotlb_init(1); |
ec3cf2ec BB |
547 | #endif |
548 | ||
40ef8cbc | 549 | paging_init(); |
6f0ef0f5 BH |
550 | |
551 | /* Initialize the MMU context management stuff */ | |
552 | mmu_context_init(); | |
553 | ||
40ef8cbc PM |
554 | ppc64_boot_msg(0x15, "Setup Done"); |
555 | } | |
556 | ||
557 | ||
558 | /* ToDo: do something useful if ppc_md is not yet setup. */ | |
559 | #define PPC64_LINUX_FUNCTION 0x0f000000 | |
560 | #define PPC64_IPL_MESSAGE 0xc0000000 | |
561 | #define PPC64_TERM_MESSAGE 0xb0000000 | |
562 | ||
563 | static void ppc64_do_msg(unsigned int src, const char *msg) | |
564 | { | |
565 | if (ppc_md.progress) { | |
566 | char buf[128]; | |
567 | ||
568 | sprintf(buf, "%08X\n", src); | |
569 | ppc_md.progress(buf, 0); | |
570 | snprintf(buf, 128, "%s", msg); | |
571 | ppc_md.progress(buf, 0); | |
572 | } | |
573 | } | |
574 | ||
575 | /* Print a boot progress message. */ | |
576 | void ppc64_boot_msg(unsigned int src, const char *msg) | |
577 | { | |
578 | ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); | |
579 | printk("[boot]%04x %s\n", src, msg); | |
580 | } | |
581 | ||
40ef8cbc PM |
582 | void cpu_die(void) |
583 | { | |
584 | if (ppc_md.cpu_die) | |
585 | ppc_md.cpu_die(); | |
586 | } | |
7a0268fa AB |
587 | |
588 | #ifdef CONFIG_SMP | |
c2a7e818 TH |
589 | #define PCPU_DYN_SIZE () |
590 | ||
591 | static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align) | |
7a0268fa | 592 | { |
c2a7e818 TH |
593 | return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align, |
594 | __pa(MAX_DMA_ADDRESS)); | |
595 | } | |
7a0268fa | 596 | |
c2a7e818 TH |
597 | static void __init pcpu_fc_free(void *ptr, size_t size) |
598 | { | |
599 | free_bootmem(__pa(ptr), size); | |
600 | } | |
7a0268fa | 601 | |
c2a7e818 TH |
602 | static int pcpu_cpu_distance(unsigned int from, unsigned int to) |
603 | { | |
604 | if (cpu_to_node(from) == cpu_to_node(to)) | |
605 | return LOCAL_DISTANCE; | |
606 | else | |
607 | return REMOTE_DISTANCE; | |
608 | } | |
609 | ||
610 | void __init setup_per_cpu_areas(void) | |
611 | { | |
612 | const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE; | |
613 | size_t atom_size; | |
614 | unsigned long delta; | |
615 | unsigned int cpu; | |
616 | int rc; | |
617 | ||
618 | /* | |
619 | * Linear mapping is one of 4K, 1M and 16M. For 4K, no need | |
620 | * to group units. For larger mappings, use 1M atom which | |
621 | * should be large enough to contain a number of units. | |
622 | */ | |
623 | if (mmu_linear_psize == MMU_PAGE_4K) | |
624 | atom_size = PAGE_SIZE; | |
625 | else | |
626 | atom_size = 1 << 20; | |
627 | ||
628 | rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance, | |
629 | pcpu_fc_alloc, pcpu_fc_free); | |
630 | if (rc < 0) | |
631 | panic("cannot initialize percpu area (err=%d)", rc); | |
632 | ||
633 | delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; | |
634 | for_each_possible_cpu(cpu) | |
635 | paca[cpu].data_offset = delta + pcpu_unit_offsets[cpu]; | |
7a0268fa AB |
636 | } |
637 | #endif | |
4cb3cee0 BH |
638 | |
639 | ||
640 | #ifdef CONFIG_PPC_INDIRECT_IO | |
641 | struct ppc_pci_io ppc_pci_io; | |
642 | EXPORT_SYMBOL(ppc_pci_io); | |
643 | #endif /* CONFIG_PPC_INDIRECT_IO */ | |
644 |