powerpc: Merge 32-bit and 64-bit setup_arch()
[linux-2.6-block.git] / arch / powerpc / kernel / setup-common.c
CommitLineData
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1/*
2 * Common boot and setup code for both 32-bit and 64-bit.
3 * Extracted from arch/powerpc/kernel/setup_64.c.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
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12
13#undef DEBUG
14
4b16f8e2 15#include <linux/export.h>
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16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/reboot.h>
21#include <linux/delay.h>
22#include <linux/initrd.h>
e5c6c8e4 23#include <linux/platform_device.h>
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24#include <linux/seq_file.h>
25#include <linux/ioport.h>
26#include <linux/console.h>
894673ee 27#include <linux/screen_info.h>
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28#include <linux/root_dev.h>
29#include <linux/notifier.h>
30#include <linux/cpu.h>
31#include <linux/unistd.h>
32#include <linux/serial.h>
33#include <linux/serial_8250.h>
94a3807c 34#include <linux/debugfs.h>
8d089085 35#include <linux/percpu.h>
95f72d1e 36#include <linux/memblock.h>
d746286c 37#include <linux/of_platform.h>
b1923caa 38#include <linux/hugetlb.h>
03501dab 39#include <asm/io.h>
1426d5a3 40#include <asm/paca.h>
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41#include <asm/prom.h>
42#include <asm/processor.h>
a7f290da 43#include <asm/vdso_datapage.h>
03501dab 44#include <asm/pgtable.h>
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45#include <asm/smp.h>
46#include <asm/elf.h>
47#include <asm/machdep.h>
48#include <asm/time.h>
49#include <asm/cputable.h>
50#include <asm/sections.h>
e8222502 51#include <asm/firmware.h>
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52#include <asm/btext.h>
53#include <asm/nvram.h>
54#include <asm/setup.h>
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55#include <asm/rtas.h>
56#include <asm/iommu.h>
57#include <asm/serial.h>
58#include <asm/cache.h>
59#include <asm/page.h>
60#include <asm/mmu.h>
fca5dcd4 61#include <asm/xmon.h>
8d089085 62#include <asm/cputhreads.h>
f465df81 63#include <mm/mmu_decl.h>
ebaeb5ae 64#include <asm/fadump.h>
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65#include <asm/udbg.h>
66#include <asm/hugetlb.h>
67#include <asm/livepatch.h>
68#include <asm/mmu_context.h>
69
70#include "setup.h"
03501dab 71
03501dab 72#ifdef DEBUG
f9e4ec57 73#include <asm/udbg.h>
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74#define DBG(fmt...) udbg_printf(fmt)
75#else
76#define DBG(fmt...)
77#endif
78
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79/* The main machine-dep calls structure
80 */
81struct machdep_calls ppc_md;
82EXPORT_SYMBOL(ppc_md);
83struct machdep_calls *machine_id;
84EXPORT_SYMBOL(machine_id);
799d6046 85
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86int boot_cpuid = -1;
87EXPORT_SYMBOL_GPL(boot_cpuid);
88
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89unsigned long klimit = (unsigned long) _end;
90
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91/*
92 * This still seems to be needed... -- paulus
93 */
94struct screen_info screen_info = {
95 .orig_x = 0,
96 .orig_y = 25,
97 .orig_video_cols = 80,
98 .orig_video_lines = 25,
99 .orig_video_isVGA = 1,
100 .orig_video_points = 16
101};
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102#if defined(CONFIG_FB_VGA16_MODULE)
103EXPORT_SYMBOL(screen_info);
104#endif
03501dab 105
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106/* Variables required to store legacy IO irq routing */
107int of_i8042_kbd_irq;
ee110066 108EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
540c6c39 109int of_i8042_aux_irq;
ee110066 110EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
540c6c39 111
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112#ifdef __DO_IRQ_CANON
113/* XXX should go elsewhere eventually */
114int ppc_do_canonicalize_irqs;
115EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
116#endif
117
118/* also used by kexec */
119void machine_shutdown(void)
120{
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121#ifdef CONFIG_FA_DUMP
122 /*
123 * if fadump is active, cleanup the fadump registration before we
124 * shutdown.
125 */
126 fadump_cleanup();
127#endif
128
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129 if (ppc_md.machine_shutdown)
130 ppc_md.machine_shutdown();
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131}
132
133void machine_restart(char *cmd)
134{
135 machine_shutdown();
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136 if (ppc_md.restart)
137 ppc_md.restart(cmd);
03501dab 138 smp_send_stop();
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139 printk(KERN_EMERG "System Halted, OK to turn off power\n");
140 local_irq_disable();
141 while (1) ;
142}
143
144void machine_power_off(void)
145{
146 machine_shutdown();
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147 if (pm_power_off)
148 pm_power_off();
03501dab 149 smp_send_stop();
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150 printk(KERN_EMERG "System Halted, OK to turn off power\n");
151 local_irq_disable();
152 while (1) ;
153}
154/* Used by the G5 thermal driver */
155EXPORT_SYMBOL_GPL(machine_power_off);
156
9178ba29 157void (*pm_power_off)(void);
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158EXPORT_SYMBOL_GPL(pm_power_off);
159
160void machine_halt(void)
161{
162 machine_shutdown();
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163 if (ppc_md.halt)
164 ppc_md.halt();
03501dab 165 smp_send_stop();
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166 printk(KERN_EMERG "System Halted, OK to turn off power\n");
167 local_irq_disable();
168 while (1) ;
169}
170
171
172#ifdef CONFIG_TAU
173extern u32 cpu_temp(unsigned long cpu);
174extern u32 cpu_temp_both(unsigned long cpu);
175#endif /* CONFIG_TAU */
176
177#ifdef CONFIG_SMP
6b7487fc 178DEFINE_PER_CPU(unsigned int, cpu_pvr);
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179#endif
180
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181static void show_cpuinfo_summary(struct seq_file *m)
182{
183 struct device_node *root;
184 const char *model = NULL;
185#if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
186 unsigned long bogosum = 0;
187 int i;
188 for_each_online_cpu(i)
189 bogosum += loops_per_jiffy;
190 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
191 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
192#endif /* CONFIG_SMP && CONFIG_PPC32 */
193 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
194 if (ppc_md.name)
195 seq_printf(m, "platform\t: %s\n", ppc_md.name);
196 root = of_find_node_by_path("/");
197 if (root)
198 model = of_get_property(root, "model", NULL);
199 if (model)
200 seq_printf(m, "model\t\t: %s\n", model);
201 of_node_put(root);
202
203 if (ppc_md.show_cpuinfo != NULL)
204 ppc_md.show_cpuinfo(m);
205
206#ifdef CONFIG_PPC32
207 /* Display the amount of memory */
208 seq_printf(m, "Memory\t\t: %d MB\n",
209 (unsigned int)(total_memory / (1024 * 1024)));
210#endif
211}
212
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213static int show_cpuinfo(struct seq_file *m, void *v)
214{
215 unsigned long cpu_id = (unsigned long)v - 1;
216 unsigned int pvr;
2299d03a 217 unsigned long proc_freq;
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218 unsigned short maj;
219 unsigned short min;
220
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221 /* We only show online cpus: disable preempt (overzealous, I
222 * knew) to prevent cpu going down. */
223 preempt_disable();
224 if (!cpu_online(cpu_id)) {
225 preempt_enable();
226 return 0;
227 }
228
229#ifdef CONFIG_SMP
6b7487fc 230 pvr = per_cpu(cpu_pvr, cpu_id);
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231#else
232 pvr = mfspr(SPRN_PVR);
233#endif
234 maj = (pvr >> 8) & 0xFF;
235 min = pvr & 0xFF;
236
237 seq_printf(m, "processor\t: %lu\n", cpu_id);
238 seq_printf(m, "cpu\t\t: ");
239
240 if (cur_cpu_spec->pvr_mask)
241 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
242 else
243 seq_printf(m, "unknown (%08x)", pvr);
244
245#ifdef CONFIG_ALTIVEC
246 if (cpu_has_feature(CPU_FTR_ALTIVEC))
247 seq_printf(m, ", altivec supported");
248#endif /* CONFIG_ALTIVEC */
249
250 seq_printf(m, "\n");
251
252#ifdef CONFIG_TAU
253 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
254#ifdef CONFIG_TAU_AVERAGE
255 /* more straightforward, but potentially misleading */
256 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
bccfd588 257 cpu_temp(cpu_id));
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258#else
259 /* show the actual temp sensor range */
260 u32 temp;
bccfd588 261 temp = cpu_temp_both(cpu_id);
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262 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
263 temp & 0xff, temp >> 16);
264#endif
265 }
266#endif /* CONFIG_TAU */
267
268 /*
2299d03a
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269 * Platforms that have variable clock rates, should implement
270 * the method ppc_md.get_proc_freq() that reports the clock
271 * rate of a given cpu. The rest can use ppc_proc_freq to
272 * report the clock rate that is same across all cpus.
03501dab 273 */
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274 if (ppc_md.get_proc_freq)
275 proc_freq = ppc_md.get_proc_freq(cpu_id);
276 else
277 proc_freq = ppc_proc_freq;
278
279 if (proc_freq)
03501dab 280 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
2299d03a 281 proc_freq / 1000000, proc_freq % 1000000);
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282
283 if (ppc_md.show_percpuinfo != NULL)
284 ppc_md.show_percpuinfo(m, cpu_id);
285
286 /* If we are a Freescale core do a simple check so
287 * we dont have to keep adding cases in the future */
288 if (PVR_VER(pvr) & 0x8000) {
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289 switch (PVR_VER(pvr)) {
290 case 0x8000: /* 7441/7450/7451, Voyager */
291 case 0x8001: /* 7445/7455, Apollo 6 */
292 case 0x8002: /* 7447/7457, Apollo 7 */
293 case 0x8003: /* 7447A, Apollo 7 PM */
294 case 0x8004: /* 7448, Apollo 8 */
295 case 0x800c: /* 7410, Nitro */
296 maj = ((pvr >> 8) & 0xF);
297 min = PVR_MIN(pvr);
298 break;
299 default: /* e500/book-e */
300 maj = PVR_MAJ(pvr);
301 min = PVR_MIN(pvr);
302 break;
303 }
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304 } else {
305 switch (PVR_VER(pvr)) {
306 case 0x0020: /* 403 family */
307 maj = PVR_MAJ(pvr) + 1;
308 min = PVR_MIN(pvr);
309 break;
310 case 0x1008: /* 740P/750P ?? */
311 maj = ((pvr >> 8) & 0xFF) - 1;
312 min = pvr & 0xFF;
313 break;
314 default:
315 maj = (pvr >> 8) & 0xFF;
316 min = pvr & 0xFF;
317 break;
318 }
319 }
320
321 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
322 maj, min, PVR_VER(pvr), PVR_REV(pvr));
323
324#ifdef CONFIG_PPC32
325 seq_printf(m, "bogomips\t: %lu.%02lu\n",
326 loops_per_jiffy / (500000/HZ),
327 (loops_per_jiffy / (5000/HZ)) % 100);
328#endif
329
330#ifdef CONFIG_SMP
331 seq_printf(m, "\n");
332#endif
333
334 preempt_enable();
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335
336 /* If this is the last cpu, print the summary */
337 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
338 show_cpuinfo_summary(m);
339
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340 return 0;
341}
342
343static void *c_start(struct seq_file *m, loff_t *pos)
344{
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345 if (*pos == 0) /* just in case, cpu 0 is not the first */
346 *pos = cpumask_first(cpu_online_mask);
347 else
348 *pos = cpumask_next(*pos - 1, cpu_online_mask);
349 if ((*pos) < nr_cpu_ids)
350 return (void *)(unsigned long)(*pos + 1);
351 return NULL;
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352}
353
354static void *c_next(struct seq_file *m, void *v, loff_t *pos)
355{
e6532c63 356 (*pos)++;
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357 return c_start(m, pos);
358}
359
360static void c_stop(struct seq_file *m, void *v)
361{
362}
363
88e9d34c 364const struct seq_operations cpuinfo_op = {
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365 .start =c_start,
366 .next = c_next,
367 .stop = c_stop,
368 .show = show_cpuinfo,
369};
370
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DW
371void __init check_for_initrd(void)
372{
373#ifdef CONFIG_BLK_DEV_INITRD
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DG
374 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
375 initrd_start, initrd_end);
a82765b6
DW
376
377 /* If we were passed an initrd, set the ROOT_DEV properly if the values
378 * look sensible. If not, clear initrd reference.
379 */
51fae6de 380 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
a82765b6
DW
381 initrd_end > initrd_start)
382 ROOT_DEV = Root_RAM0;
6761c4a0 383 else
a82765b6 384 initrd_start = initrd_end = 0;
a82765b6
DW
385
386 if (initrd_start)
a7696b36 387 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
a82765b6
DW
388
389 DBG(" <- check_for_initrd()\n");
390#endif /* CONFIG_BLK_DEV_INITRD */
391}
392
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393#ifdef CONFIG_SMP
394
5853aef1 395int threads_per_core, threads_per_subcore, threads_shift;
8d089085 396cpumask_t threads_core_mask;
de56a948 397EXPORT_SYMBOL_GPL(threads_per_core);
5853aef1 398EXPORT_SYMBOL_GPL(threads_per_subcore);
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399EXPORT_SYMBOL_GPL(threads_shift);
400EXPORT_SYMBOL_GPL(threads_core_mask);
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401
402static void __init cpu_init_thread_core_maps(int tpc)
403{
404 int i;
405
406 threads_per_core = tpc;
5853aef1 407 threads_per_subcore = tpc;
104699c0 408 cpumask_clear(&threads_core_mask);
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409
410 /* This implementation only supports power of 2 number of threads
411 * for simplicity and performance
412 */
413 threads_shift = ilog2(tpc);
414 BUG_ON(tpc != (1 << threads_shift));
415
416 for (i = 0; i < tpc; i++)
104699c0 417 cpumask_set_cpu(i, &threads_core_mask);
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418
419 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
420 tpc, tpc > 1 ? "s" : "");
421 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
422}
423
424
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425/**
426 * setup_cpu_maps - initialize the following cpu maps:
828a6986
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427 * cpu_possible_mask
428 * cpu_present_mask
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429 *
430 * Having the possible map set up early allows us to restrict allocations
8657ae28 431 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
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432 *
433 * We do not initialize the online map here; cpus set their own bits in
828a6986 434 * cpu_online_mask as they come up.
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435 *
436 * This function is valid only for Open Firmware systems. finish_device_tree
437 * must be called before using this.
438 *
439 * While we're here, we may as well set the "physical" cpu ids in the paca.
4df20460
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440 *
441 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
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442 */
443void __init smp_setup_cpu_maps(void)
444{
445 struct device_node *dn = NULL;
446 int cpu = 0;
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447 int nthreads = 1;
448
449 DBG("smp_setup_cpu_maps()\n");
5ad57078 450
8657ae28 451 while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
ac13282d 452 const __be32 *intserv;
43f88120 453 __be32 cpu_be;
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BH
454 int j, len;
455
456 DBG(" * %s...\n", dn->full_name);
5ad57078 457
e2eb6392
SR
458 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
459 &len);
8d089085 460 if (intserv) {
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BH
461 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
462 nthreads);
463 } else {
464 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
e16c8765 465 intserv = of_get_property(dn, "reg", &len);
43f88120
AP
466 if (!intserv) {
467 cpu_be = cpu_to_be32(cpu);
468 intserv = &cpu_be; /* assume logical == phys */
e16c8765 469 len = 4;
43f88120 470 }
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471 }
472
e16c8765
AF
473 nthreads = len / sizeof(int);
474
8657ae28 475 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
6663a4fa
SW
476 bool avail;
477
8d089085 478 DBG(" thread %d -> cpu %d (hard id %d)\n",
ac13282d 479 j, cpu, be32_to_cpu(intserv[j]));
6663a4fa
SW
480
481 avail = of_device_is_available(dn);
482 if (!avail)
483 avail = !of_property_match_string(dn,
484 "enable-method", "spin-table");
485
486 set_cpu_present(cpu, avail);
ac13282d 487 set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
ea0f1cab 488 set_cpu_possible(cpu, true);
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489 cpu++;
490 }
491 }
492
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BH
493 /* If no SMT supported, nthreads is forced to 1 */
494 if (!cpu_has_feature(CPU_FTR_SMT)) {
495 DBG(" SMT disabled ! nthreads forced to 1\n");
496 nthreads = 1;
497 }
498
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499#ifdef CONFIG_PPC64
500 /*
501 * On pSeries LPAR, we need to know how many cpus
502 * could possibly be added to this partition.
503 */
0f2b3442 504 if (firmware_has_feature(FW_FEATURE_LPAR) &&
799d6046 505 (dn = of_find_node_by_path("/rtas"))) {
5ad57078 506 int num_addr_cell, num_size_cell, maxcpus;
01666c8e 507 const __be32 *ireg;
5ad57078 508
a8bda5dd 509 num_addr_cell = of_n_addr_cells(dn);
9213feea 510 num_size_cell = of_n_size_cells(dn);
5ad57078 511
e2eb6392 512 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
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513
514 if (!ireg)
515 goto out;
516
01666c8e 517 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
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518
519 /* Double maxcpus for processors which have SMT capability */
520 if (cpu_has_feature(CPU_FTR_SMT))
8d089085 521 maxcpus *= nthreads;
5ad57078 522
8657ae28 523 if (maxcpus > nr_cpu_ids) {
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524 printk(KERN_WARNING
525 "Partition configured for %d cpus, "
526 "operating system maximum is %d.\n",
8657ae28
MM
527 maxcpus, nr_cpu_ids);
528 maxcpus = nr_cpu_ids;
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529 } else
530 printk(KERN_INFO "Partition configured for %d cpus.\n",
531 maxcpus);
532
533 for (cpu = 0; cpu < maxcpus; cpu++)
ea0f1cab 534 set_cpu_possible(cpu, true);
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535 out:
536 of_node_put(dn);
537 }
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MT
538 vdso_data->processorCount = num_present_cpus();
539#endif /* CONFIG_PPC64 */
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540
541 /* Initialize CPU <=> thread mapping/
542 *
543 * WARNING: We assume that the number of threads is the same for
544 * every CPU in the system. If that is not the case, then some code
545 * here will have to be reworked
546 */
547 cpu_init_thread_core_maps(nthreads);
1426d5a3 548
c1854e00 549 /* Now that possible cpus are set, set nr_cpu_ids for later use */
aa79bc21 550 setup_nr_cpu_ids();
c1854e00 551
1426d5a3 552 free_unused_pacas();
d5a7430d 553}
5ad57078 554#endif /* CONFIG_SMP */
fca5dcd4 555
d33b78df 556#ifdef CONFIG_PCSPKR_PLATFORM
e5c6c8e4
MN
557static __init int add_pcspkr(void)
558{
559 struct device_node *np;
560 struct platform_device *pd;
561 int ret;
562
563 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
564 of_node_put(np);
565 if (!np)
566 return -ENODEV;
567
568 pd = platform_device_alloc("pcspkr", -1);
569 if (!pd)
570 return -ENOMEM;
571
572 ret = platform_device_add(pd);
573 if (ret)
574 platform_device_put(pd);
575
576 return ret;
577}
578device_initcall(add_pcspkr);
d33b78df 579#endif /* CONFIG_PCSPKR_PLATFORM */
95d465fd 580
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581void probe_machine(void)
582{
583 extern struct machdep_calls __machine_desc_start;
584 extern struct machdep_calls __machine_desc_end;
84b62c72 585 unsigned int i;
e8222502
BH
586
587 /*
588 * Iterate all ppc_md structures until we find the proper
589 * one for the current machine type
590 */
591 DBG("Probing machine type ...\n");
592
84b62c72
BH
593 /*
594 * Check ppc_md is empty, if not we have a bug, ie, we setup an
595 * entry before probe_machine() which will be overwritten
596 */
597 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
598 if (((void **)&ppc_md)[i]) {
599 printk(KERN_ERR "Entry %d in ppc_md non empty before"
600 " machine probe !\n", i);
601 }
602 }
603
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604 for (machine_id = &__machine_desc_start;
605 machine_id < &__machine_desc_end;
606 machine_id++) {
607 DBG(" %s ...", machine_id->name);
608 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
609 if (ppc_md.probe()) {
610 DBG(" match !\n");
611 break;
612 }
613 DBG("\n");
614 }
615 /* What can we do if we didn't find ? */
616 if (machine_id >= &__machine_desc_end) {
617 DBG("No suitable machine found !\n");
618 for (;;);
619 }
620
621 printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
622}
1269277a 623
8d8a0241 624/* Match a class of boards, not a specific device configuration. */
1269277a
DW
625int check_legacy_ioport(unsigned long base_port)
626{
8d8a0241
OH
627 struct device_node *parent, *np = NULL;
628 int ret = -ENODEV;
629
630 switch(base_port) {
631 case I8042_DATA_REG:
db0dbae9
WF
632 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
633 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
634 if (np) {
635 parent = of_get_parent(np);
540c6c39
MW
636
637 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
638 if (!of_i8042_kbd_irq)
639 of_i8042_kbd_irq = 1;
640
641 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
642 if (!of_i8042_aux_irq)
643 of_i8042_aux_irq = 12;
644
db0dbae9
WF
645 of_node_put(np);
646 np = parent;
647 break;
648 }
8d8a0241 649 np = of_find_node_by_type(NULL, "8042");
f5d834fc
AC
650 /* Pegasos has no device_type on its 8042 node, look for the
651 * name instead */
652 if (!np)
653 np = of_find_node_by_name(NULL, "8042");
2c78027a
GP
654 if (np) {
655 of_i8042_kbd_irq = 1;
656 of_i8042_aux_irq = 12;
657 }
8d8a0241
OH
658 break;
659 case FDC_BASE: /* FDC1 */
660 np = of_find_node_by_type(NULL, "fdc");
661 break;
8d8a0241
OH
662 default:
663 /* ipmi is supposed to fail here */
664 break;
665 }
666 if (!np)
667 return ret;
668 parent = of_get_parent(np);
669 if (parent) {
670 if (strcmp(parent->type, "isa") == 0)
671 ret = 0;
672 of_node_put(parent);
673 }
674 of_node_put(np);
675 return ret;
1269277a
DW
676}
677EXPORT_SYMBOL(check_legacy_ioport);
7e990266
KG
678
679static int ppc_panic_event(struct notifier_block *this,
680 unsigned long event, void *ptr)
681{
ebaeb5ae
MS
682 /*
683 * If firmware-assisted dump has been registered then trigger
684 * firmware-assisted dump and let firmware handle everything else.
685 */
686 crash_fadump(NULL, ptr);
7e990266
KG
687 ppc_md.panic(ptr); /* May not return */
688 return NOTIFY_DONE;
689}
690
691static struct notifier_block ppc_panic_block = {
692 .notifier_call = ppc_panic_event,
693 .priority = INT_MIN /* may not return; must be done last */
694};
695
696void __init setup_panic(void)
697{
f7b9ebb7
BH
698 if (!ppc_md.panic)
699 return;
7e990266
KG
700 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
701}
06cce43c
DF
702
703#ifdef CONFIG_CHECK_CACHE_COHERENCY
704/*
705 * For platforms that have configurable cache-coherency. This function
706 * checks that the cache coherency setting of the kernel matches the setting
707 * left by the firmware, as indicated in the device tree. Since a mismatch
708 * will eventually result in DMA failures, we print * and error and call
709 * BUG() in that case.
710 */
711
712#ifdef CONFIG_NOT_COHERENT_CACHE
713#define KERNEL_COHERENCY 0
714#else
715#define KERNEL_COHERENCY 1
716#endif
717
718static int __init check_cache_coherency(void)
719{
720 struct device_node *np;
721 const void *prop;
722 int devtree_coherency;
723
724 np = of_find_node_by_path("/");
725 prop = of_get_property(np, "coherency-off", NULL);
726 of_node_put(np);
727
728 devtree_coherency = prop ? 0 : 1;
729
730 if (devtree_coherency != KERNEL_COHERENCY) {
731 printk(KERN_ERR
732 "kernel coherency:%s != device tree_coherency:%s\n",
733 KERNEL_COHERENCY ? "on" : "off",
734 devtree_coherency ? "on" : "off");
735 BUG();
736 }
737
738 return 0;
739}
740
741late_initcall(check_cache_coherency);
742#endif /* CONFIG_CHECK_CACHE_COHERENCY */
94a3807c
ME
743
744#ifdef CONFIG_DEBUG_FS
745struct dentry *powerpc_debugfs_root;
907b1f45 746EXPORT_SYMBOL(powerpc_debugfs_root);
94a3807c
ME
747
748static int powerpc_debugfs_init(void)
749{
750 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
751
752 return powerpc_debugfs_root == NULL;
753}
754arch_initcall(powerpc_debugfs_init);
755#endif
d746286c 756
a9c0f41b 757void ppc_printk_progress(char *s, unsigned short hex)
d746286c 758{
a9c0f41b 759 pr_info("%s\n", s);
d746286c
KG
760}
761
314b02f5 762void arch_setup_pdev_archdata(struct platform_device *pdev)
d746286c 763{
314b02f5
KG
764 pdev->archdata.dma_mask = DMA_BIT_MASK(32);
765 pdev->dev.dma_mask = &pdev->archdata.dma_mask;
766 set_dma_ops(&pdev->dev, &dma_direct_ops);
d746286c 767}
b1923caa
BH
768
769static __init void print_system_info(void)
770{
771 pr_info("-----------------------------------------------------\n");
772#ifdef CONFIG_PPC_STD_MMU_64
773 pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
774#endif
775#ifdef CONFIG_PPC_STD_MMU_32
776 pr_info("Hash_size = 0x%lx\n", Hash_size);
777#endif
778 pr_info("phys_mem_size = 0x%llx\n",
779 (unsigned long long)memblock_phys_mem_size());
780
781 pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
782 pr_info("icache_bsize = 0x%x\n", icache_bsize);
783 if (ucache_bsize != 0)
784 pr_info("ucache_bsize = 0x%x\n", ucache_bsize);
785
786 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
787 pr_info(" possible = 0x%016lx\n",
788 (unsigned long)CPU_FTRS_POSSIBLE);
789 pr_info(" always = 0x%016lx\n",
790 (unsigned long)CPU_FTRS_ALWAYS);
791 pr_info("cpu_user_features = 0x%08x 0x%08x\n",
792 cur_cpu_spec->cpu_user_features,
793 cur_cpu_spec->cpu_user_features2);
794 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
795#ifdef CONFIG_PPC64
796 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
797#endif
798
799#ifdef CONFIG_PPC_STD_MMU_64
800 if (htab_address)
801 pr_info("htab_address = 0x%p\n", htab_address);
802 if (htab_hash_mask)
803 pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask);
804#endif
805#ifdef CONFIG_PPC_STD_MMU_32
806 if (Hash)
807 pr_info("Hash = 0x%p\n", Hash);
808 if (Hash_mask)
809 pr_info("Hash_mask = 0x%lx\n", Hash_mask);
810#endif
811
812 if (PHYSICAL_START > 0)
813 pr_info("physical_start = 0x%llx\n",
814 (unsigned long long)PHYSICAL_START);
815 pr_info("-----------------------------------------------------\n");
816}
817
818/*
819 * Called into from start_kernel this initializes memblock, which is used
820 * to manage page allocation until mem_init is called.
821 */
822void __init setup_arch(char **cmdline_p)
823{
824 *cmdline_p = boot_command_line;
825
826 /* Set a half-reasonable default so udelay does something sensible */
827 loops_per_jiffy = 500000000 / HZ;
828
829 /* Unflatten the device-tree passed by prom_init or kexec */
830 unflatten_device_tree();
831
832 /*
833 * Initialize cache line/block info from device-tree (on ppc64) or
834 * just cputable (on ppc32).
835 */
836 initialize_cache_info();
837
838 /* Initialize RTAS if available. */
839 rtas_initialize();
840
841 /* Check if we have an initrd provided via the device-tree. */
842 check_for_initrd();
843
844 /* Probe the machine type, establish ppc_md. */
845 probe_machine();
846
847 /* Setup panic notifier if requested by the platform. */
848 setup_panic();
849
850 /*
851 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
852 * it from their respective probe() function.
853 */
854 setup_power_save();
855
856 /* Discover standard serial ports. */
857 find_legacy_serial_ports();
858
859 /* Register early console with the printk subsystem. */
860 register_early_udbg_console();
861
862 /* Setup the various CPU maps based on the device-tree. */
863 smp_setup_cpu_maps();
864
865 /* Initialize xmon. */
866 xmon_setup();
867
868 /* Check the SMT related command line arguments (ppc64). */
869 check_smt_enabled();
870
871 /* On BookE, setup per-core TLB data structures. */
872 setup_tlb_core_data();
873
874 /*
875 * Release secondary cpus out of their spinloops at 0x60 now that
876 * we can map physical -> logical CPU ids.
877 *
878 * Freescale Book3e parts spin in a loop provided by firmware,
879 * so smp_release_cpus() does nothing for them.
880 */
881#ifdef CONFIG_SMP
882 smp_release_cpus();
883#endif
884
885 /* Print various info about the machine that has been gathered so far. */
886 print_system_info();
887
888 /* Reserve large chunks of memory for use by CMA for KVM. */
889 kvm_cma_reserve();
890
891 /*
892 * Reserve any gigantic pages requested on the command line.
893 * memblock needs to have been initialized by the time this is
894 * called since this will reserve memory.
895 */
896 reserve_hugetlb_gpages();
897
898 klp_init_thread_info(&init_thread_info);
899
900 init_mm.start_code = (unsigned long)_stext;
901 init_mm.end_code = (unsigned long) _etext;
902 init_mm.end_data = (unsigned long) _edata;
903 init_mm.brk = klimit;
904#ifdef CONFIG_PPC_64K_PAGES
905 init_mm.context.pte_frag = NULL;
906#endif
907#ifdef CONFIG_SPAPR_TCE_IOMMU
908 mm_iommu_init(&init_mm.context);
909#endif
910 irqstack_early_init();
911 exc_lvl_early_init();
912 emergency_stack_init();
913
914 initmem_init();
915
916#ifdef CONFIG_DUMMY_CONSOLE
917 conswitchp = &dummy_con;
918#endif
919 if (ppc_md.setup_arch)
920 ppc_md.setup_arch();
921
922 paging_init();
923
924 /* Initialize the MMU context management stuff. */
925 mmu_context_init();
926
927#ifdef CONFIG_PPC64
928 /* Interrupt code needs to be 64K-aligned. */
929 if ((unsigned long)_stext & 0xffff)
930 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
931 (unsigned long)_stext);
932#endif
933}