Commit | Line | Data |
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03501dab PM |
1 | /* |
2 | * Common boot and setup code for both 32-bit and 64-bit. | |
3 | * Extracted from arch/powerpc/kernel/setup_64.c. | |
4 | * | |
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
e8222502 BH |
12 | |
13 | #undef DEBUG | |
14 | ||
03501dab PM |
15 | #include <linux/module.h> |
16 | #include <linux/string.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/reboot.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/initrd.h> | |
e5c6c8e4 | 23 | #include <linux/platform_device.h> |
03501dab PM |
24 | #include <linux/seq_file.h> |
25 | #include <linux/ioport.h> | |
26 | #include <linux/console.h> | |
894673ee | 27 | #include <linux/screen_info.h> |
03501dab PM |
28 | #include <linux/root_dev.h> |
29 | #include <linux/notifier.h> | |
30 | #include <linux/cpu.h> | |
31 | #include <linux/unistd.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/serial_8250.h> | |
94a3807c | 34 | #include <linux/debugfs.h> |
8d089085 | 35 | #include <linux/percpu.h> |
d9b2b2a2 | 36 | #include <linux/lmb.h> |
d746286c | 37 | #include <linux/of_platform.h> |
03501dab | 38 | #include <asm/io.h> |
1426d5a3 | 39 | #include <asm/paca.h> |
03501dab PM |
40 | #include <asm/prom.h> |
41 | #include <asm/processor.h> | |
a7f290da | 42 | #include <asm/vdso_datapage.h> |
03501dab | 43 | #include <asm/pgtable.h> |
03501dab PM |
44 | #include <asm/smp.h> |
45 | #include <asm/elf.h> | |
46 | #include <asm/machdep.h> | |
47 | #include <asm/time.h> | |
48 | #include <asm/cputable.h> | |
49 | #include <asm/sections.h> | |
e8222502 | 50 | #include <asm/firmware.h> |
03501dab PM |
51 | #include <asm/btext.h> |
52 | #include <asm/nvram.h> | |
53 | #include <asm/setup.h> | |
54 | #include <asm/system.h> | |
55 | #include <asm/rtas.h> | |
56 | #include <asm/iommu.h> | |
57 | #include <asm/serial.h> | |
58 | #include <asm/cache.h> | |
59 | #include <asm/page.h> | |
60 | #include <asm/mmu.h> | |
fca5dcd4 | 61 | #include <asm/xmon.h> |
8d089085 | 62 | #include <asm/cputhreads.h> |
f465df81 | 63 | #include <mm/mmu_decl.h> |
03501dab | 64 | |
66ba135c SR |
65 | #include "setup.h" |
66 | ||
03501dab | 67 | #ifdef DEBUG |
f9e4ec57 | 68 | #include <asm/udbg.h> |
03501dab PM |
69 | #define DBG(fmt...) udbg_printf(fmt) |
70 | #else | |
71 | #define DBG(fmt...) | |
72 | #endif | |
73 | ||
e8222502 BH |
74 | /* The main machine-dep calls structure |
75 | */ | |
76 | struct machdep_calls ppc_md; | |
77 | EXPORT_SYMBOL(ppc_md); | |
78 | struct machdep_calls *machine_id; | |
79 | EXPORT_SYMBOL(machine_id); | |
799d6046 | 80 | |
49b09853 PM |
81 | unsigned long klimit = (unsigned long) _end; |
82 | ||
19a8d97d SR |
83 | char cmd_line[COMMAND_LINE_SIZE]; |
84 | ||
03501dab PM |
85 | /* |
86 | * This still seems to be needed... -- paulus | |
87 | */ | |
88 | struct screen_info screen_info = { | |
89 | .orig_x = 0, | |
90 | .orig_y = 25, | |
91 | .orig_video_cols = 80, | |
92 | .orig_video_lines = 25, | |
93 | .orig_video_isVGA = 1, | |
94 | .orig_video_points = 16 | |
95 | }; | |
96 | ||
97 | #ifdef __DO_IRQ_CANON | |
98 | /* XXX should go elsewhere eventually */ | |
99 | int ppc_do_canonicalize_irqs; | |
100 | EXPORT_SYMBOL(ppc_do_canonicalize_irqs); | |
101 | #endif | |
102 | ||
103 | /* also used by kexec */ | |
104 | void machine_shutdown(void) | |
105 | { | |
3d1229d6 ME |
106 | if (ppc_md.machine_shutdown) |
107 | ppc_md.machine_shutdown(); | |
03501dab PM |
108 | } |
109 | ||
110 | void machine_restart(char *cmd) | |
111 | { | |
112 | machine_shutdown(); | |
b8e383d5 KG |
113 | if (ppc_md.restart) |
114 | ppc_md.restart(cmd); | |
03501dab PM |
115 | #ifdef CONFIG_SMP |
116 | smp_send_stop(); | |
117 | #endif | |
118 | printk(KERN_EMERG "System Halted, OK to turn off power\n"); | |
119 | local_irq_disable(); | |
120 | while (1) ; | |
121 | } | |
122 | ||
123 | void machine_power_off(void) | |
124 | { | |
125 | machine_shutdown(); | |
b8e383d5 KG |
126 | if (ppc_md.power_off) |
127 | ppc_md.power_off(); | |
03501dab PM |
128 | #ifdef CONFIG_SMP |
129 | smp_send_stop(); | |
130 | #endif | |
131 | printk(KERN_EMERG "System Halted, OK to turn off power\n"); | |
132 | local_irq_disable(); | |
133 | while (1) ; | |
134 | } | |
135 | /* Used by the G5 thermal driver */ | |
136 | EXPORT_SYMBOL_GPL(machine_power_off); | |
137 | ||
138 | void (*pm_power_off)(void) = machine_power_off; | |
139 | EXPORT_SYMBOL_GPL(pm_power_off); | |
140 | ||
141 | void machine_halt(void) | |
142 | { | |
143 | machine_shutdown(); | |
b8e383d5 KG |
144 | if (ppc_md.halt) |
145 | ppc_md.halt(); | |
03501dab PM |
146 | #ifdef CONFIG_SMP |
147 | smp_send_stop(); | |
148 | #endif | |
149 | printk(KERN_EMERG "System Halted, OK to turn off power\n"); | |
150 | local_irq_disable(); | |
151 | while (1) ; | |
152 | } | |
153 | ||
154 | ||
155 | #ifdef CONFIG_TAU | |
156 | extern u32 cpu_temp(unsigned long cpu); | |
157 | extern u32 cpu_temp_both(unsigned long cpu); | |
158 | #endif /* CONFIG_TAU */ | |
159 | ||
160 | #ifdef CONFIG_SMP | |
6b7487fc | 161 | DEFINE_PER_CPU(unsigned int, cpu_pvr); |
03501dab PM |
162 | #endif |
163 | ||
2c2df038 AB |
164 | static void show_cpuinfo_summary(struct seq_file *m) |
165 | { | |
166 | struct device_node *root; | |
167 | const char *model = NULL; | |
168 | #if defined(CONFIG_SMP) && defined(CONFIG_PPC32) | |
169 | unsigned long bogosum = 0; | |
170 | int i; | |
171 | for_each_online_cpu(i) | |
172 | bogosum += loops_per_jiffy; | |
173 | seq_printf(m, "total bogomips\t: %lu.%02lu\n", | |
174 | bogosum/(500000/HZ), bogosum/(5000/HZ) % 100); | |
175 | #endif /* CONFIG_SMP && CONFIG_PPC32 */ | |
176 | seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq); | |
177 | if (ppc_md.name) | |
178 | seq_printf(m, "platform\t: %s\n", ppc_md.name); | |
179 | root = of_find_node_by_path("/"); | |
180 | if (root) | |
181 | model = of_get_property(root, "model", NULL); | |
182 | if (model) | |
183 | seq_printf(m, "model\t\t: %s\n", model); | |
184 | of_node_put(root); | |
185 | ||
186 | if (ppc_md.show_cpuinfo != NULL) | |
187 | ppc_md.show_cpuinfo(m); | |
188 | ||
189 | #ifdef CONFIG_PPC32 | |
190 | /* Display the amount of memory */ | |
191 | seq_printf(m, "Memory\t\t: %d MB\n", | |
192 | (unsigned int)(total_memory / (1024 * 1024))); | |
193 | #endif | |
194 | } | |
195 | ||
03501dab PM |
196 | static int show_cpuinfo(struct seq_file *m, void *v) |
197 | { | |
198 | unsigned long cpu_id = (unsigned long)v - 1; | |
199 | unsigned int pvr; | |
200 | unsigned short maj; | |
201 | unsigned short min; | |
202 | ||
203 | if (cpu_id == NR_CPUS) { | |
2c2df038 | 204 | show_cpuinfo_summary(m); |
03501dab PM |
205 | return 0; |
206 | } | |
207 | ||
208 | /* We only show online cpus: disable preempt (overzealous, I | |
209 | * knew) to prevent cpu going down. */ | |
210 | preempt_disable(); | |
211 | if (!cpu_online(cpu_id)) { | |
212 | preempt_enable(); | |
213 | return 0; | |
214 | } | |
215 | ||
216 | #ifdef CONFIG_SMP | |
6b7487fc | 217 | pvr = per_cpu(cpu_pvr, cpu_id); |
03501dab PM |
218 | #else |
219 | pvr = mfspr(SPRN_PVR); | |
220 | #endif | |
221 | maj = (pvr >> 8) & 0xFF; | |
222 | min = pvr & 0xFF; | |
223 | ||
224 | seq_printf(m, "processor\t: %lu\n", cpu_id); | |
225 | seq_printf(m, "cpu\t\t: "); | |
226 | ||
227 | if (cur_cpu_spec->pvr_mask) | |
228 | seq_printf(m, "%s", cur_cpu_spec->cpu_name); | |
229 | else | |
230 | seq_printf(m, "unknown (%08x)", pvr); | |
231 | ||
232 | #ifdef CONFIG_ALTIVEC | |
233 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | |
234 | seq_printf(m, ", altivec supported"); | |
235 | #endif /* CONFIG_ALTIVEC */ | |
236 | ||
237 | seq_printf(m, "\n"); | |
238 | ||
239 | #ifdef CONFIG_TAU | |
240 | if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) { | |
241 | #ifdef CONFIG_TAU_AVERAGE | |
242 | /* more straightforward, but potentially misleading */ | |
243 | seq_printf(m, "temperature \t: %u C (uncalibrated)\n", | |
bccfd588 | 244 | cpu_temp(cpu_id)); |
03501dab PM |
245 | #else |
246 | /* show the actual temp sensor range */ | |
247 | u32 temp; | |
bccfd588 | 248 | temp = cpu_temp_both(cpu_id); |
03501dab PM |
249 | seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n", |
250 | temp & 0xff, temp >> 16); | |
251 | #endif | |
252 | } | |
253 | #endif /* CONFIG_TAU */ | |
254 | ||
255 | /* | |
256 | * Assume here that all clock rates are the same in a | |
257 | * smp system. -- Cort | |
258 | */ | |
259 | if (ppc_proc_freq) | |
260 | seq_printf(m, "clock\t\t: %lu.%06luMHz\n", | |
261 | ppc_proc_freq / 1000000, ppc_proc_freq % 1000000); | |
262 | ||
263 | if (ppc_md.show_percpuinfo != NULL) | |
264 | ppc_md.show_percpuinfo(m, cpu_id); | |
265 | ||
266 | /* If we are a Freescale core do a simple check so | |
267 | * we dont have to keep adding cases in the future */ | |
268 | if (PVR_VER(pvr) & 0x8000) { | |
a501d8f3 ML |
269 | switch (PVR_VER(pvr)) { |
270 | case 0x8000: /* 7441/7450/7451, Voyager */ | |
271 | case 0x8001: /* 7445/7455, Apollo 6 */ | |
272 | case 0x8002: /* 7447/7457, Apollo 7 */ | |
273 | case 0x8003: /* 7447A, Apollo 7 PM */ | |
274 | case 0x8004: /* 7448, Apollo 8 */ | |
275 | case 0x800c: /* 7410, Nitro */ | |
276 | maj = ((pvr >> 8) & 0xF); | |
277 | min = PVR_MIN(pvr); | |
278 | break; | |
279 | default: /* e500/book-e */ | |
280 | maj = PVR_MAJ(pvr); | |
281 | min = PVR_MIN(pvr); | |
282 | break; | |
283 | } | |
03501dab PM |
284 | } else { |
285 | switch (PVR_VER(pvr)) { | |
286 | case 0x0020: /* 403 family */ | |
287 | maj = PVR_MAJ(pvr) + 1; | |
288 | min = PVR_MIN(pvr); | |
289 | break; | |
290 | case 0x1008: /* 740P/750P ?? */ | |
291 | maj = ((pvr >> 8) & 0xFF) - 1; | |
292 | min = pvr & 0xFF; | |
293 | break; | |
294 | default: | |
295 | maj = (pvr >> 8) & 0xFF; | |
296 | min = pvr & 0xFF; | |
297 | break; | |
298 | } | |
299 | } | |
300 | ||
301 | seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n", | |
302 | maj, min, PVR_VER(pvr), PVR_REV(pvr)); | |
303 | ||
304 | #ifdef CONFIG_PPC32 | |
305 | seq_printf(m, "bogomips\t: %lu.%02lu\n", | |
306 | loops_per_jiffy / (500000/HZ), | |
307 | (loops_per_jiffy / (5000/HZ)) % 100); | |
308 | #endif | |
309 | ||
310 | #ifdef CONFIG_SMP | |
311 | seq_printf(m, "\n"); | |
312 | #endif | |
313 | ||
314 | preempt_enable(); | |
315 | return 0; | |
316 | } | |
317 | ||
318 | static void *c_start(struct seq_file *m, loff_t *pos) | |
319 | { | |
320 | unsigned long i = *pos; | |
321 | ||
322 | return i <= NR_CPUS ? (void *)(i + 1) : NULL; | |
323 | } | |
324 | ||
325 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
326 | { | |
327 | ++*pos; | |
328 | return c_start(m, pos); | |
329 | } | |
330 | ||
331 | static void c_stop(struct seq_file *m, void *v) | |
332 | { | |
333 | } | |
334 | ||
88e9d34c | 335 | const struct seq_operations cpuinfo_op = { |
03501dab PM |
336 | .start =c_start, |
337 | .next = c_next, | |
338 | .stop = c_stop, | |
339 | .show = show_cpuinfo, | |
340 | }; | |
341 | ||
a82765b6 DW |
342 | void __init check_for_initrd(void) |
343 | { | |
344 | #ifdef CONFIG_BLK_DEV_INITRD | |
30437b3e DG |
345 | DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n", |
346 | initrd_start, initrd_end); | |
a82765b6 DW |
347 | |
348 | /* If we were passed an initrd, set the ROOT_DEV properly if the values | |
349 | * look sensible. If not, clear initrd reference. | |
350 | */ | |
51fae6de | 351 | if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) && |
a82765b6 DW |
352 | initrd_end > initrd_start) |
353 | ROOT_DEV = Root_RAM0; | |
6761c4a0 | 354 | else |
a82765b6 | 355 | initrd_start = initrd_end = 0; |
a82765b6 DW |
356 | |
357 | if (initrd_start) | |
358 | printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end); | |
359 | ||
360 | DBG(" <- check_for_initrd()\n"); | |
361 | #endif /* CONFIG_BLK_DEV_INITRD */ | |
362 | } | |
363 | ||
5ad57078 PM |
364 | #ifdef CONFIG_SMP |
365 | ||
8d089085 BH |
366 | int threads_per_core, threads_shift; |
367 | cpumask_t threads_core_mask; | |
368 | ||
369 | static void __init cpu_init_thread_core_maps(int tpc) | |
370 | { | |
371 | int i; | |
372 | ||
373 | threads_per_core = tpc; | |
374 | threads_core_mask = CPU_MASK_NONE; | |
375 | ||
376 | /* This implementation only supports power of 2 number of threads | |
377 | * for simplicity and performance | |
378 | */ | |
379 | threads_shift = ilog2(tpc); | |
380 | BUG_ON(tpc != (1 << threads_shift)); | |
381 | ||
382 | for (i = 0; i < tpc; i++) | |
383 | cpu_set(i, threads_core_mask); | |
384 | ||
385 | printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n", | |
386 | tpc, tpc > 1 ? "s" : ""); | |
387 | printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift); | |
388 | } | |
389 | ||
390 | ||
5ad57078 PM |
391 | /** |
392 | * setup_cpu_maps - initialize the following cpu maps: | |
393 | * cpu_possible_map | |
394 | * cpu_present_map | |
5ad57078 PM |
395 | * |
396 | * Having the possible map set up early allows us to restrict allocations | |
397 | * of things like irqstacks to num_possible_cpus() rather than NR_CPUS. | |
398 | * | |
399 | * We do not initialize the online map here; cpus set their own bits in | |
400 | * cpu_online_map as they come up. | |
401 | * | |
402 | * This function is valid only for Open Firmware systems. finish_device_tree | |
403 | * must be called before using this. | |
404 | * | |
405 | * While we're here, we may as well set the "physical" cpu ids in the paca. | |
4df20460 AB |
406 | * |
407 | * NOTE: This must match the parsing done in early_init_dt_scan_cpus. | |
5ad57078 PM |
408 | */ |
409 | void __init smp_setup_cpu_maps(void) | |
410 | { | |
411 | struct device_node *dn = NULL; | |
412 | int cpu = 0; | |
8d089085 BH |
413 | int nthreads = 1; |
414 | ||
415 | DBG("smp_setup_cpu_maps()\n"); | |
5ad57078 PM |
416 | |
417 | while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < NR_CPUS) { | |
a7f67bdf | 418 | const int *intserv; |
8d089085 BH |
419 | int j, len; |
420 | ||
421 | DBG(" * %s...\n", dn->full_name); | |
5ad57078 | 422 | |
e2eb6392 SR |
423 | intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", |
424 | &len); | |
8d089085 | 425 | if (intserv) { |
5ad57078 | 426 | nthreads = len / sizeof(int); |
8d089085 BH |
427 | DBG(" ibm,ppc-interrupt-server#s -> %d threads\n", |
428 | nthreads); | |
429 | } else { | |
430 | DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n"); | |
e2eb6392 | 431 | intserv = of_get_property(dn, "reg", NULL); |
5ad57078 PM |
432 | if (!intserv) |
433 | intserv = &cpu; /* assume logical == phys */ | |
434 | } | |
435 | ||
436 | for (j = 0; j < nthreads && cpu < NR_CPUS; j++) { | |
8d089085 BH |
437 | DBG(" thread %d -> cpu %d (hard id %d)\n", |
438 | j, cpu, intserv[j]); | |
ea0f1cab | 439 | set_cpu_present(cpu, true); |
5ad57078 | 440 | set_hard_smp_processor_id(cpu, intserv[j]); |
ea0f1cab | 441 | set_cpu_possible(cpu, true); |
5ad57078 PM |
442 | cpu++; |
443 | } | |
444 | } | |
445 | ||
8d089085 BH |
446 | /* If no SMT supported, nthreads is forced to 1 */ |
447 | if (!cpu_has_feature(CPU_FTR_SMT)) { | |
448 | DBG(" SMT disabled ! nthreads forced to 1\n"); | |
449 | nthreads = 1; | |
450 | } | |
451 | ||
5ad57078 PM |
452 | #ifdef CONFIG_PPC64 |
453 | /* | |
454 | * On pSeries LPAR, we need to know how many cpus | |
455 | * could possibly be added to this partition. | |
456 | */ | |
e8222502 | 457 | if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) && |
799d6046 | 458 | (dn = of_find_node_by_path("/rtas"))) { |
5ad57078 | 459 | int num_addr_cell, num_size_cell, maxcpus; |
a7f67bdf | 460 | const unsigned int *ireg; |
5ad57078 | 461 | |
a8bda5dd | 462 | num_addr_cell = of_n_addr_cells(dn); |
9213feea | 463 | num_size_cell = of_n_size_cells(dn); |
5ad57078 | 464 | |
e2eb6392 | 465 | ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL); |
5ad57078 PM |
466 | |
467 | if (!ireg) | |
468 | goto out; | |
469 | ||
470 | maxcpus = ireg[num_addr_cell + num_size_cell]; | |
471 | ||
472 | /* Double maxcpus for processors which have SMT capability */ | |
473 | if (cpu_has_feature(CPU_FTR_SMT)) | |
8d089085 | 474 | maxcpus *= nthreads; |
5ad57078 PM |
475 | |
476 | if (maxcpus > NR_CPUS) { | |
477 | printk(KERN_WARNING | |
478 | "Partition configured for %d cpus, " | |
479 | "operating system maximum is %d.\n", | |
480 | maxcpus, NR_CPUS); | |
481 | maxcpus = NR_CPUS; | |
482 | } else | |
483 | printk(KERN_INFO "Partition configured for %d cpus.\n", | |
484 | maxcpus); | |
485 | ||
486 | for (cpu = 0; cpu < maxcpus; cpu++) | |
ea0f1cab | 487 | set_cpu_possible(cpu, true); |
5ad57078 PM |
488 | out: |
489 | of_node_put(dn); | |
490 | } | |
d5a7430d MT |
491 | vdso_data->processorCount = num_present_cpus(); |
492 | #endif /* CONFIG_PPC64 */ | |
8d089085 BH |
493 | |
494 | /* Initialize CPU <=> thread mapping/ | |
495 | * | |
496 | * WARNING: We assume that the number of threads is the same for | |
497 | * every CPU in the system. If that is not the case, then some code | |
498 | * here will have to be reworked | |
499 | */ | |
500 | cpu_init_thread_core_maps(nthreads); | |
1426d5a3 ME |
501 | |
502 | free_unused_pacas(); | |
d5a7430d | 503 | } |
5ad57078 | 504 | #endif /* CONFIG_SMP */ |
fca5dcd4 | 505 | |
d33b78df | 506 | #ifdef CONFIG_PCSPKR_PLATFORM |
e5c6c8e4 MN |
507 | static __init int add_pcspkr(void) |
508 | { | |
509 | struct device_node *np; | |
510 | struct platform_device *pd; | |
511 | int ret; | |
512 | ||
513 | np = of_find_compatible_node(NULL, NULL, "pnpPNP,100"); | |
514 | of_node_put(np); | |
515 | if (!np) | |
516 | return -ENODEV; | |
517 | ||
518 | pd = platform_device_alloc("pcspkr", -1); | |
519 | if (!pd) | |
520 | return -ENOMEM; | |
521 | ||
522 | ret = platform_device_add(pd); | |
523 | if (ret) | |
524 | platform_device_put(pd); | |
525 | ||
526 | return ret; | |
527 | } | |
528 | device_initcall(add_pcspkr); | |
d33b78df | 529 | #endif /* CONFIG_PCSPKR_PLATFORM */ |
95d465fd | 530 | |
e8222502 BH |
531 | void probe_machine(void) |
532 | { | |
533 | extern struct machdep_calls __machine_desc_start; | |
534 | extern struct machdep_calls __machine_desc_end; | |
535 | ||
536 | /* | |
537 | * Iterate all ppc_md structures until we find the proper | |
538 | * one for the current machine type | |
539 | */ | |
540 | DBG("Probing machine type ...\n"); | |
541 | ||
542 | for (machine_id = &__machine_desc_start; | |
543 | machine_id < &__machine_desc_end; | |
544 | machine_id++) { | |
545 | DBG(" %s ...", machine_id->name); | |
546 | memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls)); | |
547 | if (ppc_md.probe()) { | |
548 | DBG(" match !\n"); | |
549 | break; | |
550 | } | |
551 | DBG("\n"); | |
552 | } | |
553 | /* What can we do if we didn't find ? */ | |
554 | if (machine_id >= &__machine_desc_end) { | |
555 | DBG("No suitable machine found !\n"); | |
556 | for (;;); | |
557 | } | |
558 | ||
559 | printk(KERN_INFO "Using %s machine description\n", ppc_md.name); | |
560 | } | |
1269277a | 561 | |
8d8a0241 | 562 | /* Match a class of boards, not a specific device configuration. */ |
1269277a DW |
563 | int check_legacy_ioport(unsigned long base_port) |
564 | { | |
8d8a0241 OH |
565 | struct device_node *parent, *np = NULL; |
566 | int ret = -ENODEV; | |
567 | ||
568 | switch(base_port) { | |
569 | case I8042_DATA_REG: | |
db0dbae9 WF |
570 | if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303"))) |
571 | np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03"); | |
572 | if (np) { | |
573 | parent = of_get_parent(np); | |
574 | of_node_put(np); | |
575 | np = parent; | |
576 | break; | |
577 | } | |
8d8a0241 | 578 | np = of_find_node_by_type(NULL, "8042"); |
f5d834fc AC |
579 | /* Pegasos has no device_type on its 8042 node, look for the |
580 | * name instead */ | |
581 | if (!np) | |
582 | np = of_find_node_by_name(NULL, "8042"); | |
8d8a0241 OH |
583 | break; |
584 | case FDC_BASE: /* FDC1 */ | |
585 | np = of_find_node_by_type(NULL, "fdc"); | |
586 | break; | |
587 | #ifdef CONFIG_PPC_PREP | |
588 | case _PIDXR: | |
589 | case _PNPWRP: | |
590 | case PNPBIOS_BASE: | |
591 | /* implement me */ | |
592 | #endif | |
593 | default: | |
594 | /* ipmi is supposed to fail here */ | |
595 | break; | |
596 | } | |
597 | if (!np) | |
598 | return ret; | |
599 | parent = of_get_parent(np); | |
600 | if (parent) { | |
601 | if (strcmp(parent->type, "isa") == 0) | |
602 | ret = 0; | |
603 | of_node_put(parent); | |
604 | } | |
605 | of_node_put(np); | |
606 | return ret; | |
1269277a DW |
607 | } |
608 | EXPORT_SYMBOL(check_legacy_ioport); | |
7e990266 KG |
609 | |
610 | static int ppc_panic_event(struct notifier_block *this, | |
611 | unsigned long event, void *ptr) | |
612 | { | |
613 | ppc_md.panic(ptr); /* May not return */ | |
614 | return NOTIFY_DONE; | |
615 | } | |
616 | ||
617 | static struct notifier_block ppc_panic_block = { | |
618 | .notifier_call = ppc_panic_event, | |
619 | .priority = INT_MIN /* may not return; must be done last */ | |
620 | }; | |
621 | ||
622 | void __init setup_panic(void) | |
623 | { | |
624 | atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); | |
625 | } | |
06cce43c DF |
626 | |
627 | #ifdef CONFIG_CHECK_CACHE_COHERENCY | |
628 | /* | |
629 | * For platforms that have configurable cache-coherency. This function | |
630 | * checks that the cache coherency setting of the kernel matches the setting | |
631 | * left by the firmware, as indicated in the device tree. Since a mismatch | |
632 | * will eventually result in DMA failures, we print * and error and call | |
633 | * BUG() in that case. | |
634 | */ | |
635 | ||
636 | #ifdef CONFIG_NOT_COHERENT_CACHE | |
637 | #define KERNEL_COHERENCY 0 | |
638 | #else | |
639 | #define KERNEL_COHERENCY 1 | |
640 | #endif | |
641 | ||
642 | static int __init check_cache_coherency(void) | |
643 | { | |
644 | struct device_node *np; | |
645 | const void *prop; | |
646 | int devtree_coherency; | |
647 | ||
648 | np = of_find_node_by_path("/"); | |
649 | prop = of_get_property(np, "coherency-off", NULL); | |
650 | of_node_put(np); | |
651 | ||
652 | devtree_coherency = prop ? 0 : 1; | |
653 | ||
654 | if (devtree_coherency != KERNEL_COHERENCY) { | |
655 | printk(KERN_ERR | |
656 | "kernel coherency:%s != device tree_coherency:%s\n", | |
657 | KERNEL_COHERENCY ? "on" : "off", | |
658 | devtree_coherency ? "on" : "off"); | |
659 | BUG(); | |
660 | } | |
661 | ||
662 | return 0; | |
663 | } | |
664 | ||
665 | late_initcall(check_cache_coherency); | |
666 | #endif /* CONFIG_CHECK_CACHE_COHERENCY */ | |
94a3807c ME |
667 | |
668 | #ifdef CONFIG_DEBUG_FS | |
669 | struct dentry *powerpc_debugfs_root; | |
907b1f45 | 670 | EXPORT_SYMBOL(powerpc_debugfs_root); |
94a3807c ME |
671 | |
672 | static int powerpc_debugfs_init(void) | |
673 | { | |
674 | powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL); | |
675 | ||
676 | return powerpc_debugfs_root == NULL; | |
677 | } | |
678 | arch_initcall(powerpc_debugfs_init); | |
679 | #endif | |
d746286c KG |
680 | |
681 | static int ppc_dflt_bus_notify(struct notifier_block *nb, | |
682 | unsigned long action, void *data) | |
683 | { | |
684 | struct device *dev = data; | |
685 | ||
686 | /* We are only intereted in device addition */ | |
687 | if (action != BUS_NOTIFY_ADD_DEVICE) | |
688 | return 0; | |
689 | ||
690 | set_dma_ops(dev, &dma_direct_ops); | |
691 | ||
692 | return NOTIFY_DONE; | |
693 | } | |
694 | ||
695 | static struct notifier_block ppc_dflt_plat_bus_notifier = { | |
696 | .notifier_call = ppc_dflt_bus_notify, | |
697 | .priority = INT_MAX, | |
698 | }; | |
699 | ||
700 | static struct notifier_block ppc_dflt_of_bus_notifier = { | |
701 | .notifier_call = ppc_dflt_bus_notify, | |
702 | .priority = INT_MAX, | |
703 | }; | |
704 | ||
705 | static int __init setup_bus_notifier(void) | |
706 | { | |
707 | bus_register_notifier(&platform_bus_type, &ppc_dflt_plat_bus_notifier); | |
708 | bus_register_notifier(&of_platform_bus_type, &ppc_dflt_of_bus_notifier); | |
709 | ||
710 | return 0; | |
711 | } | |
712 | ||
713 | arch_initcall(setup_bus_notifier); |