powerpc/powernv: Return secondary CPUs to firmware before FW update
[linux-block.git] / arch / powerpc / kernel / setup-common.c
CommitLineData
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1/*
2 * Common boot and setup code for both 32-bit and 64-bit.
3 * Extracted from arch/powerpc/kernel/setup_64.c.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
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12
13#undef DEBUG
14
4b16f8e2 15#include <linux/export.h>
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16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/reboot.h>
21#include <linux/delay.h>
22#include <linux/initrd.h>
e5c6c8e4 23#include <linux/platform_device.h>
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24#include <linux/seq_file.h>
25#include <linux/ioport.h>
26#include <linux/console.h>
894673ee 27#include <linux/screen_info.h>
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28#include <linux/root_dev.h>
29#include <linux/notifier.h>
30#include <linux/cpu.h>
31#include <linux/unistd.h>
32#include <linux/serial.h>
33#include <linux/serial_8250.h>
94a3807c 34#include <linux/debugfs.h>
8d089085 35#include <linux/percpu.h>
95f72d1e 36#include <linux/memblock.h>
d746286c 37#include <linux/of_platform.h>
03501dab 38#include <asm/io.h>
1426d5a3 39#include <asm/paca.h>
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40#include <asm/prom.h>
41#include <asm/processor.h>
a7f290da 42#include <asm/vdso_datapage.h>
03501dab 43#include <asm/pgtable.h>
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44#include <asm/smp.h>
45#include <asm/elf.h>
46#include <asm/machdep.h>
47#include <asm/time.h>
48#include <asm/cputable.h>
49#include <asm/sections.h>
e8222502 50#include <asm/firmware.h>
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51#include <asm/btext.h>
52#include <asm/nvram.h>
53#include <asm/setup.h>
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54#include <asm/rtas.h>
55#include <asm/iommu.h>
56#include <asm/serial.h>
57#include <asm/cache.h>
58#include <asm/page.h>
59#include <asm/mmu.h>
fca5dcd4 60#include <asm/xmon.h>
8d089085 61#include <asm/cputhreads.h>
f465df81 62#include <mm/mmu_decl.h>
ebaeb5ae 63#include <asm/fadump.h>
03501dab 64
03501dab 65#ifdef DEBUG
f9e4ec57 66#include <asm/udbg.h>
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67#define DBG(fmt...) udbg_printf(fmt)
68#else
69#define DBG(fmt...)
70#endif
71
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72/* The main machine-dep calls structure
73 */
74struct machdep_calls ppc_md;
75EXPORT_SYMBOL(ppc_md);
76struct machdep_calls *machine_id;
77EXPORT_SYMBOL(machine_id);
799d6046 78
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79int boot_cpuid = -1;
80EXPORT_SYMBOL_GPL(boot_cpuid);
81
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82unsigned long klimit = (unsigned long) _end;
83
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84char cmd_line[COMMAND_LINE_SIZE];
85
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86/*
87 * This still seems to be needed... -- paulus
88 */
89struct screen_info screen_info = {
90 .orig_x = 0,
91 .orig_y = 25,
92 .orig_video_cols = 80,
93 .orig_video_lines = 25,
94 .orig_video_isVGA = 1,
95 .orig_video_points = 16
96};
97
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98/* Variables required to store legacy IO irq routing */
99int of_i8042_kbd_irq;
ee110066 100EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
540c6c39 101int of_i8042_aux_irq;
ee110066 102EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
540c6c39 103
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104#ifdef __DO_IRQ_CANON
105/* XXX should go elsewhere eventually */
106int ppc_do_canonicalize_irqs;
107EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
108#endif
109
110/* also used by kexec */
111void machine_shutdown(void)
112{
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113#ifdef CONFIG_FA_DUMP
114 /*
115 * if fadump is active, cleanup the fadump registration before we
116 * shutdown.
117 */
118 fadump_cleanup();
119#endif
120
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121 if (ppc_md.machine_shutdown)
122 ppc_md.machine_shutdown();
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123}
124
125void machine_restart(char *cmd)
126{
127 machine_shutdown();
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128 if (ppc_md.restart)
129 ppc_md.restart(cmd);
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130#ifdef CONFIG_SMP
131 smp_send_stop();
132#endif
133 printk(KERN_EMERG "System Halted, OK to turn off power\n");
134 local_irq_disable();
135 while (1) ;
136}
137
138void machine_power_off(void)
139{
140 machine_shutdown();
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141 if (ppc_md.power_off)
142 ppc_md.power_off();
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143#ifdef CONFIG_SMP
144 smp_send_stop();
145#endif
146 printk(KERN_EMERG "System Halted, OK to turn off power\n");
147 local_irq_disable();
148 while (1) ;
149}
150/* Used by the G5 thermal driver */
151EXPORT_SYMBOL_GPL(machine_power_off);
152
153void (*pm_power_off)(void) = machine_power_off;
154EXPORT_SYMBOL_GPL(pm_power_off);
155
156void machine_halt(void)
157{
158 machine_shutdown();
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159 if (ppc_md.halt)
160 ppc_md.halt();
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161#ifdef CONFIG_SMP
162 smp_send_stop();
163#endif
164 printk(KERN_EMERG "System Halted, OK to turn off power\n");
165 local_irq_disable();
166 while (1) ;
167}
168
169
170#ifdef CONFIG_TAU
171extern u32 cpu_temp(unsigned long cpu);
172extern u32 cpu_temp_both(unsigned long cpu);
173#endif /* CONFIG_TAU */
174
175#ifdef CONFIG_SMP
6b7487fc 176DEFINE_PER_CPU(unsigned int, cpu_pvr);
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177#endif
178
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179static void show_cpuinfo_summary(struct seq_file *m)
180{
181 struct device_node *root;
182 const char *model = NULL;
183#if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
184 unsigned long bogosum = 0;
185 int i;
186 for_each_online_cpu(i)
187 bogosum += loops_per_jiffy;
188 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
189 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
190#endif /* CONFIG_SMP && CONFIG_PPC32 */
191 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
192 if (ppc_md.name)
193 seq_printf(m, "platform\t: %s\n", ppc_md.name);
194 root = of_find_node_by_path("/");
195 if (root)
196 model = of_get_property(root, "model", NULL);
197 if (model)
198 seq_printf(m, "model\t\t: %s\n", model);
199 of_node_put(root);
200
201 if (ppc_md.show_cpuinfo != NULL)
202 ppc_md.show_cpuinfo(m);
203
204#ifdef CONFIG_PPC32
205 /* Display the amount of memory */
206 seq_printf(m, "Memory\t\t: %d MB\n",
207 (unsigned int)(total_memory / (1024 * 1024)));
208#endif
209}
210
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211static int show_cpuinfo(struct seq_file *m, void *v)
212{
213 unsigned long cpu_id = (unsigned long)v - 1;
214 unsigned int pvr;
215 unsigned short maj;
216 unsigned short min;
217
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218 /* We only show online cpus: disable preempt (overzealous, I
219 * knew) to prevent cpu going down. */
220 preempt_disable();
221 if (!cpu_online(cpu_id)) {
222 preempt_enable();
223 return 0;
224 }
225
226#ifdef CONFIG_SMP
6b7487fc 227 pvr = per_cpu(cpu_pvr, cpu_id);
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228#else
229 pvr = mfspr(SPRN_PVR);
230#endif
231 maj = (pvr >> 8) & 0xFF;
232 min = pvr & 0xFF;
233
234 seq_printf(m, "processor\t: %lu\n", cpu_id);
235 seq_printf(m, "cpu\t\t: ");
236
237 if (cur_cpu_spec->pvr_mask)
238 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
239 else
240 seq_printf(m, "unknown (%08x)", pvr);
241
242#ifdef CONFIG_ALTIVEC
243 if (cpu_has_feature(CPU_FTR_ALTIVEC))
244 seq_printf(m, ", altivec supported");
245#endif /* CONFIG_ALTIVEC */
246
247 seq_printf(m, "\n");
248
249#ifdef CONFIG_TAU
250 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
251#ifdef CONFIG_TAU_AVERAGE
252 /* more straightforward, but potentially misleading */
253 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
bccfd588 254 cpu_temp(cpu_id));
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255#else
256 /* show the actual temp sensor range */
257 u32 temp;
bccfd588 258 temp = cpu_temp_both(cpu_id);
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259 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
260 temp & 0xff, temp >> 16);
261#endif
262 }
263#endif /* CONFIG_TAU */
264
265 /*
266 * Assume here that all clock rates are the same in a
267 * smp system. -- Cort
268 */
269 if (ppc_proc_freq)
270 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
271 ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
272
273 if (ppc_md.show_percpuinfo != NULL)
274 ppc_md.show_percpuinfo(m, cpu_id);
275
276 /* If we are a Freescale core do a simple check so
277 * we dont have to keep adding cases in the future */
278 if (PVR_VER(pvr) & 0x8000) {
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279 switch (PVR_VER(pvr)) {
280 case 0x8000: /* 7441/7450/7451, Voyager */
281 case 0x8001: /* 7445/7455, Apollo 6 */
282 case 0x8002: /* 7447/7457, Apollo 7 */
283 case 0x8003: /* 7447A, Apollo 7 PM */
284 case 0x8004: /* 7448, Apollo 8 */
285 case 0x800c: /* 7410, Nitro */
286 maj = ((pvr >> 8) & 0xF);
287 min = PVR_MIN(pvr);
288 break;
289 default: /* e500/book-e */
290 maj = PVR_MAJ(pvr);
291 min = PVR_MIN(pvr);
292 break;
293 }
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294 } else {
295 switch (PVR_VER(pvr)) {
296 case 0x0020: /* 403 family */
297 maj = PVR_MAJ(pvr) + 1;
298 min = PVR_MIN(pvr);
299 break;
300 case 0x1008: /* 740P/750P ?? */
301 maj = ((pvr >> 8) & 0xFF) - 1;
302 min = pvr & 0xFF;
303 break;
304 default:
305 maj = (pvr >> 8) & 0xFF;
306 min = pvr & 0xFF;
307 break;
308 }
309 }
310
311 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
312 maj, min, PVR_VER(pvr), PVR_REV(pvr));
313
314#ifdef CONFIG_PPC32
315 seq_printf(m, "bogomips\t: %lu.%02lu\n",
316 loops_per_jiffy / (500000/HZ),
317 (loops_per_jiffy / (5000/HZ)) % 100);
318#endif
319
320#ifdef CONFIG_SMP
321 seq_printf(m, "\n");
322#endif
323
324 preempt_enable();
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325
326 /* If this is the last cpu, print the summary */
327 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
328 show_cpuinfo_summary(m);
329
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330 return 0;
331}
332
333static void *c_start(struct seq_file *m, loff_t *pos)
334{
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335 if (*pos == 0) /* just in case, cpu 0 is not the first */
336 *pos = cpumask_first(cpu_online_mask);
337 else
338 *pos = cpumask_next(*pos - 1, cpu_online_mask);
339 if ((*pos) < nr_cpu_ids)
340 return (void *)(unsigned long)(*pos + 1);
341 return NULL;
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342}
343
344static void *c_next(struct seq_file *m, void *v, loff_t *pos)
345{
e6532c63 346 (*pos)++;
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347 return c_start(m, pos);
348}
349
350static void c_stop(struct seq_file *m, void *v)
351{
352}
353
88e9d34c 354const struct seq_operations cpuinfo_op = {
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355 .start =c_start,
356 .next = c_next,
357 .stop = c_stop,
358 .show = show_cpuinfo,
359};
360
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361void __init check_for_initrd(void)
362{
363#ifdef CONFIG_BLK_DEV_INITRD
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364 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
365 initrd_start, initrd_end);
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366
367 /* If we were passed an initrd, set the ROOT_DEV properly if the values
368 * look sensible. If not, clear initrd reference.
369 */
51fae6de 370 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
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DW
371 initrd_end > initrd_start)
372 ROOT_DEV = Root_RAM0;
6761c4a0 373 else
a82765b6 374 initrd_start = initrd_end = 0;
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DW
375
376 if (initrd_start)
377 printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
378
379 DBG(" <- check_for_initrd()\n");
380#endif /* CONFIG_BLK_DEV_INITRD */
381}
382
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383#ifdef CONFIG_SMP
384
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385int threads_per_core, threads_shift;
386cpumask_t threads_core_mask;
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387EXPORT_SYMBOL_GPL(threads_per_core);
388EXPORT_SYMBOL_GPL(threads_shift);
389EXPORT_SYMBOL_GPL(threads_core_mask);
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390
391static void __init cpu_init_thread_core_maps(int tpc)
392{
393 int i;
394
395 threads_per_core = tpc;
104699c0 396 cpumask_clear(&threads_core_mask);
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397
398 /* This implementation only supports power of 2 number of threads
399 * for simplicity and performance
400 */
401 threads_shift = ilog2(tpc);
402 BUG_ON(tpc != (1 << threads_shift));
403
404 for (i = 0; i < tpc; i++)
104699c0 405 cpumask_set_cpu(i, &threads_core_mask);
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406
407 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
408 tpc, tpc > 1 ? "s" : "");
409 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
410}
411
412
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413/**
414 * setup_cpu_maps - initialize the following cpu maps:
828a6986
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415 * cpu_possible_mask
416 * cpu_present_mask
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417 *
418 * Having the possible map set up early allows us to restrict allocations
8657ae28 419 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
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420 *
421 * We do not initialize the online map here; cpus set their own bits in
828a6986 422 * cpu_online_mask as they come up.
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423 *
424 * This function is valid only for Open Firmware systems. finish_device_tree
425 * must be called before using this.
426 *
427 * While we're here, we may as well set the "physical" cpu ids in the paca.
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428 *
429 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
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430 */
431void __init smp_setup_cpu_maps(void)
432{
433 struct device_node *dn = NULL;
434 int cpu = 0;
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435 int nthreads = 1;
436
437 DBG("smp_setup_cpu_maps()\n");
5ad57078 438
8657ae28 439 while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
ac13282d 440 const __be32 *intserv;
43f88120 441 __be32 cpu_be;
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442 int j, len;
443
444 DBG(" * %s...\n", dn->full_name);
5ad57078 445
e2eb6392
SR
446 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
447 &len);
8d089085 448 if (intserv) {
5ad57078 449 nthreads = len / sizeof(int);
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BH
450 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
451 nthreads);
452 } else {
453 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
e2eb6392 454 intserv = of_get_property(dn, "reg", NULL);
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AP
455 if (!intserv) {
456 cpu_be = cpu_to_be32(cpu);
457 intserv = &cpu_be; /* assume logical == phys */
458 }
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459 }
460
8657ae28 461 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
8d089085 462 DBG(" thread %d -> cpu %d (hard id %d)\n",
ac13282d 463 j, cpu, be32_to_cpu(intserv[j]));
ea0f1cab 464 set_cpu_present(cpu, true);
ac13282d 465 set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
ea0f1cab 466 set_cpu_possible(cpu, true);
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467 cpu++;
468 }
469 }
470
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471 /* If no SMT supported, nthreads is forced to 1 */
472 if (!cpu_has_feature(CPU_FTR_SMT)) {
473 DBG(" SMT disabled ! nthreads forced to 1\n");
474 nthreads = 1;
475 }
476
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477#ifdef CONFIG_PPC64
478 /*
479 * On pSeries LPAR, we need to know how many cpus
480 * could possibly be added to this partition.
481 */
e8222502 482 if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
799d6046 483 (dn = of_find_node_by_path("/rtas"))) {
5ad57078 484 int num_addr_cell, num_size_cell, maxcpus;
01666c8e 485 const __be32 *ireg;
5ad57078 486
a8bda5dd 487 num_addr_cell = of_n_addr_cells(dn);
9213feea 488 num_size_cell = of_n_size_cells(dn);
5ad57078 489
e2eb6392 490 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
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491
492 if (!ireg)
493 goto out;
494
01666c8e 495 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
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496
497 /* Double maxcpus for processors which have SMT capability */
498 if (cpu_has_feature(CPU_FTR_SMT))
8d089085 499 maxcpus *= nthreads;
5ad57078 500
8657ae28 501 if (maxcpus > nr_cpu_ids) {
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502 printk(KERN_WARNING
503 "Partition configured for %d cpus, "
504 "operating system maximum is %d.\n",
8657ae28
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505 maxcpus, nr_cpu_ids);
506 maxcpus = nr_cpu_ids;
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507 } else
508 printk(KERN_INFO "Partition configured for %d cpus.\n",
509 maxcpus);
510
511 for (cpu = 0; cpu < maxcpus; cpu++)
ea0f1cab 512 set_cpu_possible(cpu, true);
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513 out:
514 of_node_put(dn);
515 }
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MT
516 vdso_data->processorCount = num_present_cpus();
517#endif /* CONFIG_PPC64 */
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518
519 /* Initialize CPU <=> thread mapping/
520 *
521 * WARNING: We assume that the number of threads is the same for
522 * every CPU in the system. If that is not the case, then some code
523 * here will have to be reworked
524 */
525 cpu_init_thread_core_maps(nthreads);
1426d5a3 526
c1854e00 527 /* Now that possible cpus are set, set nr_cpu_ids for later use */
aa79bc21 528 setup_nr_cpu_ids();
c1854e00 529
1426d5a3 530 free_unused_pacas();
d5a7430d 531}
5ad57078 532#endif /* CONFIG_SMP */
fca5dcd4 533
d33b78df 534#ifdef CONFIG_PCSPKR_PLATFORM
e5c6c8e4
MN
535static __init int add_pcspkr(void)
536{
537 struct device_node *np;
538 struct platform_device *pd;
539 int ret;
540
541 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
542 of_node_put(np);
543 if (!np)
544 return -ENODEV;
545
546 pd = platform_device_alloc("pcspkr", -1);
547 if (!pd)
548 return -ENOMEM;
549
550 ret = platform_device_add(pd);
551 if (ret)
552 platform_device_put(pd);
553
554 return ret;
555}
556device_initcall(add_pcspkr);
d33b78df 557#endif /* CONFIG_PCSPKR_PLATFORM */
95d465fd 558
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559void probe_machine(void)
560{
561 extern struct machdep_calls __machine_desc_start;
562 extern struct machdep_calls __machine_desc_end;
563
564 /*
565 * Iterate all ppc_md structures until we find the proper
566 * one for the current machine type
567 */
568 DBG("Probing machine type ...\n");
569
570 for (machine_id = &__machine_desc_start;
571 machine_id < &__machine_desc_end;
572 machine_id++) {
573 DBG(" %s ...", machine_id->name);
574 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
575 if (ppc_md.probe()) {
576 DBG(" match !\n");
577 break;
578 }
579 DBG("\n");
580 }
581 /* What can we do if we didn't find ? */
582 if (machine_id >= &__machine_desc_end) {
583 DBG("No suitable machine found !\n");
584 for (;;);
585 }
586
587 printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
588}
1269277a 589
8d8a0241 590/* Match a class of boards, not a specific device configuration. */
1269277a
DW
591int check_legacy_ioport(unsigned long base_port)
592{
8d8a0241
OH
593 struct device_node *parent, *np = NULL;
594 int ret = -ENODEV;
595
596 switch(base_port) {
597 case I8042_DATA_REG:
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WF
598 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
599 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
600 if (np) {
601 parent = of_get_parent(np);
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602
603 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
604 if (!of_i8042_kbd_irq)
605 of_i8042_kbd_irq = 1;
606
607 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
608 if (!of_i8042_aux_irq)
609 of_i8042_aux_irq = 12;
610
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WF
611 of_node_put(np);
612 np = parent;
613 break;
614 }
8d8a0241 615 np = of_find_node_by_type(NULL, "8042");
f5d834fc
AC
616 /* Pegasos has no device_type on its 8042 node, look for the
617 * name instead */
618 if (!np)
619 np = of_find_node_by_name(NULL, "8042");
2c78027a
GP
620 if (np) {
621 of_i8042_kbd_irq = 1;
622 of_i8042_aux_irq = 12;
623 }
8d8a0241
OH
624 break;
625 case FDC_BASE: /* FDC1 */
626 np = of_find_node_by_type(NULL, "fdc");
627 break;
8d8a0241
OH
628 default:
629 /* ipmi is supposed to fail here */
630 break;
631 }
632 if (!np)
633 return ret;
634 parent = of_get_parent(np);
635 if (parent) {
636 if (strcmp(parent->type, "isa") == 0)
637 ret = 0;
638 of_node_put(parent);
639 }
640 of_node_put(np);
641 return ret;
1269277a
DW
642}
643EXPORT_SYMBOL(check_legacy_ioport);
7e990266
KG
644
645static int ppc_panic_event(struct notifier_block *this,
646 unsigned long event, void *ptr)
647{
ebaeb5ae
MS
648 /*
649 * If firmware-assisted dump has been registered then trigger
650 * firmware-assisted dump and let firmware handle everything else.
651 */
652 crash_fadump(NULL, ptr);
7e990266
KG
653 ppc_md.panic(ptr); /* May not return */
654 return NOTIFY_DONE;
655}
656
657static struct notifier_block ppc_panic_block = {
658 .notifier_call = ppc_panic_event,
659 .priority = INT_MIN /* may not return; must be done last */
660};
661
662void __init setup_panic(void)
663{
664 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
665}
06cce43c
DF
666
667#ifdef CONFIG_CHECK_CACHE_COHERENCY
668/*
669 * For platforms that have configurable cache-coherency. This function
670 * checks that the cache coherency setting of the kernel matches the setting
671 * left by the firmware, as indicated in the device tree. Since a mismatch
672 * will eventually result in DMA failures, we print * and error and call
673 * BUG() in that case.
674 */
675
676#ifdef CONFIG_NOT_COHERENT_CACHE
677#define KERNEL_COHERENCY 0
678#else
679#define KERNEL_COHERENCY 1
680#endif
681
682static int __init check_cache_coherency(void)
683{
684 struct device_node *np;
685 const void *prop;
686 int devtree_coherency;
687
688 np = of_find_node_by_path("/");
689 prop = of_get_property(np, "coherency-off", NULL);
690 of_node_put(np);
691
692 devtree_coherency = prop ? 0 : 1;
693
694 if (devtree_coherency != KERNEL_COHERENCY) {
695 printk(KERN_ERR
696 "kernel coherency:%s != device tree_coherency:%s\n",
697 KERNEL_COHERENCY ? "on" : "off",
698 devtree_coherency ? "on" : "off");
699 BUG();
700 }
701
702 return 0;
703}
704
705late_initcall(check_cache_coherency);
706#endif /* CONFIG_CHECK_CACHE_COHERENCY */
94a3807c
ME
707
708#ifdef CONFIG_DEBUG_FS
709struct dentry *powerpc_debugfs_root;
907b1f45 710EXPORT_SYMBOL(powerpc_debugfs_root);
94a3807c
ME
711
712static int powerpc_debugfs_init(void)
713{
714 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
715
716 return powerpc_debugfs_root == NULL;
717}
718arch_initcall(powerpc_debugfs_init);
719#endif
d746286c 720
c5f02bb4
SX
721#ifdef CONFIG_BOOKE_WDT
722extern u32 booke_wdt_enabled;
723extern u32 booke_wdt_period;
724
725/* Checks wdt=x and wdt_period=xx command-line option */
726notrace int __init early_parse_wdt(char *p)
727{
728 if (p && strncmp(p, "0", 1) != 0)
729 booke_wdt_enabled = 1;
730
731 return 0;
732}
733early_param("wdt", early_parse_wdt);
734
735int __init early_parse_wdt_period(char *p)
736{
737 unsigned long ret;
738 if (p) {
739 if (!kstrtol(p, 0, &ret))
740 booke_wdt_period = ret;
741 }
742
743 return 0;
744}
745early_param("wdt_period", early_parse_wdt_period);
746#endif /* CONFIG_BOOKE_WDT */
747
a9c0f41b 748void ppc_printk_progress(char *s, unsigned short hex)
d746286c 749{
a9c0f41b 750 pr_info("%s\n", s);
d746286c
KG
751}
752
314b02f5 753void arch_setup_pdev_archdata(struct platform_device *pdev)
d746286c 754{
314b02f5
KG
755 pdev->archdata.dma_mask = DMA_BIT_MASK(32);
756 pdev->dev.dma_mask = &pdev->archdata.dma_mask;
757 set_dma_ops(&pdev->dev, &dma_direct_ops);
d746286c 758}