Commit | Line | Data |
---|---|---|
03501dab PM |
1 | /* |
2 | * Common boot and setup code for both 32-bit and 64-bit. | |
3 | * Extracted from arch/powerpc/kernel/setup_64.c. | |
4 | * | |
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
e8222502 BH |
12 | |
13 | #undef DEBUG | |
14 | ||
4b16f8e2 | 15 | #include <linux/export.h> |
03501dab PM |
16 | #include <linux/string.h> |
17 | #include <linux/sched.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/reboot.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/initrd.h> | |
e5c6c8e4 | 23 | #include <linux/platform_device.h> |
03501dab PM |
24 | #include <linux/seq_file.h> |
25 | #include <linux/ioport.h> | |
26 | #include <linux/console.h> | |
894673ee | 27 | #include <linux/screen_info.h> |
03501dab PM |
28 | #include <linux/root_dev.h> |
29 | #include <linux/notifier.h> | |
30 | #include <linux/cpu.h> | |
31 | #include <linux/unistd.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/serial_8250.h> | |
94a3807c | 34 | #include <linux/debugfs.h> |
8d089085 | 35 | #include <linux/percpu.h> |
95f72d1e | 36 | #include <linux/memblock.h> |
d746286c | 37 | #include <linux/of_platform.h> |
03501dab | 38 | #include <asm/io.h> |
1426d5a3 | 39 | #include <asm/paca.h> |
03501dab PM |
40 | #include <asm/prom.h> |
41 | #include <asm/processor.h> | |
a7f290da | 42 | #include <asm/vdso_datapage.h> |
03501dab | 43 | #include <asm/pgtable.h> |
03501dab PM |
44 | #include <asm/smp.h> |
45 | #include <asm/elf.h> | |
46 | #include <asm/machdep.h> | |
47 | #include <asm/time.h> | |
48 | #include <asm/cputable.h> | |
49 | #include <asm/sections.h> | |
e8222502 | 50 | #include <asm/firmware.h> |
03501dab PM |
51 | #include <asm/btext.h> |
52 | #include <asm/nvram.h> | |
53 | #include <asm/setup.h> | |
03501dab PM |
54 | #include <asm/rtas.h> |
55 | #include <asm/iommu.h> | |
56 | #include <asm/serial.h> | |
57 | #include <asm/cache.h> | |
58 | #include <asm/page.h> | |
59 | #include <asm/mmu.h> | |
fca5dcd4 | 60 | #include <asm/xmon.h> |
8d089085 | 61 | #include <asm/cputhreads.h> |
f465df81 | 62 | #include <mm/mmu_decl.h> |
ebaeb5ae | 63 | #include <asm/fadump.h> |
03501dab | 64 | |
03501dab | 65 | #ifdef DEBUG |
f9e4ec57 | 66 | #include <asm/udbg.h> |
03501dab PM |
67 | #define DBG(fmt...) udbg_printf(fmt) |
68 | #else | |
69 | #define DBG(fmt...) | |
70 | #endif | |
71 | ||
e8222502 BH |
72 | /* The main machine-dep calls structure |
73 | */ | |
74 | struct machdep_calls ppc_md; | |
75 | EXPORT_SYMBOL(ppc_md); | |
76 | struct machdep_calls *machine_id; | |
77 | EXPORT_SYMBOL(machine_id); | |
799d6046 | 78 | |
36ae37e3 BH |
79 | int boot_cpuid = -1; |
80 | EXPORT_SYMBOL_GPL(boot_cpuid); | |
81 | ||
49b09853 PM |
82 | unsigned long klimit = (unsigned long) _end; |
83 | ||
03501dab PM |
84 | /* |
85 | * This still seems to be needed... -- paulus | |
86 | */ | |
87 | struct screen_info screen_info = { | |
88 | .orig_x = 0, | |
89 | .orig_y = 25, | |
90 | .orig_video_cols = 80, | |
91 | .orig_video_lines = 25, | |
92 | .orig_video_isVGA = 1, | |
93 | .orig_video_points = 16 | |
94 | }; | |
e1802b06 AB |
95 | #if defined(CONFIG_FB_VGA16_MODULE) |
96 | EXPORT_SYMBOL(screen_info); | |
97 | #endif | |
03501dab | 98 | |
540c6c39 MW |
99 | /* Variables required to store legacy IO irq routing */ |
100 | int of_i8042_kbd_irq; | |
ee110066 | 101 | EXPORT_SYMBOL_GPL(of_i8042_kbd_irq); |
540c6c39 | 102 | int of_i8042_aux_irq; |
ee110066 | 103 | EXPORT_SYMBOL_GPL(of_i8042_aux_irq); |
540c6c39 | 104 | |
03501dab PM |
105 | #ifdef __DO_IRQ_CANON |
106 | /* XXX should go elsewhere eventually */ | |
107 | int ppc_do_canonicalize_irqs; | |
108 | EXPORT_SYMBOL(ppc_do_canonicalize_irqs); | |
109 | #endif | |
110 | ||
111 | /* also used by kexec */ | |
112 | void machine_shutdown(void) | |
113 | { | |
67b43b9d MS |
114 | #ifdef CONFIG_FA_DUMP |
115 | /* | |
116 | * if fadump is active, cleanup the fadump registration before we | |
117 | * shutdown. | |
118 | */ | |
119 | fadump_cleanup(); | |
120 | #endif | |
121 | ||
3d1229d6 ME |
122 | if (ppc_md.machine_shutdown) |
123 | ppc_md.machine_shutdown(); | |
03501dab PM |
124 | } |
125 | ||
126 | void machine_restart(char *cmd) | |
127 | { | |
128 | machine_shutdown(); | |
b8e383d5 KG |
129 | if (ppc_md.restart) |
130 | ppc_md.restart(cmd); | |
03501dab PM |
131 | #ifdef CONFIG_SMP |
132 | smp_send_stop(); | |
133 | #endif | |
134 | printk(KERN_EMERG "System Halted, OK to turn off power\n"); | |
135 | local_irq_disable(); | |
136 | while (1) ; | |
137 | } | |
138 | ||
139 | void machine_power_off(void) | |
140 | { | |
141 | machine_shutdown(); | |
9178ba29 AG |
142 | if (pm_power_off) |
143 | pm_power_off(); | |
03501dab PM |
144 | #ifdef CONFIG_SMP |
145 | smp_send_stop(); | |
146 | #endif | |
147 | printk(KERN_EMERG "System Halted, OK to turn off power\n"); | |
148 | local_irq_disable(); | |
149 | while (1) ; | |
150 | } | |
151 | /* Used by the G5 thermal driver */ | |
152 | EXPORT_SYMBOL_GPL(machine_power_off); | |
153 | ||
9178ba29 | 154 | void (*pm_power_off)(void); |
03501dab PM |
155 | EXPORT_SYMBOL_GPL(pm_power_off); |
156 | ||
157 | void machine_halt(void) | |
158 | { | |
159 | machine_shutdown(); | |
b8e383d5 KG |
160 | if (ppc_md.halt) |
161 | ppc_md.halt(); | |
03501dab PM |
162 | #ifdef CONFIG_SMP |
163 | smp_send_stop(); | |
164 | #endif | |
165 | printk(KERN_EMERG "System Halted, OK to turn off power\n"); | |
166 | local_irq_disable(); | |
167 | while (1) ; | |
168 | } | |
169 | ||
170 | ||
171 | #ifdef CONFIG_TAU | |
172 | extern u32 cpu_temp(unsigned long cpu); | |
173 | extern u32 cpu_temp_both(unsigned long cpu); | |
174 | #endif /* CONFIG_TAU */ | |
175 | ||
176 | #ifdef CONFIG_SMP | |
6b7487fc | 177 | DEFINE_PER_CPU(unsigned int, cpu_pvr); |
03501dab PM |
178 | #endif |
179 | ||
2c2df038 AB |
180 | static void show_cpuinfo_summary(struct seq_file *m) |
181 | { | |
182 | struct device_node *root; | |
183 | const char *model = NULL; | |
184 | #if defined(CONFIG_SMP) && defined(CONFIG_PPC32) | |
185 | unsigned long bogosum = 0; | |
186 | int i; | |
187 | for_each_online_cpu(i) | |
188 | bogosum += loops_per_jiffy; | |
189 | seq_printf(m, "total bogomips\t: %lu.%02lu\n", | |
190 | bogosum/(500000/HZ), bogosum/(5000/HZ) % 100); | |
191 | #endif /* CONFIG_SMP && CONFIG_PPC32 */ | |
192 | seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq); | |
193 | if (ppc_md.name) | |
194 | seq_printf(m, "platform\t: %s\n", ppc_md.name); | |
195 | root = of_find_node_by_path("/"); | |
196 | if (root) | |
197 | model = of_get_property(root, "model", NULL); | |
198 | if (model) | |
199 | seq_printf(m, "model\t\t: %s\n", model); | |
200 | of_node_put(root); | |
201 | ||
202 | if (ppc_md.show_cpuinfo != NULL) | |
203 | ppc_md.show_cpuinfo(m); | |
204 | ||
205 | #ifdef CONFIG_PPC32 | |
206 | /* Display the amount of memory */ | |
207 | seq_printf(m, "Memory\t\t: %d MB\n", | |
208 | (unsigned int)(total_memory / (1024 * 1024))); | |
209 | #endif | |
210 | } | |
211 | ||
03501dab PM |
212 | static int show_cpuinfo(struct seq_file *m, void *v) |
213 | { | |
214 | unsigned long cpu_id = (unsigned long)v - 1; | |
215 | unsigned int pvr; | |
2299d03a | 216 | unsigned long proc_freq; |
03501dab PM |
217 | unsigned short maj; |
218 | unsigned short min; | |
219 | ||
03501dab PM |
220 | /* We only show online cpus: disable preempt (overzealous, I |
221 | * knew) to prevent cpu going down. */ | |
222 | preempt_disable(); | |
223 | if (!cpu_online(cpu_id)) { | |
224 | preempt_enable(); | |
225 | return 0; | |
226 | } | |
227 | ||
228 | #ifdef CONFIG_SMP | |
6b7487fc | 229 | pvr = per_cpu(cpu_pvr, cpu_id); |
03501dab PM |
230 | #else |
231 | pvr = mfspr(SPRN_PVR); | |
232 | #endif | |
233 | maj = (pvr >> 8) & 0xFF; | |
234 | min = pvr & 0xFF; | |
235 | ||
236 | seq_printf(m, "processor\t: %lu\n", cpu_id); | |
237 | seq_printf(m, "cpu\t\t: "); | |
238 | ||
239 | if (cur_cpu_spec->pvr_mask) | |
240 | seq_printf(m, "%s", cur_cpu_spec->cpu_name); | |
241 | else | |
242 | seq_printf(m, "unknown (%08x)", pvr); | |
243 | ||
244 | #ifdef CONFIG_ALTIVEC | |
245 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | |
246 | seq_printf(m, ", altivec supported"); | |
247 | #endif /* CONFIG_ALTIVEC */ | |
248 | ||
249 | seq_printf(m, "\n"); | |
250 | ||
251 | #ifdef CONFIG_TAU | |
252 | if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) { | |
253 | #ifdef CONFIG_TAU_AVERAGE | |
254 | /* more straightforward, but potentially misleading */ | |
255 | seq_printf(m, "temperature \t: %u C (uncalibrated)\n", | |
bccfd588 | 256 | cpu_temp(cpu_id)); |
03501dab PM |
257 | #else |
258 | /* show the actual temp sensor range */ | |
259 | u32 temp; | |
bccfd588 | 260 | temp = cpu_temp_both(cpu_id); |
03501dab PM |
261 | seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n", |
262 | temp & 0xff, temp >> 16); | |
263 | #endif | |
264 | } | |
265 | #endif /* CONFIG_TAU */ | |
266 | ||
267 | /* | |
2299d03a GS |
268 | * Platforms that have variable clock rates, should implement |
269 | * the method ppc_md.get_proc_freq() that reports the clock | |
270 | * rate of a given cpu. The rest can use ppc_proc_freq to | |
271 | * report the clock rate that is same across all cpus. | |
03501dab | 272 | */ |
2299d03a GS |
273 | if (ppc_md.get_proc_freq) |
274 | proc_freq = ppc_md.get_proc_freq(cpu_id); | |
275 | else | |
276 | proc_freq = ppc_proc_freq; | |
277 | ||
278 | if (proc_freq) | |
03501dab | 279 | seq_printf(m, "clock\t\t: %lu.%06luMHz\n", |
2299d03a | 280 | proc_freq / 1000000, proc_freq % 1000000); |
03501dab PM |
281 | |
282 | if (ppc_md.show_percpuinfo != NULL) | |
283 | ppc_md.show_percpuinfo(m, cpu_id); | |
284 | ||
285 | /* If we are a Freescale core do a simple check so | |
286 | * we dont have to keep adding cases in the future */ | |
287 | if (PVR_VER(pvr) & 0x8000) { | |
a501d8f3 ML |
288 | switch (PVR_VER(pvr)) { |
289 | case 0x8000: /* 7441/7450/7451, Voyager */ | |
290 | case 0x8001: /* 7445/7455, Apollo 6 */ | |
291 | case 0x8002: /* 7447/7457, Apollo 7 */ | |
292 | case 0x8003: /* 7447A, Apollo 7 PM */ | |
293 | case 0x8004: /* 7448, Apollo 8 */ | |
294 | case 0x800c: /* 7410, Nitro */ | |
295 | maj = ((pvr >> 8) & 0xF); | |
296 | min = PVR_MIN(pvr); | |
297 | break; | |
298 | default: /* e500/book-e */ | |
299 | maj = PVR_MAJ(pvr); | |
300 | min = PVR_MIN(pvr); | |
301 | break; | |
302 | } | |
03501dab PM |
303 | } else { |
304 | switch (PVR_VER(pvr)) { | |
305 | case 0x0020: /* 403 family */ | |
306 | maj = PVR_MAJ(pvr) + 1; | |
307 | min = PVR_MIN(pvr); | |
308 | break; | |
309 | case 0x1008: /* 740P/750P ?? */ | |
310 | maj = ((pvr >> 8) & 0xFF) - 1; | |
311 | min = pvr & 0xFF; | |
312 | break; | |
313 | default: | |
314 | maj = (pvr >> 8) & 0xFF; | |
315 | min = pvr & 0xFF; | |
316 | break; | |
317 | } | |
318 | } | |
319 | ||
320 | seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n", | |
321 | maj, min, PVR_VER(pvr), PVR_REV(pvr)); | |
322 | ||
323 | #ifdef CONFIG_PPC32 | |
324 | seq_printf(m, "bogomips\t: %lu.%02lu\n", | |
325 | loops_per_jiffy / (500000/HZ), | |
326 | (loops_per_jiffy / (5000/HZ)) % 100); | |
327 | #endif | |
328 | ||
329 | #ifdef CONFIG_SMP | |
330 | seq_printf(m, "\n"); | |
331 | #endif | |
332 | ||
333 | preempt_enable(); | |
e6532c63 AB |
334 | |
335 | /* If this is the last cpu, print the summary */ | |
336 | if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids) | |
337 | show_cpuinfo_summary(m); | |
338 | ||
03501dab PM |
339 | return 0; |
340 | } | |
341 | ||
342 | static void *c_start(struct seq_file *m, loff_t *pos) | |
343 | { | |
e6532c63 AB |
344 | if (*pos == 0) /* just in case, cpu 0 is not the first */ |
345 | *pos = cpumask_first(cpu_online_mask); | |
346 | else | |
347 | *pos = cpumask_next(*pos - 1, cpu_online_mask); | |
348 | if ((*pos) < nr_cpu_ids) | |
349 | return (void *)(unsigned long)(*pos + 1); | |
350 | return NULL; | |
03501dab PM |
351 | } |
352 | ||
353 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
354 | { | |
e6532c63 | 355 | (*pos)++; |
03501dab PM |
356 | return c_start(m, pos); |
357 | } | |
358 | ||
359 | static void c_stop(struct seq_file *m, void *v) | |
360 | { | |
361 | } | |
362 | ||
88e9d34c | 363 | const struct seq_operations cpuinfo_op = { |
03501dab PM |
364 | .start =c_start, |
365 | .next = c_next, | |
366 | .stop = c_stop, | |
367 | .show = show_cpuinfo, | |
368 | }; | |
369 | ||
a82765b6 DW |
370 | void __init check_for_initrd(void) |
371 | { | |
372 | #ifdef CONFIG_BLK_DEV_INITRD | |
30437b3e DG |
373 | DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n", |
374 | initrd_start, initrd_end); | |
a82765b6 DW |
375 | |
376 | /* If we were passed an initrd, set the ROOT_DEV properly if the values | |
377 | * look sensible. If not, clear initrd reference. | |
378 | */ | |
51fae6de | 379 | if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) && |
a82765b6 DW |
380 | initrd_end > initrd_start) |
381 | ROOT_DEV = Root_RAM0; | |
6761c4a0 | 382 | else |
a82765b6 | 383 | initrd_start = initrd_end = 0; |
a82765b6 DW |
384 | |
385 | if (initrd_start) | |
a7696b36 | 386 | pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end); |
a82765b6 DW |
387 | |
388 | DBG(" <- check_for_initrd()\n"); | |
389 | #endif /* CONFIG_BLK_DEV_INITRD */ | |
390 | } | |
391 | ||
5ad57078 PM |
392 | #ifdef CONFIG_SMP |
393 | ||
5853aef1 | 394 | int threads_per_core, threads_per_subcore, threads_shift; |
8d089085 | 395 | cpumask_t threads_core_mask; |
de56a948 | 396 | EXPORT_SYMBOL_GPL(threads_per_core); |
5853aef1 | 397 | EXPORT_SYMBOL_GPL(threads_per_subcore); |
de56a948 PM |
398 | EXPORT_SYMBOL_GPL(threads_shift); |
399 | EXPORT_SYMBOL_GPL(threads_core_mask); | |
8d089085 BH |
400 | |
401 | static void __init cpu_init_thread_core_maps(int tpc) | |
402 | { | |
403 | int i; | |
404 | ||
405 | threads_per_core = tpc; | |
5853aef1 | 406 | threads_per_subcore = tpc; |
104699c0 | 407 | cpumask_clear(&threads_core_mask); |
8d089085 BH |
408 | |
409 | /* This implementation only supports power of 2 number of threads | |
410 | * for simplicity and performance | |
411 | */ | |
412 | threads_shift = ilog2(tpc); | |
413 | BUG_ON(tpc != (1 << threads_shift)); | |
414 | ||
415 | for (i = 0; i < tpc; i++) | |
104699c0 | 416 | cpumask_set_cpu(i, &threads_core_mask); |
8d089085 BH |
417 | |
418 | printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n", | |
419 | tpc, tpc > 1 ? "s" : ""); | |
420 | printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift); | |
421 | } | |
422 | ||
423 | ||
5ad57078 PM |
424 | /** |
425 | * setup_cpu_maps - initialize the following cpu maps: | |
828a6986 AB |
426 | * cpu_possible_mask |
427 | * cpu_present_mask | |
5ad57078 PM |
428 | * |
429 | * Having the possible map set up early allows us to restrict allocations | |
8657ae28 | 430 | * of things like irqstacks to nr_cpu_ids rather than NR_CPUS. |
5ad57078 PM |
431 | * |
432 | * We do not initialize the online map here; cpus set their own bits in | |
828a6986 | 433 | * cpu_online_mask as they come up. |
5ad57078 PM |
434 | * |
435 | * This function is valid only for Open Firmware systems. finish_device_tree | |
436 | * must be called before using this. | |
437 | * | |
438 | * While we're here, we may as well set the "physical" cpu ids in the paca. | |
4df20460 AB |
439 | * |
440 | * NOTE: This must match the parsing done in early_init_dt_scan_cpus. | |
5ad57078 PM |
441 | */ |
442 | void __init smp_setup_cpu_maps(void) | |
443 | { | |
444 | struct device_node *dn = NULL; | |
445 | int cpu = 0; | |
8d089085 BH |
446 | int nthreads = 1; |
447 | ||
448 | DBG("smp_setup_cpu_maps()\n"); | |
5ad57078 | 449 | |
8657ae28 | 450 | while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) { |
ac13282d | 451 | const __be32 *intserv; |
43f88120 | 452 | __be32 cpu_be; |
8d089085 BH |
453 | int j, len; |
454 | ||
455 | DBG(" * %s...\n", dn->full_name); | |
5ad57078 | 456 | |
e2eb6392 SR |
457 | intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", |
458 | &len); | |
8d089085 | 459 | if (intserv) { |
8d089085 BH |
460 | DBG(" ibm,ppc-interrupt-server#s -> %d threads\n", |
461 | nthreads); | |
462 | } else { | |
463 | DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n"); | |
e16c8765 | 464 | intserv = of_get_property(dn, "reg", &len); |
43f88120 AP |
465 | if (!intserv) { |
466 | cpu_be = cpu_to_be32(cpu); | |
467 | intserv = &cpu_be; /* assume logical == phys */ | |
e16c8765 | 468 | len = 4; |
43f88120 | 469 | } |
5ad57078 PM |
470 | } |
471 | ||
e16c8765 AF |
472 | nthreads = len / sizeof(int); |
473 | ||
8657ae28 | 474 | for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { |
6663a4fa SW |
475 | bool avail; |
476 | ||
8d089085 | 477 | DBG(" thread %d -> cpu %d (hard id %d)\n", |
ac13282d | 478 | j, cpu, be32_to_cpu(intserv[j])); |
6663a4fa SW |
479 | |
480 | avail = of_device_is_available(dn); | |
481 | if (!avail) | |
482 | avail = !of_property_match_string(dn, | |
483 | "enable-method", "spin-table"); | |
484 | ||
485 | set_cpu_present(cpu, avail); | |
ac13282d | 486 | set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j])); |
ea0f1cab | 487 | set_cpu_possible(cpu, true); |
5ad57078 PM |
488 | cpu++; |
489 | } | |
490 | } | |
491 | ||
8d089085 BH |
492 | /* If no SMT supported, nthreads is forced to 1 */ |
493 | if (!cpu_has_feature(CPU_FTR_SMT)) { | |
494 | DBG(" SMT disabled ! nthreads forced to 1\n"); | |
495 | nthreads = 1; | |
496 | } | |
497 | ||
5ad57078 PM |
498 | #ifdef CONFIG_PPC64 |
499 | /* | |
500 | * On pSeries LPAR, we need to know how many cpus | |
501 | * could possibly be added to this partition. | |
502 | */ | |
e8222502 | 503 | if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) && |
799d6046 | 504 | (dn = of_find_node_by_path("/rtas"))) { |
5ad57078 | 505 | int num_addr_cell, num_size_cell, maxcpus; |
01666c8e | 506 | const __be32 *ireg; |
5ad57078 | 507 | |
a8bda5dd | 508 | num_addr_cell = of_n_addr_cells(dn); |
9213feea | 509 | num_size_cell = of_n_size_cells(dn); |
5ad57078 | 510 | |
e2eb6392 | 511 | ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL); |
5ad57078 PM |
512 | |
513 | if (!ireg) | |
514 | goto out; | |
515 | ||
01666c8e | 516 | maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell); |
5ad57078 PM |
517 | |
518 | /* Double maxcpus for processors which have SMT capability */ | |
519 | if (cpu_has_feature(CPU_FTR_SMT)) | |
8d089085 | 520 | maxcpus *= nthreads; |
5ad57078 | 521 | |
8657ae28 | 522 | if (maxcpus > nr_cpu_ids) { |
5ad57078 PM |
523 | printk(KERN_WARNING |
524 | "Partition configured for %d cpus, " | |
525 | "operating system maximum is %d.\n", | |
8657ae28 MM |
526 | maxcpus, nr_cpu_ids); |
527 | maxcpus = nr_cpu_ids; | |
5ad57078 PM |
528 | } else |
529 | printk(KERN_INFO "Partition configured for %d cpus.\n", | |
530 | maxcpus); | |
531 | ||
532 | for (cpu = 0; cpu < maxcpus; cpu++) | |
ea0f1cab | 533 | set_cpu_possible(cpu, true); |
5ad57078 PM |
534 | out: |
535 | of_node_put(dn); | |
536 | } | |
d5a7430d MT |
537 | vdso_data->processorCount = num_present_cpus(); |
538 | #endif /* CONFIG_PPC64 */ | |
8d089085 BH |
539 | |
540 | /* Initialize CPU <=> thread mapping/ | |
541 | * | |
542 | * WARNING: We assume that the number of threads is the same for | |
543 | * every CPU in the system. If that is not the case, then some code | |
544 | * here will have to be reworked | |
545 | */ | |
546 | cpu_init_thread_core_maps(nthreads); | |
1426d5a3 | 547 | |
c1854e00 | 548 | /* Now that possible cpus are set, set nr_cpu_ids for later use */ |
aa79bc21 | 549 | setup_nr_cpu_ids(); |
c1854e00 | 550 | |
1426d5a3 | 551 | free_unused_pacas(); |
d5a7430d | 552 | } |
5ad57078 | 553 | #endif /* CONFIG_SMP */ |
fca5dcd4 | 554 | |
d33b78df | 555 | #ifdef CONFIG_PCSPKR_PLATFORM |
e5c6c8e4 MN |
556 | static __init int add_pcspkr(void) |
557 | { | |
558 | struct device_node *np; | |
559 | struct platform_device *pd; | |
560 | int ret; | |
561 | ||
562 | np = of_find_compatible_node(NULL, NULL, "pnpPNP,100"); | |
563 | of_node_put(np); | |
564 | if (!np) | |
565 | return -ENODEV; | |
566 | ||
567 | pd = platform_device_alloc("pcspkr", -1); | |
568 | if (!pd) | |
569 | return -ENOMEM; | |
570 | ||
571 | ret = platform_device_add(pd); | |
572 | if (ret) | |
573 | platform_device_put(pd); | |
574 | ||
575 | return ret; | |
576 | } | |
577 | device_initcall(add_pcspkr); | |
d33b78df | 578 | #endif /* CONFIG_PCSPKR_PLATFORM */ |
95d465fd | 579 | |
e8222502 BH |
580 | void probe_machine(void) |
581 | { | |
582 | extern struct machdep_calls __machine_desc_start; | |
583 | extern struct machdep_calls __machine_desc_end; | |
584 | ||
585 | /* | |
586 | * Iterate all ppc_md structures until we find the proper | |
587 | * one for the current machine type | |
588 | */ | |
589 | DBG("Probing machine type ...\n"); | |
590 | ||
591 | for (machine_id = &__machine_desc_start; | |
592 | machine_id < &__machine_desc_end; | |
593 | machine_id++) { | |
594 | DBG(" %s ...", machine_id->name); | |
595 | memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls)); | |
596 | if (ppc_md.probe()) { | |
597 | DBG(" match !\n"); | |
598 | break; | |
599 | } | |
600 | DBG("\n"); | |
601 | } | |
602 | /* What can we do if we didn't find ? */ | |
603 | if (machine_id >= &__machine_desc_end) { | |
604 | DBG("No suitable machine found !\n"); | |
605 | for (;;); | |
606 | } | |
607 | ||
608 | printk(KERN_INFO "Using %s machine description\n", ppc_md.name); | |
609 | } | |
1269277a | 610 | |
8d8a0241 | 611 | /* Match a class of boards, not a specific device configuration. */ |
1269277a DW |
612 | int check_legacy_ioport(unsigned long base_port) |
613 | { | |
8d8a0241 OH |
614 | struct device_node *parent, *np = NULL; |
615 | int ret = -ENODEV; | |
616 | ||
617 | switch(base_port) { | |
618 | case I8042_DATA_REG: | |
db0dbae9 WF |
619 | if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303"))) |
620 | np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03"); | |
621 | if (np) { | |
622 | parent = of_get_parent(np); | |
540c6c39 MW |
623 | |
624 | of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0); | |
625 | if (!of_i8042_kbd_irq) | |
626 | of_i8042_kbd_irq = 1; | |
627 | ||
628 | of_i8042_aux_irq = irq_of_parse_and_map(parent, 1); | |
629 | if (!of_i8042_aux_irq) | |
630 | of_i8042_aux_irq = 12; | |
631 | ||
db0dbae9 WF |
632 | of_node_put(np); |
633 | np = parent; | |
634 | break; | |
635 | } | |
8d8a0241 | 636 | np = of_find_node_by_type(NULL, "8042"); |
f5d834fc AC |
637 | /* Pegasos has no device_type on its 8042 node, look for the |
638 | * name instead */ | |
639 | if (!np) | |
640 | np = of_find_node_by_name(NULL, "8042"); | |
2c78027a GP |
641 | if (np) { |
642 | of_i8042_kbd_irq = 1; | |
643 | of_i8042_aux_irq = 12; | |
644 | } | |
8d8a0241 OH |
645 | break; |
646 | case FDC_BASE: /* FDC1 */ | |
647 | np = of_find_node_by_type(NULL, "fdc"); | |
648 | break; | |
8d8a0241 OH |
649 | default: |
650 | /* ipmi is supposed to fail here */ | |
651 | break; | |
652 | } | |
653 | if (!np) | |
654 | return ret; | |
655 | parent = of_get_parent(np); | |
656 | if (parent) { | |
657 | if (strcmp(parent->type, "isa") == 0) | |
658 | ret = 0; | |
659 | of_node_put(parent); | |
660 | } | |
661 | of_node_put(np); | |
662 | return ret; | |
1269277a DW |
663 | } |
664 | EXPORT_SYMBOL(check_legacy_ioport); | |
7e990266 KG |
665 | |
666 | static int ppc_panic_event(struct notifier_block *this, | |
667 | unsigned long event, void *ptr) | |
668 | { | |
ebaeb5ae MS |
669 | /* |
670 | * If firmware-assisted dump has been registered then trigger | |
671 | * firmware-assisted dump and let firmware handle everything else. | |
672 | */ | |
673 | crash_fadump(NULL, ptr); | |
7e990266 KG |
674 | ppc_md.panic(ptr); /* May not return */ |
675 | return NOTIFY_DONE; | |
676 | } | |
677 | ||
678 | static struct notifier_block ppc_panic_block = { | |
679 | .notifier_call = ppc_panic_event, | |
680 | .priority = INT_MIN /* may not return; must be done last */ | |
681 | }; | |
682 | ||
683 | void __init setup_panic(void) | |
684 | { | |
685 | atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); | |
686 | } | |
06cce43c DF |
687 | |
688 | #ifdef CONFIG_CHECK_CACHE_COHERENCY | |
689 | /* | |
690 | * For platforms that have configurable cache-coherency. This function | |
691 | * checks that the cache coherency setting of the kernel matches the setting | |
692 | * left by the firmware, as indicated in the device tree. Since a mismatch | |
693 | * will eventually result in DMA failures, we print * and error and call | |
694 | * BUG() in that case. | |
695 | */ | |
696 | ||
697 | #ifdef CONFIG_NOT_COHERENT_CACHE | |
698 | #define KERNEL_COHERENCY 0 | |
699 | #else | |
700 | #define KERNEL_COHERENCY 1 | |
701 | #endif | |
702 | ||
703 | static int __init check_cache_coherency(void) | |
704 | { | |
705 | struct device_node *np; | |
706 | const void *prop; | |
707 | int devtree_coherency; | |
708 | ||
709 | np = of_find_node_by_path("/"); | |
710 | prop = of_get_property(np, "coherency-off", NULL); | |
711 | of_node_put(np); | |
712 | ||
713 | devtree_coherency = prop ? 0 : 1; | |
714 | ||
715 | if (devtree_coherency != KERNEL_COHERENCY) { | |
716 | printk(KERN_ERR | |
717 | "kernel coherency:%s != device tree_coherency:%s\n", | |
718 | KERNEL_COHERENCY ? "on" : "off", | |
719 | devtree_coherency ? "on" : "off"); | |
720 | BUG(); | |
721 | } | |
722 | ||
723 | return 0; | |
724 | } | |
725 | ||
726 | late_initcall(check_cache_coherency); | |
727 | #endif /* CONFIG_CHECK_CACHE_COHERENCY */ | |
94a3807c ME |
728 | |
729 | #ifdef CONFIG_DEBUG_FS | |
730 | struct dentry *powerpc_debugfs_root; | |
907b1f45 | 731 | EXPORT_SYMBOL(powerpc_debugfs_root); |
94a3807c ME |
732 | |
733 | static int powerpc_debugfs_init(void) | |
734 | { | |
735 | powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL); | |
736 | ||
737 | return powerpc_debugfs_root == NULL; | |
738 | } | |
739 | arch_initcall(powerpc_debugfs_init); | |
740 | #endif | |
d746286c | 741 | |
a9c0f41b | 742 | void ppc_printk_progress(char *s, unsigned short hex) |
d746286c | 743 | { |
a9c0f41b | 744 | pr_info("%s\n", s); |
d746286c KG |
745 | } |
746 | ||
314b02f5 | 747 | void arch_setup_pdev_archdata(struct platform_device *pdev) |
d746286c | 748 | { |
314b02f5 KG |
749 | pdev->archdata.dma_mask = DMA_BIT_MASK(32); |
750 | pdev->dev.dma_mask = &pdev->archdata.dma_mask; | |
751 | set_dma_ops(&pdev->dev, &dma_direct_ops); | |
d746286c | 752 | } |