[linux-2.6-block.git] / arch / powerpc / kernel / rtas_pci.c

/*
 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
 *
 * RTAS specific routines for PCI.
 *
 * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */

#include <linux/kernel.h>
#include <linux/threads.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/bootmem.h>

#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/iommu.h>
#include <asm/rtas.h>
#include <asm/mpic.h>
#include <asm/ppc-pci.h>

/* RTAS tokens */
static int read_pci_config;
static int write_pci_config;
static int ibm_read_pci_config;
static int ibm_write_pci_config;

static inline int config_access_valid(struct pci_dn *dn, int where)
{
	if (where < 256)
		return 1;
	if (where < 4096 && dn->pci_ext_config_space)
		return 1;

	return 0;
}

static int of_device_available(struct device_node * dn)
{
        const char *status;

        status = get_property(dn, "status", NULL);

        if (!status)
                return 1;

        if (!strcmp(status, "okay"))
                return 1;

        return 0;
}

int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
{
	int returnval = -1;
	unsigned long buid, addr;
	int ret;

	if (!pdn)
		return PCIBIOS_DEVICE_NOT_FOUND;
	if (!config_access_valid(pdn, where))
		return PCIBIOS_BAD_REGISTER_NUMBER;

	addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
	buid = pdn->phb->buid;
	if (buid) {
		ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
				addr, BUID_HI(buid), BUID_LO(buid), size);
	} else {
		ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
	}
	*val = returnval;

	if (ret)
		return PCIBIOS_DEVICE_NOT_FOUND;

	if (returnval == EEH_IO_ERROR_VALUE(size) &&
	    eeh_dn_check_failure (pdn->node, NULL))
		return PCIBIOS_DEVICE_NOT_FOUND;

	return PCIBIOS_SUCCESSFUL;
}

static int rtas_pci_read_config(struct pci_bus *bus,
				unsigned int devfn,
				int where, int size, u32 *val)
{
	struct device_node *busdn, *dn;

	if (bus->self)
		busdn = pci_device_to_OF_node(bus->self);
	else
		busdn = bus->sysdata;	/* must be a phb */

	/* Search only direct children of the bus */
	for (dn = busdn->child; dn; dn = dn->sibling) {
		struct pci_dn *pdn = PCI_DN(dn);
		if (pdn && pdn->devfn == devfn
		    && of_device_available(dn))
			return rtas_read_config(pdn, where, size, val);
	}

	return PCIBIOS_DEVICE_NOT_FOUND;
}

int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
{
	unsigned long buid, addr;
	int ret;

	if (!pdn)
		return PCIBIOS_DEVICE_NOT_FOUND;
	if (!config_access_valid(pdn, where))
		return PCIBIOS_BAD_REGISTER_NUMBER;

	addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
	buid = pdn->phb->buid;
	if (buid) {
		ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
			BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
	} else {
		ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
	}

	if (ret)
		return PCIBIOS_DEVICE_NOT_FOUND;

	return PCIBIOS_SUCCESSFUL;
}

static int rtas_pci_write_config(struct pci_bus *bus,
				 unsigned int devfn,
				 int where, int size, u32 val)
{
	struct device_node *busdn, *dn;

	if (bus->self)
		busdn = pci_device_to_OF_node(bus->self);
	else
		busdn = bus->sysdata;	/* must be a phb */

	/* Search only direct children of the bus */
	for (dn = busdn->child; dn; dn = dn->sibling) {
		struct pci_dn *pdn = PCI_DN(dn);
		if (pdn && pdn->devfn == devfn
		    && of_device_available(dn))
			return rtas_write_config(pdn, where, size, val);
	}
	return PCIBIOS_DEVICE_NOT_FOUND;
}

struct pci_ops rtas_pci_ops = {
	rtas_pci_read_config,
	rtas_pci_write_config
};

int is_python(struct device_node *dev)
{
	const char *model = get_property(dev, "model", NULL);

	if (model && strstr(model, "Python"))
		return 1;

	return 0;
}

static void python_countermeasures(struct device_node *dev)
{
	struct resource registers;
	void __iomem *chip_regs;
	volatile u32 val;

	if (of_address_to_resource(dev, 0, &registers)) {
		printk(KERN_ERR "Can't get address for Python workarounds !\n");
		return;
	}

	/* Python's register file is 1 MB in size. */
	chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000);

	/*
	 * Firmware doesn't always clear this bit which is critical
	 * for good performance - Anton
	 */

#define PRG_CL_RESET_VALID 0x00010000

	val = in_be32(chip_regs + 0xf6030);
	if (val & PRG_CL_RESET_VALID) {
		printk(KERN_INFO "Python workaround: ");
		val &= ~PRG_CL_RESET_VALID;
		out_be32(chip_regs + 0xf6030, val);
		/*
		 * We must read it back for changes to
		 * take effect
		 */
		val = in_be32(chip_regs + 0xf6030);
		printk("reg0: %x\n", val);
	}

	iounmap(chip_regs);
}

void __init init_pci_config_tokens (void)
{
	read_pci_config = rtas_token("read-pci-config");
	write_pci_config = rtas_token("write-pci-config");
	ibm_read_pci_config = rtas_token("ibm,read-pci-config");
	ibm_write_pci_config = rtas_token("ibm,write-pci-config");
}

unsigned long __devinit get_phb_buid (struct device_node *phb)
{
	int addr_cells;
	const unsigned int *buid_vals;
	unsigned int len;
	unsigned long buid;

	if (ibm_read_pci_config == -1) return 0;

	/* PHB's will always be children of the root node,
	 * or so it is promised by the current firmware. */
	if (phb->parent == NULL)
		return 0;
	if (phb->parent->parent)
		return 0;

	buid_vals = get_property(phb, "reg", &len);
	if (buid_vals == NULL)
		return 0;

	addr_cells = prom_n_addr_cells(phb);
	if (addr_cells == 1) {
		buid = (unsigned long) buid_vals[0];
	} else {
		buid = (((unsigned long)buid_vals[0]) << 32UL) |
			(((unsigned long)buid_vals[1]) & 0xffffffff);
	}
	return buid;
}

static int phb_set_bus_ranges(struct device_node *dev,
			      struct pci_controller *phb)
{
	const int *bus_range;
	unsigned int len;

	bus_range = get_property(dev, "bus-range", &len);
	if (bus_range == NULL || len < 2 * sizeof(int)) {
		return 1;
 	}

	phb->first_busno =  bus_range[0];
	phb->last_busno  =  bus_range[1];

	return 0;
}

int __devinit setup_phb(struct device_node *dev, struct pci_controller *phb)
{
	if (is_python(dev))
		python_countermeasures(dev);

	if (phb_set_bus_ranges(dev, phb))
		return 1;

	phb->ops = &rtas_pci_ops;
	phb->buid = get_phb_buid(dev);

	return 0;
}

unsigned long __init find_and_init_phbs(void)
{
	struct device_node *node;
	struct pci_controller *phb;
	unsigned int index;
	struct device_node *root = of_find_node_by_path("/");

	index = 0;
	for (node = of_get_next_child(root, NULL);
	     node != NULL;
	     node = of_get_next_child(root, node)) {

		if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
					   strcmp(node->type, "pciex") != 0))
			continue;

		phb = pcibios_alloc_controller(node);
		if (!phb)
			continue;
		setup_phb(node, phb);
		pci_process_bridge_OF_ranges(phb, node, 0);
		pci_setup_phb_io(phb, index == 0);
		index++;
	}

	of_node_put(root);
	pci_devs_phb_init();

	/*
	 * pci_probe_only and pci_assign_all_buses can be set via properties
	 * in chosen.
	 */
	if (of_chosen) {
		const int *prop;

		prop = get_property(of_chosen,
				"linux,pci-probe-only", NULL);
		if (prop)
			pci_probe_only = *prop;

		prop = get_property(of_chosen,
				"linux,pci-assign-all-buses", NULL);
		if (prop)
			pci_assign_all_buses = *prop;
	}

	return 0;
}

/* RPA-specific bits for removing PHBs */
int pcibios_remove_root_bus(struct pci_controller *phb)
{
	struct pci_bus *b = phb->bus;
	struct resource *res;
	int rc, i;

	res = b->resource[0];
	if (!res->flags) {
		printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
				b->name);
		return 1;
	}

	rc = unmap_bus_range(b);
	if (rc) {
		printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
			__FUNCTION__, b->name);
		return 1;
	}

	if (release_resource(res)) {
		printk(KERN_ERR "%s: failed to release IO on bus %s\n",
				__FUNCTION__, b->name);
		return 1;
	}

	for (i = 1; i < 3; ++i) {
		res = b->resource[i];
		if (!res->flags && i == 0) {
			printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
				__FUNCTION__, b->name);
			return 1;
		}
		if (res->flags && release_resource(res)) {
			printk(KERN_ERR
			       "%s: failed to release IO %d on bus %s\n",
				__FUNCTION__, i, b->name);
			return 1;
		}
	}

	list_del(&phb->list_node);
	pcibios_free_controller(phb);

	return 0;
}
EXPORT_SYMBOL(pcibios_remove_root_bus);
Commit	Line	Data
c5a3c2e5	1	/*
c5a3c2e5 AB	2	* Copyright (C) 2001 Dave Engebretsen, IBM Corporation
	3	* Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
	4	*
	5	* RTAS specific routines for PCI.
ae65a391	6	*
c5a3c2e5 AB	7	* Based on code from pci.c, chrp_pci.c and pSeries_pci.c
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
ae65a391	13	*
c5a3c2e5 AB	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
ae65a391	18	*
c5a3c2e5 AB	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*/
	23
	24	#include <linux/kernel.h>
	25	#include <linux/threads.h>
	26	#include <linux/pci.h>
	27	#include <linux/string.h>
	28	#include <linux/init.h>
	29	#include <linux/bootmem.h>
	30
	31	#include <asm/io.h>
	32	#include <asm/pgtable.h>
	33	#include <asm/irq.h>
	34	#include <asm/prom.h>
	35	#include <asm/machdep.h>
	36	#include <asm/pci-bridge.h>
	37	#include <asm/iommu.h>
	38	#include <asm/rtas.h>
bbeb3f4c	39	#include <asm/mpic.h>
d387899f	40	#include <asm/ppc-pci.h>
c5a3c2e5 AB	41
	42	/* RTAS tokens */
	43	static int read_pci_config;
	44	static int write_pci_config;
	45	static int ibm_read_pci_config;
	46	static int ibm_write_pci_config;
	47
ae65a391	48	static inline int config_access_valid(struct pci_dn *dn, int where)
c5a3c2e5 AB	49	{
	50	if (where < 256)
	51	return 1;
	52	if (where < 4096 && dn->pci_ext_config_space)
	53	return 1;
	54
	55	return 0;
	56	}
	57
293da76b JM	58	static int of_device_available(struct device_node * dn)
293da76b JM	59	{
a7f67bdf	60	const char *status;
293da76b JM	61
	62	status = get_property(dn, "status", NULL);
	63
	64	if (!status)
	65	return 1;
	66
	67	if (!strcmp(status, "okay"))
	68	return 1;
	69
	70	return 0;
	71	}
	72
7684b40c	73	int rtas_read_config(struct pci_dn pdn, int where, int size, u32 val)
c5a3c2e5 AB	74	{
	75	int returnval = -1;
	76	unsigned long buid, addr;
	77	int ret;
	78
ae65a391	79	if (!pdn)
c5a3c2e5	80	return PCIBIOS_DEVICE_NOT_FOUND;
1635317f	81	if (!config_access_valid(pdn, where))
c5a3c2e5 AB	82	return PCIBIOS_BAD_REGISTER_NUMBER;
c5a3c2e5 AB	83
6f3d5d3c	84	addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
1635317f	85	buid = pdn->phb->buid;
c5a3c2e5 AB	86	if (buid) {
c5a3c2e5 AB	87	ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
ae65a391	88	addr, BUID_HI(buid), BUID_LO(buid), size);
c5a3c2e5 AB	89	} else {
	90	ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
	91	}
	92	*val = returnval;
	93
	94	if (ret)
	95	return PCIBIOS_DEVICE_NOT_FOUND;
	96
1635317f	97	if (returnval == EEH_IO_ERROR_VALUE(size) &&
ae65a391	98	eeh_dn_check_failure (pdn->node, NULL))
c5a3c2e5 AB	99	return PCIBIOS_DEVICE_NOT_FOUND;
	100
	101	return PCIBIOS_SUCCESSFUL;
	102	}
	103
	104	static int rtas_pci_read_config(struct pci_bus *bus,
	105	unsigned int devfn,
	106	int where, int size, u32 *val)
	107	{
	108	struct device_node busdn, dn;
	109
	110	if (bus->self)
	111	busdn = pci_device_to_OF_node(bus->self);
	112	else
	113	busdn = bus->sysdata; /* must be a phb */
	114
	115	/* Search only direct children of the bus */
ae65a391	116	for (dn = busdn->child; dn; dn = dn->sibling) {
	117	struct pci_dn *pdn = PCI_DN(dn);
	118	if (pdn && pdn->devfn == devfn
1635317f	119	&& of_device_available(dn))
ae65a391	120	return rtas_read_config(pdn, where, size, val);
ae65a391	121	}
1635317f	122
c5a3c2e5 AB	123	return PCIBIOS_DEVICE_NOT_FOUND;
	124	}
	125
ae65a391	126	int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
c5a3c2e5 AB	127	{
	128	unsigned long buid, addr;
	129	int ret;
	130
ae65a391	131	if (!pdn)
c5a3c2e5	132	return PCIBIOS_DEVICE_NOT_FOUND;
1635317f	133	if (!config_access_valid(pdn, where))
c5a3c2e5 AB	134	return PCIBIOS_BAD_REGISTER_NUMBER;
c5a3c2e5 AB	135
6f3d5d3c	136	addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
1635317f	137	buid = pdn->phb->buid;
c5a3c2e5	138	if (buid) {
ae65a391	139	ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
ae65a391	140	BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
c5a3c2e5 AB	141	} else {
	142	ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
	143	}
	144
	145	if (ret)
	146	return PCIBIOS_DEVICE_NOT_FOUND;
	147
	148	return PCIBIOS_SUCCESSFUL;
	149	}
	150
	151	static int rtas_pci_write_config(struct pci_bus *bus,
	152	unsigned int devfn,
	153	int where, int size, u32 val)
	154	{
	155	struct device_node busdn, dn;
	156
	157	if (bus->self)
	158	busdn = pci_device_to_OF_node(bus->self);
	159	else
	160	busdn = bus->sysdata; /* must be a phb */
	161
	162	/* Search only direct children of the bus */
ae65a391	163	for (dn = busdn->child; dn; dn = dn->sibling) {
	164	struct pci_dn *pdn = PCI_DN(dn);
	165	if (pdn && pdn->devfn == devfn
1635317f	166	&& of_device_available(dn))
ae65a391	167	return rtas_write_config(pdn, where, size, val);
ae65a391	168	}
c5a3c2e5 AB	169	return PCIBIOS_DEVICE_NOT_FOUND;
	170	}
	171
	172	struct pci_ops rtas_pci_ops = {
	173	rtas_pci_read_config,
	174	rtas_pci_write_config
	175	};
	176
	177	int is_python(struct device_node *dev)
	178	{
a7f67bdf	179	const char *model = get_property(dev, "model", NULL);
c5a3c2e5 AB	180
	181	if (model && strstr(model, "Python"))
	182	return 1;
	183
	184	return 0;
	185	}
	186
cc5d0189	187	static void python_countermeasures(struct device_node *dev)
c5a3c2e5	188	{
cc5d0189	189	struct resource registers;
c5a3c2e5 AB	190	void __iomem *chip_regs;
	191	volatile u32 val;
	192
cc5d0189 BH	193	if (of_address_to_resource(dev, 0, &registers)) {
cc5d0189 BH	194	printk(KERN_ERR "Can't get address for Python workarounds !\n");
c5a3c2e5	195	return;
cc5d0189	196	}
c5a3c2e5 AB	197
c5a3c2e5 AB	198	/* Python's register file is 1 MB in size. */
cc5d0189	199	chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000);
c5a3c2e5	200
ae65a391	201	/*
c5a3c2e5 AB	202	* Firmware doesn't always clear this bit which is critical
	203	* for good performance - Anton
	204	*/
	205
	206	#define PRG_CL_RESET_VALID 0x00010000
	207
	208	val = in_be32(chip_regs + 0xf6030);
	209	if (val & PRG_CL_RESET_VALID) {
	210	printk(KERN_INFO "Python workaround: ");
	211	val &= ~PRG_CL_RESET_VALID;
	212	out_be32(chip_regs + 0xf6030, val);
	213	/*
	214	* We must read it back for changes to
	215	* take effect
	216	*/
	217	val = in_be32(chip_regs + 0xf6030);
	218	printk("reg0: %x\n", val);
	219	}
	220
	221	iounmap(chip_regs);
	222	}
	223
	224	void __init init_pci_config_tokens (void)
	225	{
	226	read_pci_config = rtas_token("read-pci-config");
	227	write_pci_config = rtas_token("write-pci-config");
	228	ibm_read_pci_config = rtas_token("ibm,read-pci-config");
	229	ibm_write_pci_config = rtas_token("ibm,write-pci-config");
	230	}
	231
	232	unsigned long __devinit get_phb_buid (struct device_node *phb)
	233	{
	234	int addr_cells;
a7f67bdf	235	const unsigned int *buid_vals;
c5a3c2e5 AB	236	unsigned int len;
	237	unsigned long buid;
	238
	239	if (ibm_read_pci_config == -1) return 0;
	240
	241	/* PHB's will always be children of the root node,
	242	* or so it is promised by the current firmware. */
	243	if (phb->parent == NULL)
	244	return 0;
	245	if (phb->parent->parent)
	246	return 0;
	247
a7f67bdf	248	buid_vals = get_property(phb, "reg", &len);
c5a3c2e5 AB	249	if (buid_vals == NULL)
	250	return 0;
	251
	252	addr_cells = prom_n_addr_cells(phb);
	253	if (addr_cells == 1) {
	254	buid = (unsigned long) buid_vals[0];
	255	} else {
	256	buid = (((unsigned long)buid_vals[0]) << 32UL) \|
	257	(((unsigned long)buid_vals[1]) & 0xffffffff);
	258	}
	259	return buid;
	260	}
	261
	262	static int phb_set_bus_ranges(struct device_node *dev,
	263	struct pci_controller *phb)
	264	{
a7f67bdf	265	const int *bus_range;
c5a3c2e5 AB	266	unsigned int len;
c5a3c2e5 AB	267
a7f67bdf	268	bus_range = get_property(dev, "bus-range", &len);
c5a3c2e5 AB	269	if (bus_range == NULL \|\| len < 2 * sizeof(int)) {
	270	return 1;
	271	}
ae65a391	272
c5a3c2e5 AB	273	phb->first_busno = bus_range[0];
	274	phb->last_busno = bus_range[1];
	275
	276	return 0;
	277	}
	278
92eb4602	279	int __devinit setup_phb(struct device_node dev, struct pci_controller phb)
c5a3c2e5	280	{
c5a3c2e5	281	if (is_python(dev))
cc5d0189	282	python_countermeasures(dev);
c5a3c2e5 AB	283
	284	if (phb_set_bus_ranges(dev, phb))
	285	return 1;
	286
c5a3c2e5 AB	287	phb->ops = &rtas_pci_ops;
	288	phb->buid = get_phb_buid(dev);
	289
	290	return 0;
	291	}
	292
c5a3c2e5 AB	293	unsigned long __init find_and_init_phbs(void)
	294	{
	295	struct device_node *node;
	296	struct pci_controller *phb;
c5a3c2e5	297	unsigned int index;
c5a3c2e5 AB	298	struct device_node *root = of_find_node_by_path("/");
c5a3c2e5 AB	299
c5a3c2e5	300	index = 0;
c5a3c2e5 AB	301	for (node = of_get_next_child(root, NULL);
	302	node != NULL;
	303	node = of_get_next_child(root, node)) {
bb53bb3d JM	304
	305	if (node->type == NULL \|\| (strcmp(node->type, "pci") != 0 &&
	306	strcmp(node->type, "pciex") != 0))
c5a3c2e5 AB	307	continue;
c5a3c2e5 AB	308
b5166cc2	309	phb = pcibios_alloc_controller(node);
c5a3c2e5 AB	310	if (!phb)
c5a3c2e5 AB	311	continue;
cc5d0189	312	setup_phb(node, phb);
f7abbc19	313	pci_process_bridge_OF_ranges(phb, node, 0);
c5a3c2e5	314	pci_setup_phb_io(phb, index == 0);
c5a3c2e5 AB	315	index++;
	316	}
	317
	318	of_node_put(root);
	319	pci_devs_phb_init();
	320
	321	/*
	322	* pci_probe_only and pci_assign_all_buses can be set via properties
	323	* in chosen.
	324	*/
	325	if (of_chosen) {
a7f67bdf	326	const int *prop;
c5a3c2e5	327
a7f67bdf JK	328	prop = get_property(of_chosen,
a7f67bdf JK	329	"linux,pci-probe-only", NULL);
c5a3c2e5 AB	330	if (prop)
	331	pci_probe_only = *prop;
	332
a7f67bdf JK	333	prop = get_property(of_chosen,
a7f67bdf JK	334	"linux,pci-assign-all-buses", NULL);
c5a3c2e5 AB	335	if (prop)
	336	pci_assign_all_buses = *prop;
	337	}
	338
	339	return 0;
	340	}
	341
c5a3c2e5 AB	342	/* RPA-specific bits for removing PHBs */
	343	int pcibios_remove_root_bus(struct pci_controller *phb)
	344	{
	345	struct pci_bus *b = phb->bus;
	346	struct resource *res;
	347	int rc, i;
	348
	349	res = b->resource[0];
	350	if (!res->flags) {
	351	printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
	352	b->name);
	353	return 1;
	354	}
	355
	356	rc = unmap_bus_range(b);
	357	if (rc) {
	358	printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
	359	__FUNCTION__, b->name);
	360	return 1;
	361	}
	362
	363	if (release_resource(res)) {
	364	printk(KERN_ERR "%s: failed to release IO on bus %s\n",
	365	__FUNCTION__, b->name);
	366	return 1;
	367	}
	368
	369	for (i = 1; i < 3; ++i) {
	370	res = b->resource[i];
	371	if (!res->flags && i == 0) {
	372	printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
	373	__FUNCTION__, b->name);
	374	return 1;
	375	}
	376	if (res->flags && release_resource(res)) {
	377	printk(KERN_ERR
	378	"%s: failed to release IO %d on bus %s\n",
	379	__FUNCTION__, i, b->name);
	380	return 1;
	381	}
	382	}
	383
	384	list_del(&phb->list_node);
b5166cc2	385	pcibios_free_controller(phb);
c5a3c2e5 AB	386
	387	return 0;
	388	}
	389	EXPORT_SYMBOL(pcibios_remove_root_bus);