Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * PowerPC version |
3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
4 | * | |
5 | * Derived from "arch/m68k/kernel/ptrace.c" | |
6 | * Copyright (C) 1994 by Hamish Macdonald | |
7 | * Taken from linux/kernel/ptrace.c and modified for M680x0. | |
8 | * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds | |
9 | * | |
10 | * Modified by Cort Dougan (cort@hq.fsmlabs.com) | |
b123923d | 11 | * and Paul Mackerras (paulus@samba.org). |
1da177e4 LT |
12 | * |
13 | * This file is subject to the terms and conditions of the GNU General | |
14 | * Public License. See the file README.legal in the main directory of | |
15 | * this archive for more details. | |
16 | */ | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/mm.h> | |
21 | #include <linux/smp.h> | |
1da177e4 LT |
22 | #include <linux/errno.h> |
23 | #include <linux/ptrace.h> | |
24 | #include <linux/user.h> | |
25 | #include <linux/security.h> | |
7ed20e1a | 26 | #include <linux/signal.h> |
ea9c102c DW |
27 | #include <linux/seccomp.h> |
28 | #include <linux/audit.h> | |
e8a30302 | 29 | #ifdef CONFIG_PPC32 |
ea9c102c | 30 | #include <linux/module.h> |
e8a30302 | 31 | #endif |
1da177e4 LT |
32 | |
33 | #include <asm/uaccess.h> | |
34 | #include <asm/page.h> | |
35 | #include <asm/pgtable.h> | |
36 | #include <asm/system.h> | |
21a62902 | 37 | |
abd06505 BH |
38 | /* |
39 | * does not yet catch signals sent when the child dies. | |
40 | * in exit.c or in signal.c. | |
41 | */ | |
42 | ||
43 | /* | |
44 | * Set of msr bits that gdb can change on behalf of a process. | |
45 | */ | |
46 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | |
47 | #define MSR_DEBUGCHANGE 0 | |
1da177e4 | 48 | #else |
abd06505 | 49 | #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE) |
1da177e4 | 50 | #endif |
acd89828 | 51 | |
1da177e4 | 52 | /* |
abd06505 | 53 | * Max register writeable via put_reg |
1da177e4 | 54 | */ |
abd06505 BH |
55 | #ifdef CONFIG_PPC32 |
56 | #define PT_MAX_PUT_REG PT_MQ | |
57 | #else | |
58 | #define PT_MAX_PUT_REG PT_CCR | |
59 | #endif | |
1da177e4 | 60 | |
865418d8 BH |
61 | /* |
62 | * Get contents of register REGNO in task TASK. | |
63 | */ | |
64 | unsigned long ptrace_get_reg(struct task_struct *task, int regno) | |
65 | { | |
66 | unsigned long tmp = 0; | |
67 | ||
68 | if (task->thread.regs == NULL) | |
69 | return -EIO; | |
70 | ||
71 | if (regno == PT_MSR) { | |
72 | tmp = ((unsigned long *)task->thread.regs)[PT_MSR]; | |
abd06505 | 73 | return tmp | task->thread.fpexc_mode; |
865418d8 BH |
74 | } |
75 | ||
76 | if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) | |
77 | return ((unsigned long *)task->thread.regs)[regno]; | |
78 | ||
79 | return -EIO; | |
80 | } | |
81 | ||
82 | /* | |
83 | * Write contents of register REGNO in task TASK. | |
84 | */ | |
85 | int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data) | |
86 | { | |
87 | if (task->thread.regs == NULL) | |
88 | return -EIO; | |
89 | ||
912000e7 | 90 | if (regno <= PT_MAX_PUT_REG || regno == PT_TRAP) { |
865418d8 BH |
91 | if (regno == PT_MSR) |
92 | data = (data & MSR_DEBUGCHANGE) | |
93 | | (task->thread.regs->msr & ~MSR_DEBUGCHANGE); | |
912000e7 BH |
94 | /* We prevent mucking around with the reserved area of trap |
95 | * which are used internally by the kernel | |
96 | */ | |
97 | if (regno == PT_TRAP) | |
98 | data &= 0xfff0; | |
865418d8 BH |
99 | ((unsigned long *)task->thread.regs)[regno] = data; |
100 | return 0; | |
101 | } | |
102 | return -EIO; | |
103 | } | |
104 | ||
105 | ||
106 | static int get_fpregs(void __user *data, struct task_struct *task, | |
107 | int has_fpscr) | |
108 | { | |
109 | unsigned int count = has_fpscr ? 33 : 32; | |
110 | ||
111 | if (copy_to_user(data, task->thread.fpr, count * sizeof(double))) | |
112 | return -EFAULT; | |
113 | return 0; | |
114 | } | |
115 | ||
116 | static int set_fpregs(void __user *data, struct task_struct *task, | |
117 | int has_fpscr) | |
118 | { | |
119 | unsigned int count = has_fpscr ? 33 : 32; | |
120 | ||
121 | if (copy_from_user(task->thread.fpr, data, count * sizeof(double))) | |
122 | return -EFAULT; | |
123 | return 0; | |
124 | } | |
125 | ||
126 | ||
127 | #ifdef CONFIG_ALTIVEC | |
128 | /* | |
129 | * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. | |
130 | * The transfer totals 34 quadword. Quadwords 0-31 contain the | |
131 | * corresponding vector registers. Quadword 32 contains the vscr as the | |
132 | * last word (offset 12) within that quadword. Quadword 33 contains the | |
133 | * vrsave as the first word (offset 0) within the quadword. | |
134 | * | |
135 | * This definition of the VMX state is compatible with the current PPC32 | |
136 | * ptrace interface. This allows signal handling and ptrace to use the | |
137 | * same structures. This also simplifies the implementation of a bi-arch | |
138 | * (combined (32- and 64-bit) gdb. | |
139 | */ | |
140 | ||
141 | /* | |
142 | * Get contents of AltiVec register state in task TASK | |
143 | */ | |
144 | static int get_vrregs(unsigned long __user *data, struct task_struct *task) | |
145 | { | |
146 | unsigned long regsize; | |
147 | ||
148 | /* copy AltiVec registers VR[0] .. VR[31] */ | |
149 | regsize = 32 * sizeof(vector128); | |
150 | if (copy_to_user(data, task->thread.vr, regsize)) | |
151 | return -EFAULT; | |
152 | data += (regsize / sizeof(unsigned long)); | |
153 | ||
154 | /* copy VSCR */ | |
155 | regsize = 1 * sizeof(vector128); | |
156 | if (copy_to_user(data, &task->thread.vscr, regsize)) | |
157 | return -EFAULT; | |
158 | data += (regsize / sizeof(unsigned long)); | |
159 | ||
160 | /* copy VRSAVE */ | |
161 | if (put_user(task->thread.vrsave, (u32 __user *)data)) | |
162 | return -EFAULT; | |
163 | ||
164 | return 0; | |
165 | } | |
166 | ||
167 | /* | |
168 | * Write contents of AltiVec register state into task TASK. | |
169 | */ | |
170 | static int set_vrregs(struct task_struct *task, unsigned long __user *data) | |
171 | { | |
172 | unsigned long regsize; | |
173 | ||
174 | /* copy AltiVec registers VR[0] .. VR[31] */ | |
175 | regsize = 32 * sizeof(vector128); | |
176 | if (copy_from_user(task->thread.vr, data, regsize)) | |
177 | return -EFAULT; | |
178 | data += (regsize / sizeof(unsigned long)); | |
179 | ||
180 | /* copy VSCR */ | |
181 | regsize = 1 * sizeof(vector128); | |
182 | if (copy_from_user(&task->thread.vscr, data, regsize)) | |
183 | return -EFAULT; | |
184 | data += (regsize / sizeof(unsigned long)); | |
185 | ||
186 | /* copy VRSAVE */ | |
187 | if (get_user(task->thread.vrsave, (u32 __user *)data)) | |
188 | return -EFAULT; | |
189 | ||
190 | return 0; | |
191 | } | |
192 | #endif /* CONFIG_ALTIVEC */ | |
193 | ||
194 | #ifdef CONFIG_SPE | |
195 | ||
196 | /* | |
197 | * For get_evrregs/set_evrregs functions 'data' has the following layout: | |
198 | * | |
199 | * struct { | |
200 | * u32 evr[32]; | |
201 | * u64 acc; | |
202 | * u32 spefscr; | |
203 | * } | |
204 | */ | |
205 | ||
206 | /* | |
207 | * Get contents of SPE register state in task TASK. | |
208 | */ | |
209 | static int get_evrregs(unsigned long *data, struct task_struct *task) | |
210 | { | |
211 | int i; | |
212 | ||
213 | if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(unsigned long))) | |
214 | return -EFAULT; | |
215 | ||
216 | /* copy SPEFSCR */ | |
217 | if (__put_user(task->thread.spefscr, &data[34])) | |
218 | return -EFAULT; | |
219 | ||
220 | /* copy SPE registers EVR[0] .. EVR[31] */ | |
221 | for (i = 0; i < 32; i++, data++) | |
222 | if (__put_user(task->thread.evr[i], data)) | |
223 | return -EFAULT; | |
224 | ||
225 | /* copy ACC */ | |
226 | if (__put_user64(task->thread.acc, (unsigned long long *)data)) | |
227 | return -EFAULT; | |
228 | ||
229 | return 0; | |
230 | } | |
231 | ||
232 | /* | |
233 | * Write contents of SPE register state into task TASK. | |
234 | */ | |
235 | static int set_evrregs(struct task_struct *task, unsigned long *data) | |
236 | { | |
237 | int i; | |
238 | ||
239 | if (!access_ok(VERIFY_READ, data, 35 * sizeof(unsigned long))) | |
240 | return -EFAULT; | |
241 | ||
242 | /* copy SPEFSCR */ | |
243 | if (__get_user(task->thread.spefscr, &data[34])) | |
244 | return -EFAULT; | |
245 | ||
246 | /* copy SPE registers EVR[0] .. EVR[31] */ | |
247 | for (i = 0; i < 32; i++, data++) | |
248 | if (__get_user(task->thread.evr[i], data)) | |
249 | return -EFAULT; | |
250 | /* copy ACC */ | |
251 | if (__get_user64(task->thread.acc, (unsigned long long*)data)) | |
252 | return -EFAULT; | |
253 | ||
254 | return 0; | |
255 | } | |
256 | #endif /* CONFIG_SPE */ | |
257 | ||
258 | ||
259 | static void set_single_step(struct task_struct *task) | |
260 | { | |
261 | struct pt_regs *regs = task->thread.regs; | |
262 | ||
263 | if (regs != NULL) { | |
264 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | |
265 | task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC; | |
266 | regs->msr |= MSR_DE; | |
267 | #else | |
268 | regs->msr |= MSR_SE; | |
269 | #endif | |
270 | } | |
271 | set_tsk_thread_flag(task, TIF_SINGLESTEP); | |
272 | } | |
273 | ||
274 | static void clear_single_step(struct task_struct *task) | |
275 | { | |
276 | struct pt_regs *regs = task->thread.regs; | |
277 | ||
278 | if (regs != NULL) { | |
279 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | |
280 | task->thread.dbcr0 = 0; | |
281 | regs->msr &= ~MSR_DE; | |
282 | #else | |
283 | regs->msr &= ~MSR_SE; | |
284 | #endif | |
285 | } | |
286 | clear_tsk_thread_flag(task, TIF_SINGLESTEP); | |
287 | } | |
288 | ||
abd06505 BH |
289 | static int ptrace_set_debugreg(struct task_struct *task, unsigned long addr, |
290 | unsigned long data) | |
291 | { | |
292 | /* We only support one DABR and no IABRS at the moment */ | |
293 | if (addr > 0) | |
294 | return -EINVAL; | |
295 | ||
296 | /* The bottom 3 bits are flags */ | |
297 | if ((data & ~0x7UL) >= TASK_SIZE) | |
298 | return -EIO; | |
299 | ||
300 | /* Ensure translation is on */ | |
301 | if (data && !(data & DABR_TRANSLATION)) | |
302 | return -EIO; | |
303 | ||
304 | task->thread.dabr = data; | |
305 | return 0; | |
306 | } | |
abd06505 | 307 | |
1da177e4 LT |
308 | /* |
309 | * Called by kernel/ptrace.c when detaching.. | |
310 | * | |
311 | * Make sure single step bits etc are not set. | |
312 | */ | |
313 | void ptrace_disable(struct task_struct *child) | |
314 | { | |
315 | /* make sure the single step bit is not set. */ | |
316 | clear_single_step(child); | |
317 | } | |
318 | ||
e17666ba BH |
319 | /* |
320 | * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls, | |
321 | * we mark them as obsolete now, they will be removed in a future version | |
322 | */ | |
323 | static long arch_ptrace_old(struct task_struct *child, long request, long addr, | |
324 | long data) | |
325 | { | |
326 | int ret = -EPERM; | |
327 | ||
328 | switch(request) { | |
329 | case PPC_PTRACE_GETREGS: { /* Get GPRs 0 - 31. */ | |
330 | int i; | |
331 | unsigned long *reg = &((unsigned long *)child->thread.regs)[0]; | |
332 | unsigned long __user *tmp = (unsigned long __user *)addr; | |
333 | ||
334 | for (i = 0; i < 32; i++) { | |
335 | ret = put_user(*reg, tmp); | |
336 | if (ret) | |
337 | break; | |
338 | reg++; | |
339 | tmp++; | |
340 | } | |
341 | break; | |
342 | } | |
343 | ||
344 | case PPC_PTRACE_SETREGS: { /* Set GPRs 0 - 31. */ | |
345 | int i; | |
346 | unsigned long *reg = &((unsigned long *)child->thread.regs)[0]; | |
347 | unsigned long __user *tmp = (unsigned long __user *)addr; | |
348 | ||
349 | for (i = 0; i < 32; i++) { | |
350 | ret = get_user(*reg, tmp); | |
351 | if (ret) | |
352 | break; | |
353 | reg++; | |
354 | tmp++; | |
355 | } | |
356 | break; | |
357 | } | |
358 | ||
359 | case PPC_PTRACE_GETFPREGS: { /* Get FPRs 0 - 31. */ | |
360 | flush_fp_to_thread(child); | |
361 | ret = get_fpregs((void __user *)addr, child, 0); | |
362 | break; | |
363 | } | |
364 | ||
365 | case PPC_PTRACE_SETFPREGS: { /* Get FPRs 0 - 31. */ | |
366 | flush_fp_to_thread(child); | |
367 | ret = set_fpregs((void __user *)addr, child, 0); | |
368 | break; | |
369 | } | |
370 | ||
371 | } | |
372 | return ret; | |
373 | } | |
374 | ||
481bed45 | 375 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) |
1da177e4 | 376 | { |
1da177e4 LT |
377 | int ret = -EPERM; |
378 | ||
1da177e4 LT |
379 | switch (request) { |
380 | /* when I and D space are separate, these will need to be fixed. */ | |
381 | case PTRACE_PEEKTEXT: /* read word at location addr. */ | |
76647323 AD |
382 | case PTRACE_PEEKDATA: |
383 | ret = generic_ptrace_peekdata(child, addr, data); | |
1da177e4 | 384 | break; |
1da177e4 LT |
385 | |
386 | /* read the word at location addr in the USER area. */ | |
1da177e4 LT |
387 | case PTRACE_PEEKUSR: { |
388 | unsigned long index, tmp; | |
389 | ||
390 | ret = -EIO; | |
391 | /* convert to index and check */ | |
e8a30302 | 392 | #ifdef CONFIG_PPC32 |
1da177e4 | 393 | index = (unsigned long) addr >> 2; |
e8a30302 SR |
394 | if ((addr & 3) || (index > PT_FPSCR) |
395 | || (child->thread.regs == NULL)) | |
396 | #else | |
397 | index = (unsigned long) addr >> 3; | |
398 | if ((addr & 7) || (index > PT_FPSCR)) | |
399 | #endif | |
1da177e4 LT |
400 | break; |
401 | ||
402 | CHECK_FULL_REGS(child->thread.regs); | |
403 | if (index < PT_FPR0) { | |
865418d8 | 404 | tmp = ptrace_get_reg(child, (int) index); |
1da177e4 | 405 | } else { |
e8a30302 | 406 | flush_fp_to_thread(child); |
1da177e4 LT |
407 | tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; |
408 | } | |
409 | ret = put_user(tmp,(unsigned long __user *) data); | |
410 | break; | |
411 | } | |
412 | ||
413 | /* If I and D space are separate, this will have to be fixed. */ | |
414 | case PTRACE_POKETEXT: /* write the word at location addr. */ | |
415 | case PTRACE_POKEDATA: | |
f284ce72 | 416 | ret = generic_ptrace_pokedata(child, addr, data); |
1da177e4 LT |
417 | break; |
418 | ||
419 | /* write the word at location addr in the USER area */ | |
420 | case PTRACE_POKEUSR: { | |
421 | unsigned long index; | |
422 | ||
423 | ret = -EIO; | |
424 | /* convert to index and check */ | |
e8a30302 | 425 | #ifdef CONFIG_PPC32 |
1da177e4 | 426 | index = (unsigned long) addr >> 2; |
e8a30302 SR |
427 | if ((addr & 3) || (index > PT_FPSCR) |
428 | || (child->thread.regs == NULL)) | |
429 | #else | |
430 | index = (unsigned long) addr >> 3; | |
431 | if ((addr & 7) || (index > PT_FPSCR)) | |
432 | #endif | |
1da177e4 LT |
433 | break; |
434 | ||
435 | CHECK_FULL_REGS(child->thread.regs); | |
1da177e4 | 436 | if (index < PT_FPR0) { |
865418d8 | 437 | ret = ptrace_put_reg(child, index, data); |
1da177e4 | 438 | } else { |
e8a30302 | 439 | flush_fp_to_thread(child); |
1da177e4 LT |
440 | ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data; |
441 | ret = 0; | |
442 | } | |
443 | break; | |
444 | } | |
445 | ||
446 | case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ | |
447 | case PTRACE_CONT: { /* restart after signal. */ | |
448 | ret = -EIO; | |
7ed20e1a | 449 | if (!valid_signal(data)) |
1da177e4 | 450 | break; |
e8a30302 | 451 | if (request == PTRACE_SYSCALL) |
1da177e4 | 452 | set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); |
e8a30302 | 453 | else |
1da177e4 | 454 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); |
1da177e4 LT |
455 | child->exit_code = data; |
456 | /* make sure the single step bit is not set. */ | |
457 | clear_single_step(child); | |
458 | wake_up_process(child); | |
459 | ret = 0; | |
460 | break; | |
461 | } | |
462 | ||
463 | /* | |
464 | * make the child exit. Best I can do is send it a sigkill. | |
465 | * perhaps it should be put in the status that it wants to | |
466 | * exit. | |
467 | */ | |
468 | case PTRACE_KILL: { | |
469 | ret = 0; | |
470 | if (child->exit_state == EXIT_ZOMBIE) /* already dead */ | |
471 | break; | |
472 | child->exit_code = SIGKILL; | |
473 | /* make sure the single step bit is not set. */ | |
474 | clear_single_step(child); | |
475 | wake_up_process(child); | |
476 | break; | |
477 | } | |
478 | ||
479 | case PTRACE_SINGLESTEP: { /* set the trap flag. */ | |
480 | ret = -EIO; | |
7ed20e1a | 481 | if (!valid_signal(data)) |
1da177e4 LT |
482 | break; |
483 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
484 | set_single_step(child); | |
485 | child->exit_code = data; | |
486 | /* give it a chance to run. */ | |
487 | wake_up_process(child); | |
488 | ret = 0; | |
489 | break; | |
490 | } | |
491 | ||
e8a30302 SR |
492 | case PTRACE_GET_DEBUGREG: { |
493 | ret = -EINVAL; | |
494 | /* We only support one DABR and no IABRS at the moment */ | |
495 | if (addr > 0) | |
496 | break; | |
497 | ret = put_user(child->thread.dabr, | |
498 | (unsigned long __user *)data); | |
499 | break; | |
500 | } | |
501 | ||
502 | case PTRACE_SET_DEBUGREG: | |
503 | ret = ptrace_set_debugreg(child, addr, data); | |
504 | break; | |
e8a30302 | 505 | |
1da177e4 LT |
506 | case PTRACE_DETACH: |
507 | ret = ptrace_detach(child, data); | |
508 | break; | |
509 | ||
e17666ba BH |
510 | #ifdef CONFIG_PPC64 |
511 | case PTRACE_GETREGS64: | |
512 | #endif | |
513 | case PTRACE_GETREGS: { /* Get all pt_regs from the child. */ | |
514 | int ui; | |
515 | if (!access_ok(VERIFY_WRITE, (void __user *)data, | |
516 | sizeof(struct pt_regs))) { | |
517 | ret = -EIO; | |
518 | break; | |
519 | } | |
520 | ret = 0; | |
521 | for (ui = 0; ui < PT_REGS_COUNT; ui ++) { | |
865418d8 | 522 | ret |= __put_user(ptrace_get_reg(child, ui), |
e17666ba BH |
523 | (unsigned long __user *) data); |
524 | data += sizeof(long); | |
e8a30302 SR |
525 | } |
526 | break; | |
527 | } | |
528 | ||
e17666ba BH |
529 | #ifdef CONFIG_PPC64 |
530 | case PTRACE_SETREGS64: | |
531 | #endif | |
532 | case PTRACE_SETREGS: { /* Set all gp regs in the child. */ | |
533 | unsigned long tmp; | |
534 | int ui; | |
535 | if (!access_ok(VERIFY_READ, (void __user *)data, | |
536 | sizeof(struct pt_regs))) { | |
537 | ret = -EIO; | |
538 | break; | |
539 | } | |
540 | ret = 0; | |
541 | for (ui = 0; ui < PT_REGS_COUNT; ui ++) { | |
542 | ret = __get_user(tmp, (unsigned long __user *) data); | |
e8a30302 SR |
543 | if (ret) |
544 | break; | |
865418d8 | 545 | ptrace_put_reg(child, ui, tmp); |
e17666ba | 546 | data += sizeof(long); |
e8a30302 SR |
547 | } |
548 | break; | |
549 | } | |
550 | ||
e17666ba | 551 | case PTRACE_GETFPREGS: { /* Get the child FPU state (FPR0...31 + FPSCR) */ |
e8a30302 | 552 | flush_fp_to_thread(child); |
e17666ba | 553 | ret = get_fpregs((void __user *)data, child, 1); |
e8a30302 SR |
554 | break; |
555 | } | |
556 | ||
e17666ba | 557 | case PTRACE_SETFPREGS: { /* Set the child FPU state (FPR0...31 + FPSCR) */ |
e8a30302 | 558 | flush_fp_to_thread(child); |
e17666ba | 559 | ret = set_fpregs((void __user *)data, child, 1); |
e8a30302 SR |
560 | break; |
561 | } | |
e8a30302 | 562 | |
1da177e4 LT |
563 | #ifdef CONFIG_ALTIVEC |
564 | case PTRACE_GETVRREGS: | |
565 | /* Get the child altivec register state. */ | |
e8a30302 | 566 | flush_altivec_to_thread(child); |
1da177e4 LT |
567 | ret = get_vrregs((unsigned long __user *)data, child); |
568 | break; | |
569 | ||
570 | case PTRACE_SETVRREGS: | |
571 | /* Set the child altivec register state. */ | |
e8a30302 | 572 | flush_altivec_to_thread(child); |
1da177e4 LT |
573 | ret = set_vrregs(child, (unsigned long __user *)data); |
574 | break; | |
575 | #endif | |
576 | #ifdef CONFIG_SPE | |
577 | case PTRACE_GETEVRREGS: | |
578 | /* Get the child spe register state. */ | |
579 | if (child->thread.regs->msr & MSR_SPE) | |
580 | giveup_spe(child); | |
581 | ret = get_evrregs((unsigned long __user *)data, child); | |
582 | break; | |
583 | ||
584 | case PTRACE_SETEVRREGS: | |
585 | /* Set the child spe register state. */ | |
586 | /* this is to clear the MSR_SPE bit to force a reload | |
587 | * of register state from memory */ | |
588 | if (child->thread.regs->msr & MSR_SPE) | |
589 | giveup_spe(child); | |
590 | ret = set_evrregs(child, (unsigned long __user *)data); | |
591 | break; | |
592 | #endif | |
593 | ||
e17666ba BH |
594 | /* Old reverse args ptrace callss */ |
595 | case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */ | |
596 | case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */ | |
597 | case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */ | |
598 | case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */ | |
599 | ret = arch_ptrace_old(child, request, addr, data); | |
600 | break; | |
601 | ||
1da177e4 LT |
602 | default: |
603 | ret = ptrace_request(child, request, addr, data); | |
604 | break; | |
605 | } | |
1da177e4 LT |
606 | return ret; |
607 | } | |
608 | ||
ea9c102c | 609 | static void do_syscall_trace(void) |
1da177e4 | 610 | { |
ea9c102c DW |
611 | /* the 0x80 provides a way for the tracing parent to distinguish |
612 | between a syscall stop and SIGTRAP delivery */ | |
1da177e4 LT |
613 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) |
614 | ? 0x80 : 0)); | |
615 | ||
616 | /* | |
617 | * this isn't the same as continuing with a signal, but it will do | |
618 | * for normal use. strace only continues with a signal if the | |
619 | * stopping signal is not SIGTRAP. -brl | |
620 | */ | |
621 | if (current->exit_code) { | |
622 | send_sig(current->exit_code, current, 1); | |
623 | current->exit_code = 0; | |
624 | } | |
625 | } | |
ea9c102c DW |
626 | |
627 | void do_syscall_trace_enter(struct pt_regs *regs) | |
628 | { | |
e8a30302 | 629 | secure_computing(regs->gpr[0]); |
e8a30302 | 630 | |
ea9c102c DW |
631 | if (test_thread_flag(TIF_SYSCALL_TRACE) |
632 | && (current->ptrace & PT_PTRACED)) | |
633 | do_syscall_trace(); | |
634 | ||
cfcd1705 DW |
635 | if (unlikely(current->audit_context)) { |
636 | #ifdef CONFIG_PPC64 | |
637 | if (!test_thread_flag(TIF_32BIT)) | |
638 | audit_syscall_entry(AUDIT_ARCH_PPC64, | |
639 | regs->gpr[0], | |
640 | regs->gpr[3], regs->gpr[4], | |
641 | regs->gpr[5], regs->gpr[6]); | |
642 | else | |
e8a30302 | 643 | #endif |
cfcd1705 DW |
644 | audit_syscall_entry(AUDIT_ARCH_PPC, |
645 | regs->gpr[0], | |
646 | regs->gpr[3] & 0xffffffff, | |
647 | regs->gpr[4] & 0xffffffff, | |
648 | regs->gpr[5] & 0xffffffff, | |
649 | regs->gpr[6] & 0xffffffff); | |
650 | } | |
ea9c102c DW |
651 | } |
652 | ||
653 | void do_syscall_trace_leave(struct pt_regs *regs) | |
654 | { | |
ea9c102c | 655 | if (unlikely(current->audit_context)) |
4b9c876a | 656 | audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS, |
ea9c102c DW |
657 | regs->result); |
658 | ||
e8a30302 | 659 | if ((test_thread_flag(TIF_SYSCALL_TRACE) |
1bd79336 | 660 | || test_thread_flag(TIF_SINGLESTEP)) |
ea9c102c DW |
661 | && (current->ptrace & PT_PTRACED)) |
662 | do_syscall_trace(); | |
663 | } |