Commit | Line | Data |
---|---|---|
e05b3b4a PM |
1 | /* |
2 | * Common pmac/prep/chrp pci routines. -- Cort | |
3 | */ | |
4 | ||
e05b3b4a PM |
5 | #include <linux/kernel.h> |
6 | #include <linux/pci.h> | |
7 | #include <linux/delay.h> | |
8 | #include <linux/string.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/capability.h> | |
11 | #include <linux/sched.h> | |
12 | #include <linux/errno.h> | |
13 | #include <linux/bootmem.h> | |
c89ca593 | 14 | #include <linux/syscalls.h> |
6e99e458 | 15 | #include <linux/irq.h> |
f90bb153 | 16 | #include <linux/list.h> |
66524b22 | 17 | #include <linux/of.h> |
5a0e3ad6 | 18 | #include <linux/slab.h> |
93087948 | 19 | #include <linux/export.h> |
e05b3b4a PM |
20 | |
21 | #include <asm/processor.h> | |
22 | #include <asm/io.h> | |
23 | #include <asm/prom.h> | |
24 | #include <asm/sections.h> | |
25 | #include <asm/pci-bridge.h> | |
c3bd517d | 26 | #include <asm/ppc-pci.h> |
e05b3b4a | 27 | #include <asm/byteorder.h> |
7c0f6ba6 | 28 | #include <linux/uaccess.h> |
e05b3b4a PM |
29 | #include <asm/machdep.h> |
30 | ||
31 | #undef DEBUG | |
32 | ||
e05b3b4a | 33 | unsigned long isa_io_base = 0; |
e05b3b4a PM |
34 | unsigned long pci_dram_offset = 0; |
35 | int pcibios_assign_bus_offset = 1; | |
9445aa1a AV |
36 | EXPORT_SYMBOL(isa_io_base); |
37 | EXPORT_SYMBOL(pci_dram_offset); | |
e05b3b4a PM |
38 | |
39 | void pcibios_make_OF_bus_map(void); | |
40 | ||
e05b3b4a | 41 | static void fixup_cpc710_pci64(struct pci_dev* dev); |
e05b3b4a | 42 | static u8* pci_to_OF_bus_map; |
e05b3b4a PM |
43 | |
44 | /* By default, we don't re-assign bus numbers. We do this only on | |
45 | * some pmacs | |
46 | */ | |
fc3fb71c | 47 | static int pci_assign_all_buses; |
e05b3b4a | 48 | |
e05b3b4a PM |
49 | static int pci_bus_count; |
50 | ||
7b6b574c BH |
51 | /* This will remain NULL for now, until isa-bridge.c is made common |
52 | * to both 32-bit and 64-bit. | |
53 | */ | |
54 | struct pci_dev *isa_bridge_pcidev; | |
55 | EXPORT_SYMBOL_GPL(isa_bridge_pcidev); | |
56 | ||
e05b3b4a PM |
57 | static void |
58 | fixup_cpc710_pci64(struct pci_dev* dev) | |
59 | { | |
60 | /* Hide the PCI64 BARs from the kernel as their content doesn't | |
61 | * fit well in the resource management | |
62 | */ | |
63 | dev->resource[0].start = dev->resource[0].end = 0; | |
64 | dev->resource[0].flags = 0; | |
65 | dev->resource[1].start = dev->resource[1].end = 0; | |
66 | dev->resource[1].flags = 0; | |
67 | } | |
68 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64); | |
69 | ||
e05b3b4a PM |
70 | /* |
71 | * Functions below are used on OpenFirmware machines. | |
72 | */ | |
73 | static void | |
74 | make_one_node_map(struct device_node* node, u8 pci_bus) | |
75 | { | |
a7f67bdf | 76 | const int *bus_range; |
e05b3b4a PM |
77 | int len; |
78 | ||
79 | if (pci_bus >= pci_bus_count) | |
80 | return; | |
e2eb6392 | 81 | bus_range = of_get_property(node, "bus-range", &len); |
e05b3b4a | 82 | if (bus_range == NULL || len < 2 * sizeof(int)) { |
b7c670d6 RH |
83 | printk(KERN_WARNING "Can't get bus-range for %pOF, " |
84 | "assuming it starts at 0\n", node); | |
e05b3b4a PM |
85 | pci_to_OF_bus_map[pci_bus] = 0; |
86 | } else | |
87 | pci_to_OF_bus_map[pci_bus] = bus_range[0]; | |
88 | ||
66524b22 | 89 | for_each_child_of_node(node, node) { |
e05b3b4a | 90 | struct pci_dev* dev; |
a7f67bdf | 91 | const unsigned int *class_code, *reg; |
e05b3b4a | 92 | |
e2eb6392 | 93 | class_code = of_get_property(node, "class-code", NULL); |
e05b3b4a PM |
94 | if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI && |
95 | (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) | |
96 | continue; | |
e2eb6392 | 97 | reg = of_get_property(node, "reg", NULL); |
e05b3b4a PM |
98 | if (!reg) |
99 | continue; | |
50ed5780 SK |
100 | dev = pci_get_domain_bus_and_slot(0, pci_bus, |
101 | ((reg[0] >> 8) & 0xff)); | |
ab462768 AC |
102 | if (!dev || !dev->subordinate) { |
103 | pci_dev_put(dev); | |
e05b3b4a | 104 | continue; |
ab462768 | 105 | } |
e05b3b4a | 106 | make_one_node_map(node, dev->subordinate->number); |
ab462768 | 107 | pci_dev_put(dev); |
e05b3b4a PM |
108 | } |
109 | } | |
110 | ||
111 | void | |
112 | pcibios_make_OF_bus_map(void) | |
113 | { | |
114 | int i; | |
a4c9e328 | 115 | struct pci_controller *hose, *tmp; |
a7f67bdf | 116 | struct property *map_prop; |
8c8dc322 | 117 | struct device_node *dn; |
e05b3b4a | 118 | |
5cbded58 | 119 | pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL); |
e05b3b4a PM |
120 | if (!pci_to_OF_bus_map) { |
121 | printk(KERN_ERR "Can't allocate OF bus map !\n"); | |
122 | return; | |
123 | } | |
124 | ||
125 | /* We fill the bus map with invalid values, that helps | |
126 | * debugging. | |
127 | */ | |
128 | for (i=0; i<pci_bus_count; i++) | |
129 | pci_to_OF_bus_map[i] = 0xff; | |
130 | ||
131 | /* For each hose, we begin searching bridges */ | |
a4c9e328 | 132 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
44ef3390 SR |
133 | struct device_node* node = hose->dn; |
134 | ||
e05b3b4a PM |
135 | if (!node) |
136 | continue; | |
137 | make_one_node_map(node, hose->first_busno); | |
138 | } | |
8c8dc322 SR |
139 | dn = of_find_node_by_path("/"); |
140 | map_prop = of_find_property(dn, "pci-OF-bus-map", NULL); | |
a7f67bdf JK |
141 | if (map_prop) { |
142 | BUG_ON(pci_bus_count > map_prop->length); | |
143 | memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count); | |
144 | } | |
8c8dc322 | 145 | of_node_put(dn); |
e05b3b4a PM |
146 | #ifdef DEBUG |
147 | printk("PCI->OF bus map:\n"); | |
148 | for (i=0; i<pci_bus_count; i++) { | |
149 | if (pci_to_OF_bus_map[i] == 0xff) | |
150 | continue; | |
151 | printk("%d -> %d\n", i, pci_to_OF_bus_map[i]); | |
152 | } | |
153 | #endif | |
154 | } | |
155 | ||
e05b3b4a PM |
156 | |
157 | /* | |
158 | * Returns the PCI device matching a given OF node | |
159 | */ | |
98d9f30c | 160 | int pci_device_from_OF_node(struct device_node *node, u8 *bus, u8 *devfn) |
e05b3b4a | 161 | { |
98d9f30c BH |
162 | struct pci_dev *dev = NULL; |
163 | const __be32 *reg; | |
164 | int size; | |
165 | ||
166 | /* Check if it might have a chance to be a PCI device */ | |
167 | if (!pci_find_hose_for_OF_device(node)) | |
e05b3b4a | 168 | return -ENODEV; |
98d9f30c BH |
169 | |
170 | reg = of_get_property(node, "reg", &size); | |
171 | if (!reg || size < 5 * sizeof(u32)) | |
e05b3b4a | 172 | return -ENODEV; |
98d9f30c BH |
173 | |
174 | *bus = (be32_to_cpup(®[0]) >> 16) & 0xff; | |
175 | *devfn = (be32_to_cpup(®[0]) >> 8) & 0xff; | |
e05b3b4a PM |
176 | |
177 | /* Ok, here we need some tweak. If we have already renumbered | |
178 | * all busses, we can't rely on the OF bus number any more. | |
179 | * the pci_to_OF_bus_map is not enough as several PCI busses | |
180 | * may match the same OF bus number. | |
181 | */ | |
182 | if (!pci_to_OF_bus_map) | |
183 | return 0; | |
184 | ||
185 | for_each_pci_dev(dev) | |
186 | if (pci_to_OF_bus_map[dev->bus->number] == *bus && | |
187 | dev->devfn == *devfn) { | |
188 | *bus = dev->bus->number; | |
189 | pci_dev_put(dev); | |
190 | return 0; | |
191 | } | |
192 | ||
193 | return -ENODEV; | |
194 | } | |
195 | EXPORT_SYMBOL(pci_device_from_OF_node); | |
196 | ||
e05b3b4a PM |
197 | /* We create the "pci-OF-bus-map" property now so it appears in the |
198 | * /proc device tree | |
199 | */ | |
200 | void __init | |
201 | pci_create_OF_bus_map(void) | |
202 | { | |
203 | struct property* of_prop; | |
8c8dc322 SR |
204 | struct device_node *dn; |
205 | ||
eb31d559 | 206 | of_prop = memblock_alloc(sizeof(struct property) + 256, 0); |
8c8dc322 SR |
207 | dn = of_find_node_by_path("/"); |
208 | if (dn) { | |
e05b3b4a PM |
209 | memset(of_prop, -1, sizeof(struct property) + 256); |
210 | of_prop->name = "pci-OF-bus-map"; | |
211 | of_prop->length = 256; | |
1a38147e | 212 | of_prop->value = &of_prop[1]; |
79d1c712 | 213 | of_add_property(dn, of_prop); |
8c8dc322 | 214 | of_node_put(dn); |
e05b3b4a PM |
215 | } |
216 | } | |
217 | ||
cad5cef6 | 218 | void pcibios_setup_phb_io_space(struct pci_controller *hose) |
53280323 | 219 | { |
53280323 BH |
220 | unsigned long io_offset; |
221 | struct resource *res = &hose->io_resource; | |
222 | ||
53280323 | 223 | /* Fixup IO space offset */ |
38973ba7 BH |
224 | io_offset = pcibios_io_space_offset(hose); |
225 | res->start += io_offset; | |
226 | res->end += io_offset; | |
53280323 BH |
227 | } |
228 | ||
3fd94c6b | 229 | static int __init pcibios_init(void) |
e05b3b4a | 230 | { |
a4c9e328 | 231 | struct pci_controller *hose, *tmp; |
a4c9e328 | 232 | int next_busno = 0; |
e05b3b4a PM |
233 | |
234 | printk(KERN_INFO "PCI: Probing PCI hardware\n"); | |
235 | ||
0e47ff1c | 236 | if (pci_has_flag(PCI_REASSIGN_ALL_BUS)) |
fc3fb71c BH |
237 | pci_assign_all_buses = 1; |
238 | ||
e05b3b4a | 239 | /* Scan all of the recorded PCI controllers. */ |
a4c9e328 | 240 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
e05b3b4a PM |
241 | if (pci_assign_all_buses) |
242 | hose->first_busno = next_busno; | |
243 | hose->last_busno = 0xff; | |
b5d937de | 244 | pcibios_scan_phb(hose); |
53280323 | 245 | pci_bus_add_devices(hose->bus); |
e05b3b4a PM |
246 | if (pci_assign_all_buses || next_busno <= hose->last_busno) |
247 | next_busno = hose->last_busno + pcibios_assign_bus_offset; | |
248 | } | |
249 | pci_bus_count = next_busno; | |
250 | ||
251 | /* OpenFirmware based machines need a map of OF bus | |
252 | * numbers vs. kernel bus numbers since we may have to | |
253 | * remap them. | |
254 | */ | |
6b82b3e4 | 255 | if (pci_assign_all_buses) |
e05b3b4a PM |
256 | pcibios_make_OF_bus_map(); |
257 | ||
3fd94c6b BH |
258 | /* Call common code to handle resource allocation */ |
259 | pcibios_resource_survey(); | |
e05b3b4a PM |
260 | |
261 | /* Call machine dependent post-init code */ | |
262 | if (ppc_md.pcibios_after_init) | |
263 | ppc_md.pcibios_after_init(); | |
264 | ||
265 | return 0; | |
266 | } | |
267 | ||
268 | subsys_initcall(pcibios_init); | |
269 | ||
0b1d40c4 | 270 | static struct pci_controller* |
e05b3b4a PM |
271 | pci_bus_to_hose(int bus) |
272 | { | |
a4c9e328 | 273 | struct pci_controller *hose, *tmp; |
e05b3b4a | 274 | |
a4c9e328 | 275 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) |
e05b3b4a PM |
276 | if (bus >= hose->first_busno && bus <= hose->last_busno) |
277 | return hose; | |
278 | return NULL; | |
279 | } | |
280 | ||
e05b3b4a PM |
281 | /* Provide information on locations of various I/O regions in physical |
282 | * memory. Do this on a per-card basis so that we choose the right | |
283 | * root bridge. | |
284 | * Note that the returned IO or memory base is a physical address | |
285 | */ | |
286 | ||
3691d614 AV |
287 | SYSCALL_DEFINE3(pciconfig_iobase, long, which, |
288 | unsigned long, bus, unsigned long, devfn) | |
e05b3b4a PM |
289 | { |
290 | struct pci_controller* hose; | |
291 | long result = -EOPNOTSUPP; | |
292 | ||
e05b3b4a PM |
293 | hose = pci_bus_to_hose(bus); |
294 | if (!hose) | |
295 | return -ENODEV; | |
296 | ||
297 | switch (which) { | |
298 | case IOBASE_BRIDGE_NUMBER: | |
299 | return (long)hose->first_busno; | |
300 | case IOBASE_MEMORY: | |
3fd47f06 | 301 | return (long)hose->mem_offset[0]; |
e05b3b4a PM |
302 | case IOBASE_IO: |
303 | return (long)hose->io_base_phys; | |
304 | case IOBASE_ISA_IO: | |
305 | return (long)isa_io_base; | |
306 | case IOBASE_ISA_MEM: | |
307 | return (long)isa_mem_base; | |
308 | } | |
309 | ||
310 | return result; | |
311 | } |