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1 | /* |
2 | * Contains common pci routines for ALL ppc platform | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License | |
6 | * as published by the Free Software Foundation; either version | |
7 | * 2 of the License, or (at your option) any later version. | |
8 | */ | |
9 | ||
10 | #undef DEBUG | |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/pci.h> | |
14 | #include <linux/string.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/bootmem.h> | |
17 | #include <linux/mm.h> | |
18 | #include <linux/list.h> | |
19 | #include <linux/syscalls.h> | |
20 | #include <linux/irq.h> | |
21 | #include <linux/vmalloc.h> | |
22 | ||
23 | #include <asm/processor.h> | |
24 | #include <asm/io.h> | |
25 | #include <asm/prom.h> | |
26 | #include <asm/pci-bridge.h> | |
27 | #include <asm/byteorder.h> | |
28 | #include <asm/machdep.h> | |
29 | #include <asm/ppc-pci.h> | |
30 | #include <asm/firmware.h> | |
31 | ||
32 | #ifdef DEBUG | |
33 | #include <asm/udbg.h> | |
34 | #define DBG(fmt...) printk(fmt) | |
35 | #else | |
36 | #define DBG(fmt...) | |
37 | #endif | |
38 | ||
39 | /* | |
40 | * Return the domain number for this bus. | |
41 | */ | |
42 | int pci_domain_nr(struct pci_bus *bus) | |
43 | { | |
44 | if (firmware_has_feature(FW_FEATURE_ISERIES)) | |
45 | return 0; | |
46 | else { | |
47 | struct pci_controller *hose = pci_bus_to_host(bus); | |
48 | ||
49 | return hose->global_number; | |
50 | } | |
51 | } | |
52 | ||
53 | EXPORT_SYMBOL(pci_domain_nr); | |
58083dad KG |
54 | |
55 | #ifdef CONFIG_PPC_OF | |
56 | static ssize_t pci_show_devspec(struct device *dev, | |
57 | struct device_attribute *attr, char *buf) | |
58 | { | |
59 | struct pci_dev *pdev; | |
60 | struct device_node *np; | |
61 | ||
62 | pdev = to_pci_dev (dev); | |
63 | np = pci_device_to_OF_node(pdev); | |
64 | if (np == NULL || np->full_name == NULL) | |
65 | return 0; | |
66 | return sprintf(buf, "%s", np->full_name); | |
67 | } | |
68 | static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL); | |
69 | #endif /* CONFIG_PPC_OF */ | |
70 | ||
71 | /* Add sysfs properties */ | |
72 | void pcibios_add_platform_entries(struct pci_dev *pdev) | |
73 | { | |
74 | #ifdef CONFIG_PPC_OF | |
75 | device_create_file(&pdev->dev, &dev_attr_devspec); | |
76 | #endif /* CONFIG_PPC_OF */ | |
77 | } | |
78 | ||
79 | char __init *pcibios_setup(char *str) | |
80 | { | |
81 | return str; | |
82 | } | |
83 | ||
84 | /* | |
85 | * Reads the interrupt pin to determine if interrupt is use by card. | |
86 | * If the interrupt is used, then gets the interrupt line from the | |
87 | * openfirmware and sets it in the pci_dev and pci_config line. | |
88 | */ | |
89 | int pci_read_irq_line(struct pci_dev *pci_dev) | |
90 | { | |
91 | struct of_irq oirq; | |
92 | unsigned int virq; | |
93 | ||
94 | DBG("Try to map irq for %s...\n", pci_name(pci_dev)); | |
95 | ||
96 | #ifdef DEBUG | |
97 | memset(&oirq, 0xff, sizeof(oirq)); | |
98 | #endif | |
99 | /* Try to get a mapping from the device-tree */ | |
100 | if (of_irq_map_pci(pci_dev, &oirq)) { | |
101 | u8 line, pin; | |
102 | ||
103 | /* If that fails, lets fallback to what is in the config | |
104 | * space and map that through the default controller. We | |
105 | * also set the type to level low since that's what PCI | |
106 | * interrupts are. If your platform does differently, then | |
107 | * either provide a proper interrupt tree or don't use this | |
108 | * function. | |
109 | */ | |
110 | if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin)) | |
111 | return -1; | |
112 | if (pin == 0) | |
113 | return -1; | |
114 | if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) || | |
115 | line == 0xff) { | |
116 | return -1; | |
117 | } | |
118 | DBG(" -> no map ! Using irq line %d from PCI config\n", line); | |
119 | ||
120 | virq = irq_create_mapping(NULL, line); | |
121 | if (virq != NO_IRQ) | |
122 | set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); | |
123 | } else { | |
124 | DBG(" -> got one, spec %d cells (0x%08x 0x%08x...) on %s\n", | |
125 | oirq.size, oirq.specifier[0], oirq.specifier[1], | |
126 | oirq.controller->full_name); | |
127 | ||
128 | virq = irq_create_of_mapping(oirq.controller, oirq.specifier, | |
129 | oirq.size); | |
130 | } | |
131 | if(virq == NO_IRQ) { | |
132 | DBG(" -> failed to map !\n"); | |
133 | return -1; | |
134 | } | |
135 | ||
136 | DBG(" -> mapped to linux irq %d\n", virq); | |
137 | ||
138 | pci_dev->irq = virq; | |
139 | ||
140 | return 0; | |
141 | } | |
142 | EXPORT_SYMBOL(pci_read_irq_line); | |
143 | ||
144 | /* | |
145 | * Platform support for /proc/bus/pci/X/Y mmap()s, | |
146 | * modelled on the sparc64 implementation by Dave Miller. | |
147 | * -- paulus. | |
148 | */ | |
149 | ||
150 | /* | |
151 | * Adjust vm_pgoff of VMA such that it is the physical page offset | |
152 | * corresponding to the 32-bit pci bus offset for DEV requested by the user. | |
153 | * | |
154 | * Basically, the user finds the base address for his device which he wishes | |
155 | * to mmap. They read the 32-bit value from the config space base register, | |
156 | * add whatever PAGE_SIZE multiple offset they wish, and feed this into the | |
157 | * offset parameter of mmap on /proc/bus/pci/XXX for that device. | |
158 | * | |
159 | * Returns negative error code on failure, zero on success. | |
160 | */ | |
161 | static struct resource *__pci_mmap_make_offset(struct pci_dev *dev, | |
162 | resource_size_t *offset, | |
163 | enum pci_mmap_state mmap_state) | |
164 | { | |
165 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | |
166 | unsigned long io_offset = 0; | |
167 | int i, res_bit; | |
168 | ||
169 | if (hose == 0) | |
170 | return NULL; /* should never happen */ | |
171 | ||
172 | /* If memory, add on the PCI bridge address offset */ | |
173 | if (mmap_state == pci_mmap_mem) { | |
174 | #if 0 /* See comment in pci_resource_to_user() for why this is disabled */ | |
175 | *offset += hose->pci_mem_offset; | |
176 | #endif | |
177 | res_bit = IORESOURCE_MEM; | |
178 | } else { | |
179 | io_offset = (unsigned long)hose->io_base_virt - _IO_BASE; | |
180 | *offset += io_offset; | |
181 | res_bit = IORESOURCE_IO; | |
182 | } | |
183 | ||
184 | /* | |
185 | * Check that the offset requested corresponds to one of the | |
186 | * resources of the device. | |
187 | */ | |
188 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) { | |
189 | struct resource *rp = &dev->resource[i]; | |
190 | int flags = rp->flags; | |
191 | ||
192 | /* treat ROM as memory (should be already) */ | |
193 | if (i == PCI_ROM_RESOURCE) | |
194 | flags |= IORESOURCE_MEM; | |
195 | ||
196 | /* Active and same type? */ | |
197 | if ((flags & res_bit) == 0) | |
198 | continue; | |
199 | ||
200 | /* In the range of this resource? */ | |
201 | if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end) | |
202 | continue; | |
203 | ||
204 | /* found it! construct the final physical address */ | |
205 | if (mmap_state == pci_mmap_io) | |
206 | *offset += hose->io_base_phys - io_offset; | |
207 | return rp; | |
208 | } | |
209 | ||
210 | return NULL; | |
211 | } | |
212 | ||
213 | /* | |
214 | * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci | |
215 | * device mapping. | |
216 | */ | |
217 | static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp, | |
218 | pgprot_t protection, | |
219 | enum pci_mmap_state mmap_state, | |
220 | int write_combine) | |
221 | { | |
222 | unsigned long prot = pgprot_val(protection); | |
223 | ||
224 | /* Write combine is always 0 on non-memory space mappings. On | |
225 | * memory space, if the user didn't pass 1, we check for a | |
226 | * "prefetchable" resource. This is a bit hackish, but we use | |
227 | * this to workaround the inability of /sysfs to provide a write | |
228 | * combine bit | |
229 | */ | |
230 | if (mmap_state != pci_mmap_mem) | |
231 | write_combine = 0; | |
232 | else if (write_combine == 0) { | |
233 | if (rp->flags & IORESOURCE_PREFETCH) | |
234 | write_combine = 1; | |
235 | } | |
236 | ||
237 | /* XXX would be nice to have a way to ask for write-through */ | |
238 | prot |= _PAGE_NO_CACHE; | |
239 | if (write_combine) | |
240 | prot &= ~_PAGE_GUARDED; | |
241 | else | |
242 | prot |= _PAGE_GUARDED; | |
243 | ||
244 | return __pgprot(prot); | |
245 | } | |
246 | ||
247 | /* | |
248 | * This one is used by /dev/mem and fbdev who have no clue about the | |
249 | * PCI device, it tries to find the PCI device first and calls the | |
250 | * above routine | |
251 | */ | |
252 | pgprot_t pci_phys_mem_access_prot(struct file *file, | |
253 | unsigned long pfn, | |
254 | unsigned long size, | |
255 | pgprot_t protection) | |
256 | { | |
257 | struct pci_dev *pdev = NULL; | |
258 | struct resource *found = NULL; | |
259 | unsigned long prot = pgprot_val(protection); | |
260 | unsigned long offset = pfn << PAGE_SHIFT; | |
261 | int i; | |
262 | ||
263 | if (page_is_ram(pfn)) | |
264 | return __pgprot(prot); | |
265 | ||
266 | prot |= _PAGE_NO_CACHE | _PAGE_GUARDED; | |
267 | ||
268 | for_each_pci_dev(pdev) { | |
269 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) { | |
270 | struct resource *rp = &pdev->resource[i]; | |
271 | int flags = rp->flags; | |
272 | ||
273 | /* Active and same type? */ | |
274 | if ((flags & IORESOURCE_MEM) == 0) | |
275 | continue; | |
276 | /* In the range of this resource? */ | |
277 | if (offset < (rp->start & PAGE_MASK) || | |
278 | offset > rp->end) | |
279 | continue; | |
280 | found = rp; | |
281 | break; | |
282 | } | |
283 | if (found) | |
284 | break; | |
285 | } | |
286 | if (found) { | |
287 | if (found->flags & IORESOURCE_PREFETCH) | |
288 | prot &= ~_PAGE_GUARDED; | |
289 | pci_dev_put(pdev); | |
290 | } | |
291 | ||
292 | DBG("non-PCI map for %lx, prot: %lx\n", offset, prot); | |
293 | ||
294 | return __pgprot(prot); | |
295 | } | |
296 | ||
297 | ||
298 | /* | |
299 | * Perform the actual remap of the pages for a PCI device mapping, as | |
300 | * appropriate for this architecture. The region in the process to map | |
301 | * is described by vm_start and vm_end members of VMA, the base physical | |
302 | * address is found in vm_pgoff. | |
303 | * The pci device structure is provided so that architectures may make mapping | |
304 | * decisions on a per-device or per-bus basis. | |
305 | * | |
306 | * Returns a negative error code on failure, zero on success. | |
307 | */ | |
308 | int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
309 | enum pci_mmap_state mmap_state, int write_combine) | |
310 | { | |
311 | resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT; | |
312 | struct resource *rp; | |
313 | int ret; | |
314 | ||
315 | rp = __pci_mmap_make_offset(dev, &offset, mmap_state); | |
316 | if (rp == NULL) | |
317 | return -EINVAL; | |
318 | ||
319 | vma->vm_pgoff = offset >> PAGE_SHIFT; | |
320 | vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp, | |
321 | vma->vm_page_prot, | |
322 | mmap_state, write_combine); | |
323 | ||
324 | ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, | |
325 | vma->vm_end - vma->vm_start, vma->vm_page_prot); | |
326 | ||
327 | return ret; | |
328 | } | |
329 | ||
330 | void pci_resource_to_user(const struct pci_dev *dev, int bar, | |
331 | const struct resource *rsrc, | |
332 | resource_size_t *start, resource_size_t *end) | |
333 | { | |
334 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | |
335 | resource_size_t offset = 0; | |
336 | ||
337 | if (hose == NULL) | |
338 | return; | |
339 | ||
340 | if (rsrc->flags & IORESOURCE_IO) | |
341 | offset = (unsigned long)hose->io_base_virt - _IO_BASE; | |
342 | ||
343 | /* We pass a fully fixed up address to userland for MMIO instead of | |
344 | * a BAR value because X is lame and expects to be able to use that | |
345 | * to pass to /dev/mem ! | |
346 | * | |
347 | * That means that we'll have potentially 64 bits values where some | |
348 | * userland apps only expect 32 (like X itself since it thinks only | |
349 | * Sparc has 64 bits MMIO) but if we don't do that, we break it on | |
350 | * 32 bits CHRPs :-( | |
351 | * | |
352 | * Hopefully, the sysfs insterface is immune to that gunk. Once X | |
353 | * has been fixed (and the fix spread enough), we can re-enable the | |
354 | * 2 lines below and pass down a BAR value to userland. In that case | |
355 | * we'll also have to re-enable the matching code in | |
356 | * __pci_mmap_make_offset(). | |
357 | * | |
358 | * BenH. | |
359 | */ | |
360 | #if 0 | |
361 | else if (rsrc->flags & IORESOURCE_MEM) | |
362 | offset = hose->pci_mem_offset; | |
363 | #endif | |
364 | ||
365 | *start = rsrc->start - offset; | |
366 | *end = rsrc->end - offset; | |
367 | } |