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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
463ce0e1 BH |
2 | #include <linux/kernel.h> |
3 | #include <linux/serial.h> | |
4 | #include <linux/serial_8250.h> | |
5 | #include <linux/serial_core.h> | |
6 | #include <linux/console.h> | |
7 | #include <linux/pci.h> | |
22ae782f | 8 | #include <linux/of_address.h> |
1a7507c7 | 9 | #include <linux/of_device.h> |
e6f6390a | 10 | #include <linux/of_irq.h> |
7df5659e | 11 | #include <linux/serial_reg.h> |
463ce0e1 BH |
12 | #include <asm/io.h> |
13 | #include <asm/mmu.h> | |
463ce0e1 BH |
14 | #include <asm/serial.h> |
15 | #include <asm/udbg.h> | |
16 | #include <asm/pci-bridge.h> | |
17 | #include <asm/ppc-pci.h> | |
0bd3f9e9 | 18 | #include <asm/early_ioremap.h> |
463ce0e1 BH |
19 | |
20 | #undef DEBUG | |
21 | ||
22 | #ifdef DEBUG | |
23 | #define DBG(fmt...) do { printk(fmt); } while(0) | |
24 | #else | |
25 | #define DBG(fmt...) do { } while(0) | |
26 | #endif | |
27 | ||
28 | #define MAX_LEGACY_SERIAL_PORTS 8 | |
29 | ||
30 | static struct plat_serial8250_port | |
31 | legacy_serial_ports[MAX_LEGACY_SERIAL_PORTS+1]; | |
32 | static struct legacy_serial_info { | |
33 | struct device_node *np; | |
34 | unsigned int speed; | |
35 | unsigned int clock; | |
0ebfff14 | 36 | int irq_check_parent; |
463ce0e1 | 37 | phys_addr_t taddr; |
0bd3f9e9 | 38 | void __iomem *early_addr; |
463ce0e1 | 39 | } legacy_serial_infos[MAX_LEGACY_SERIAL_PORTS]; |
1a7507c7 | 40 | |
ce6d73c9 | 41 | static const struct of_device_id legacy_serial_parents[] __initconst = { |
1a7507c7 PG |
42 | {.type = "soc",}, |
43 | {.type = "tsi-bridge",}, | |
f5903ede ME |
44 | {.type = "opb", }, |
45 | {.compatible = "ibm,opb",}, | |
1a7507c7 PG |
46 | {.compatible = "simple-bus",}, |
47 | {.compatible = "wrs,epld-localbus",}, | |
3bc5ab9b | 48 | {}, |
1a7507c7 PG |
49 | }; |
50 | ||
463ce0e1 BH |
51 | static unsigned int legacy_serial_count; |
52 | static int legacy_serial_console = -1; | |
53 | ||
c4cad90f BH |
54 | static const upf_t legacy_port_flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | |
55 | UPF_SHARE_IRQ | UPF_FIXED_PORT; | |
56 | ||
7df5659e AB |
57 | static unsigned int tsi_serial_in(struct uart_port *p, int offset) |
58 | { | |
59 | unsigned int tmp; | |
60 | offset = offset << p->regshift; | |
61 | if (offset == UART_IIR) { | |
62 | tmp = readl(p->membase + (UART_IIR & ~3)); | |
63 | return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */ | |
64 | } else | |
65 | return readb(p->membase + offset); | |
66 | } | |
67 | ||
68 | static void tsi_serial_out(struct uart_port *p, int offset, int value) | |
69 | { | |
70 | offset = offset << p->regshift; | |
71 | if (!((offset == UART_IER) && (value & UART_IER_UUE))) | |
72 | writeb(value, p->membase + offset); | |
73 | } | |
74 | ||
463ce0e1 BH |
75 | static int __init add_legacy_port(struct device_node *np, int want_index, |
76 | int iotype, phys_addr_t base, | |
b580d46c | 77 | phys_addr_t taddr, unsigned long irq, |
0ebfff14 | 78 | upf_t flags, int irq_check_parent) |
463ce0e1 | 79 | { |
13ae4037 | 80 | const __be32 *clk, *spd, *rs; |
a7f67bdf | 81 | u32 clock = BASE_BAUD * 16; |
13ae4037 | 82 | u32 shift = 0; |
463ce0e1 BH |
83 | int index; |
84 | ||
85 | /* get clock freq. if present */ | |
e2eb6392 | 86 | clk = of_get_property(np, "clock-frequency", NULL); |
31df1678 | 87 | if (clk && *clk) |
f14362d1 | 88 | clock = be32_to_cpup(clk); |
463ce0e1 BH |
89 | |
90 | /* get default speed if present */ | |
e2eb6392 | 91 | spd = of_get_property(np, "current-speed", NULL); |
463ce0e1 | 92 | |
13ae4037 SC |
93 | /* get register shift if present */ |
94 | rs = of_get_property(np, "reg-shift", NULL); | |
95 | if (rs && *rs) | |
96 | shift = be32_to_cpup(rs); | |
97 | ||
463ce0e1 BH |
98 | /* If we have a location index, then try to use it */ |
99 | if (want_index >= 0 && want_index < MAX_LEGACY_SERIAL_PORTS) | |
100 | index = want_index; | |
101 | else | |
102 | index = legacy_serial_count; | |
103 | ||
104 | /* if our index is still out of range, that mean that | |
105 | * array is full, we could scan for a free slot but that | |
106 | * make little sense to bother, just skip the port | |
107 | */ | |
108 | if (index >= MAX_LEGACY_SERIAL_PORTS) | |
109 | return -1; | |
110 | if (index >= legacy_serial_count) | |
111 | legacy_serial_count = index + 1; | |
112 | ||
113 | /* Check if there is a port who already claimed our slot */ | |
b0d436c7 | 114 | if (legacy_serial_infos[index].np != NULL) { |
463ce0e1 BH |
115 | /* if we still have some room, move it, else override */ |
116 | if (legacy_serial_count < MAX_LEGACY_SERIAL_PORTS) { | |
0ebfff14 | 117 | printk(KERN_DEBUG "Moved legacy port %d -> %d\n", |
463ce0e1 BH |
118 | index, legacy_serial_count); |
119 | legacy_serial_ports[legacy_serial_count] = | |
120 | legacy_serial_ports[index]; | |
121 | legacy_serial_infos[legacy_serial_count] = | |
122 | legacy_serial_infos[index]; | |
123 | legacy_serial_count++; | |
124 | } else { | |
0ebfff14 | 125 | printk(KERN_DEBUG "Replacing legacy port %d\n", index); |
463ce0e1 BH |
126 | } |
127 | } | |
128 | ||
129 | /* Now fill the entry */ | |
130 | memset(&legacy_serial_ports[index], 0, | |
131 | sizeof(struct plat_serial8250_port)); | |
132 | if (iotype == UPIO_PORT) | |
133 | legacy_serial_ports[index].iobase = base; | |
134 | else | |
8dacaedf | 135 | legacy_serial_ports[index].mapbase = base; |
7df5659e | 136 | |
463ce0e1 BH |
137 | legacy_serial_ports[index].iotype = iotype; |
138 | legacy_serial_ports[index].uartclk = clock; | |
139 | legacy_serial_ports[index].irq = irq; | |
b580d46c | 140 | legacy_serial_ports[index].flags = flags; |
13ae4037 | 141 | legacy_serial_ports[index].regshift = shift; |
463ce0e1 BH |
142 | legacy_serial_infos[index].taddr = taddr; |
143 | legacy_serial_infos[index].np = of_node_get(np); | |
144 | legacy_serial_infos[index].clock = clock; | |
f14362d1 | 145 | legacy_serial_infos[index].speed = spd ? be32_to_cpup(spd) : 0; |
0ebfff14 | 146 | legacy_serial_infos[index].irq_check_parent = irq_check_parent; |
463ce0e1 | 147 | |
7df5659e AB |
148 | if (iotype == UPIO_TSI) { |
149 | legacy_serial_ports[index].serial_in = tsi_serial_in; | |
150 | legacy_serial_ports[index].serial_out = tsi_serial_out; | |
151 | } | |
152 | ||
b7c670d6 RH |
153 | printk(KERN_DEBUG "Found legacy serial port %d for %pOF\n", |
154 | index, np); | |
0ebfff14 | 155 | printk(KERN_DEBUG " %s=%llx, taddr=%llx, irq=%lx, clk=%d, speed=%d\n", |
463ce0e1 BH |
156 | (iotype == UPIO_PORT) ? "port" : "mem", |
157 | (unsigned long long)base, (unsigned long long)taddr, irq, | |
158 | legacy_serial_ports[index].uartclk, | |
159 | legacy_serial_infos[index].speed); | |
160 | ||
161 | return index; | |
162 | } | |
163 | ||
b580d46c KG |
164 | static int __init add_legacy_soc_port(struct device_node *np, |
165 | struct device_node *soc_dev) | |
166 | { | |
f704b8d1 | 167 | u64 addr; |
4a396dc6 | 168 | const __be32 *addrp; |
be9633e9 | 169 | struct device_node *tsi = of_get_parent(np); |
b580d46c KG |
170 | |
171 | /* We only support ports that have a clock frequency properly | |
172 | * encoded in the device-tree. | |
173 | */ | |
e2eb6392 | 174 | if (of_get_property(np, "clock-frequency", NULL) == NULL) |
b580d46c KG |
175 | return -1; |
176 | ||
13ae4037 SC |
177 | /* if reg-offset don't try to use it */ |
178 | if ((of_get_property(np, "reg-offset", NULL) != NULL)) | |
1e6d1f26 JL |
179 | return -1; |
180 | ||
8d38a5b2 | 181 | /* if rtas uses this device, don't try to use it as well */ |
e2eb6392 | 182 | if (of_get_property(np, "used-by-rtas", NULL) != NULL) |
8d38a5b2 AB |
183 | return -1; |
184 | ||
b580d46c KG |
185 | /* Get the address */ |
186 | addrp = of_get_address(soc_dev, 0, NULL, NULL); | |
187 | if (addrp == NULL) | |
188 | return -1; | |
189 | ||
190 | addr = of_translate_address(soc_dev, addrp); | |
7c6efda5 BH |
191 | if (addr == OF_BAD_ADDR) |
192 | return -1; | |
b580d46c KG |
193 | |
194 | /* Add port, irq will be dealt with later. We passed a translated | |
195 | * IO port value. It will be fixed up later along with the irq | |
196 | */ | |
e5480bdc | 197 | if (of_node_is_type(tsi, "tsi-bridge")) |
c4cad90f | 198 | return add_legacy_port(np, -1, UPIO_TSI, addr, addr, |
ef24ba70 | 199 | 0, legacy_port_flags, 0); |
be9633e9 | 200 | else |
c4cad90f | 201 | return add_legacy_port(np, -1, UPIO_MEM, addr, addr, |
ef24ba70 | 202 | 0, legacy_port_flags, 0); |
b580d46c KG |
203 | } |
204 | ||
463ce0e1 | 205 | static int __init add_legacy_isa_port(struct device_node *np, |
017e0fad | 206 | struct device_node *isa_brg) |
463ce0e1 | 207 | { |
f14362d1 | 208 | const __be32 *reg; |
a7f67bdf | 209 | const char *typep; |
463ce0e1 | 210 | int index = -1; |
f704b8d1 | 211 | u64 taddr; |
463ce0e1 | 212 | |
b7c670d6 | 213 | DBG(" -> add_legacy_isa_port(%pOF)\n", np); |
7c6efda5 | 214 | |
463ce0e1 | 215 | /* Get the ISA port number */ |
e2eb6392 | 216 | reg = of_get_property(np, "reg", NULL); |
463ce0e1 BH |
217 | if (reg == NULL) |
218 | return -1; | |
219 | ||
220 | /* Verify it's an IO port, we don't support anything else */ | |
f14362d1 | 221 | if (!(be32_to_cpu(reg[0]) & 0x00000001)) |
463ce0e1 BH |
222 | return -1; |
223 | ||
224 | /* Now look for an "ibm,aix-loc" property that gives us ordering | |
225 | * if any... | |
226 | */ | |
e2eb6392 | 227 | typep = of_get_property(np, "ibm,aix-loc", NULL); |
463ce0e1 BH |
228 | |
229 | /* If we have a location index, then use it */ | |
230 | if (typep && *typep == 'S') | |
231 | index = simple_strtol(typep+1, NULL, 0) - 1; | |
232 | ||
f704b8d1 BH |
233 | /* Translate ISA address. If it fails, we still register the port |
234 | * with no translated address so that it can be picked up as an IO | |
235 | * port later by the serial driver | |
30925748 BH |
236 | * |
237 | * Note: Don't even try on P8 lpc, we know it's not directly mapped | |
f704b8d1 | 238 | */ |
023b13a5 BH |
239 | if (!of_device_is_compatible(isa_brg, "ibm,power8-lpc") || |
240 | of_get_property(isa_brg, "ranges", NULL)) { | |
30925748 BH |
241 | taddr = of_translate_address(np, reg); |
242 | if (taddr == OF_BAD_ADDR) | |
243 | taddr = 0; | |
244 | } else | |
f704b8d1 | 245 | taddr = 0; |
463ce0e1 BH |
246 | |
247 | /* Add port, irq will be dealt with later */ | |
30925748 | 248 | return add_legacy_port(np, index, UPIO_PORT, be32_to_cpu(reg[1]), |
ef24ba70 | 249 | taddr, 0, legacy_port_flags, 0); |
463ce0e1 BH |
250 | |
251 | } | |
252 | ||
017e0fad | 253 | #ifdef CONFIG_PCI |
463ce0e1 BH |
254 | static int __init add_legacy_pci_port(struct device_node *np, |
255 | struct device_node *pci_dev) | |
256 | { | |
f704b8d1 | 257 | u64 addr, base; |
4a396dc6 | 258 | const __be32 *addrp; |
d2dd482b | 259 | unsigned int flags; |
8dacaedf | 260 | int iotype, index = -1, lindex = 0; |
463ce0e1 | 261 | |
b7c670d6 | 262 | DBG(" -> add_legacy_pci_port(%pOF)\n", np); |
7c6efda5 | 263 | |
463ce0e1 BH |
264 | /* We only support ports that have a clock frequency properly |
265 | * encoded in the device-tree (that is have an fcode). Anything | |
266 | * else can't be used that early and will be normally probed by | |
8dacaedf BH |
267 | * the generic 8250_pci driver later on. The reason is that 8250 |
268 | * compatible UARTs on PCI need all sort of quirks (port offsets | |
269 | * etc...) that this code doesn't know about | |
463ce0e1 | 270 | */ |
e2eb6392 | 271 | if (of_get_property(np, "clock-frequency", NULL) == NULL) |
463ce0e1 | 272 | return -1; |
463ce0e1 BH |
273 | |
274 | /* Get the PCI address. Assume BAR 0 */ | |
d2dd482b | 275 | addrp = of_get_pci_address(pci_dev, 0, NULL, &flags); |
463ce0e1 BH |
276 | if (addrp == NULL) |
277 | return -1; | |
278 | ||
279 | /* We only support BAR 0 for now */ | |
d2dd482b | 280 | iotype = (flags & IORESOURCE_MEM) ? UPIO_MEM : UPIO_PORT; |
463ce0e1 | 281 | addr = of_translate_address(pci_dev, addrp); |
7c6efda5 BH |
282 | if (addr == OF_BAD_ADDR) |
283 | return -1; | |
463ce0e1 BH |
284 | |
285 | /* Set the IO base to the same as the translated address for MMIO, | |
286 | * or to the domain local IO base for PIO (it will be fixed up later) | |
287 | */ | |
288 | if (iotype == UPIO_MEM) | |
289 | base = addr; | |
290 | else | |
4a396dc6 | 291 | base = of_read_number(&addrp[2], 1); |
463ce0e1 BH |
292 | |
293 | /* Try to guess an index... If we have subdevices of the pci dev, | |
294 | * we get to their "reg" property | |
295 | */ | |
296 | if (np != pci_dev) { | |
f14362d1 IM |
297 | const __be32 *reg = of_get_property(np, "reg", NULL); |
298 | if (reg && (be32_to_cpup(reg) < 4)) | |
299 | index = lindex = be32_to_cpup(reg); | |
8dacaedf BH |
300 | } |
301 | ||
302 | /* Local index means it's the Nth port in the PCI chip. Unfortunately | |
303 | * the offset to add here is device specific. We know about those | |
304 | * EXAR ports and we default to the most common case. If your UART | |
305 | * doesn't work for these settings, you'll have to add your own special | |
306 | * cases here | |
307 | */ | |
55b61fec SR |
308 | if (of_device_is_compatible(pci_dev, "pci13a8,152") || |
309 | of_device_is_compatible(pci_dev, "pci13a8,154") || | |
310 | of_device_is_compatible(pci_dev, "pci13a8,158")) { | |
8dacaedf BH |
311 | addr += 0x200 * lindex; |
312 | base += 0x200 * lindex; | |
313 | } else { | |
314 | addr += 8 * lindex; | |
315 | base += 8 * lindex; | |
463ce0e1 BH |
316 | } |
317 | ||
318 | /* Add port, irq will be dealt with later. We passed a translated | |
319 | * IO port value. It will be fixed up later along with the irq | |
320 | */ | |
ef24ba70 | 321 | return add_legacy_port(np, index, iotype, base, addr, 0, |
c4cad90f | 322 | legacy_port_flags, np != pci_dev); |
463ce0e1 | 323 | } |
017e0fad | 324 | #endif |
463ce0e1 | 325 | |
37a801c7 MN |
326 | static void __init setup_legacy_serial_console(int console) |
327 | { | |
30925748 BH |
328 | struct legacy_serial_info *info = &legacy_serial_infos[console]; |
329 | struct plat_serial8250_port *port = &legacy_serial_ports[console]; | |
13ae4037 SC |
330 | unsigned int stride; |
331 | ||
332 | stride = 1 << port->regshift; | |
37a801c7 | 333 | |
30925748 BH |
334 | /* Check if a translated MMIO address has been found */ |
335 | if (info->taddr) { | |
0bd3f9e9 CL |
336 | info->early_addr = early_ioremap(info->taddr, 0x1000); |
337 | if (info->early_addr == NULL) | |
30925748 | 338 | return; |
0bd3f9e9 | 339 | udbg_uart_init_mmio(info->early_addr, stride); |
30925748 BH |
340 | } else { |
341 | /* Check if it's PIO and we support untranslated PIO */ | |
342 | if (port->iotype == UPIO_PORT && isa_io_special) | |
13ae4037 | 343 | udbg_uart_init_pio(port->iobase, stride); |
30925748 BH |
344 | else |
345 | return; | |
346 | } | |
347 | ||
348 | /* Try to query the current speed */ | |
37a801c7 | 349 | if (info->speed == 0) |
30925748 BH |
350 | info->speed = udbg_probe_uart_speed(info->clock); |
351 | ||
352 | /* Set it up */ | |
37a801c7 | 353 | DBG("default console speed = %d\n", info->speed); |
30925748 | 354 | udbg_uart_setup(info->speed, info->clock); |
37a801c7 MN |
355 | } |
356 | ||
0bd3f9e9 CL |
357 | static int __init ioremap_legacy_serial_console(void) |
358 | { | |
63970f3c CL |
359 | struct plat_serial8250_port *port; |
360 | struct legacy_serial_info *info; | |
0bd3f9e9 CL |
361 | void __iomem *vaddr; |
362 | ||
363 | if (legacy_serial_console < 0) | |
364 | return 0; | |
365 | ||
63970f3c CL |
366 | info = &legacy_serial_infos[legacy_serial_console]; |
367 | port = &legacy_serial_ports[legacy_serial_console]; | |
368 | ||
0bd3f9e9 CL |
369 | if (!info->early_addr) |
370 | return 0; | |
371 | ||
372 | vaddr = ioremap(info->taddr, 0x1000); | |
373 | if (WARN_ON(!vaddr)) | |
374 | return -ENOMEM; | |
375 | ||
376 | udbg_uart_init_mmio(vaddr, 1 << port->regshift); | |
377 | early_iounmap(info->early_addr, 0x1000); | |
378 | info->early_addr = NULL; | |
379 | ||
380 | return 0; | |
381 | } | |
382 | early_initcall(ioremap_legacy_serial_console); | |
383 | ||
463ce0e1 BH |
384 | /* |
385 | * This is called very early, as part of setup_system() or eventually | |
386 | * setup_arch(), basically before anything else in this file. This function | |
387 | * will try to build a list of all the available 8250-compatible serial ports | |
388 | * in the machine using the Open Firmware device-tree. It currently only deals | |
389 | * with ISA and PCI busses but could be extended. It allows a very early boot | |
390 | * console to be initialized, that list is also used later to provide 8250 with | |
391 | * the machine non-PCI ports and to properly pick the default console port | |
392 | */ | |
393 | void __init find_legacy_serial_ports(void) | |
394 | { | |
b580d46c | 395 | struct device_node *np, *stdout = NULL; |
a7f67bdf | 396 | const char *path; |
463ce0e1 BH |
397 | int index; |
398 | ||
399 | DBG(" -> find_legacy_serial_port()\n"); | |
400 | ||
401 | /* Now find out if one of these is out firmware console */ | |
e2eb6392 | 402 | path = of_get_property(of_chosen, "linux,stdout-path", NULL); |
bf3d6afb BH |
403 | if (path == NULL) |
404 | path = of_get_property(of_chosen, "stdout-path", NULL); | |
b580d46c KG |
405 | if (path != NULL) { |
406 | stdout = of_find_node_by_path(path); | |
407 | if (stdout) | |
b7c670d6 | 408 | DBG("stdout is %pOF\n", stdout); |
b580d46c | 409 | } else { |
463ce0e1 | 410 | DBG(" no linux,stdout-path !\n"); |
463ce0e1 | 411 | } |
b580d46c | 412 | |
1a7507c7 | 413 | /* Iterate over all the 16550 ports, looking for known parents */ |
3329c0d1 | 414 | for_each_compatible_node(np, "serial", "ns16550") { |
1a7507c7 PG |
415 | struct device_node *parent = of_get_parent(np); |
416 | if (!parent) | |
417 | continue; | |
3bc5ab9b | 418 | if (of_match_node(legacy_serial_parents, parent) != NULL) { |
07d9fce2 PK |
419 | if (of_device_is_available(np)) { |
420 | index = add_legacy_soc_port(np, np); | |
421 | if (index >= 0 && np == stdout) | |
422 | legacy_serial_console = index; | |
423 | } | |
b580d46c | 424 | } |
1a7507c7 | 425 | of_node_put(parent); |
463ce0e1 BH |
426 | } |
427 | ||
1a7507c7 | 428 | /* Next, fill our array with ISA ports */ |
3329c0d1 | 429 | for_each_node_by_type(np, "serial") { |
463ce0e1 | 430 | struct device_node *isa = of_get_parent(np); |
2c8e65b5 | 431 | if (of_node_name_eq(isa, "isa") || of_node_name_eq(isa, "lpc")) { |
e0f5fa99 BH |
432 | if (of_device_is_available(np)) { |
433 | index = add_legacy_isa_port(np, isa); | |
434 | if (index >= 0 && np == stdout) | |
435 | legacy_serial_console = index; | |
436 | } | |
463ce0e1 BH |
437 | } |
438 | of_node_put(isa); | |
439 | } | |
440 | ||
017e0fad | 441 | #ifdef CONFIG_PCI |
463ce0e1 BH |
442 | /* Next, try to locate PCI ports */ |
443 | for (np = NULL; (np = of_find_all_nodes(np));) { | |
444 | struct device_node *pci, *parent = of_get_parent(np); | |
2c8e65b5 | 445 | if (of_node_name_eq(parent, "isa")) { |
463ce0e1 BH |
446 | of_node_put(parent); |
447 | continue; | |
448 | } | |
2c8e65b5 | 449 | if (!of_node_name_eq(np, "serial") && |
e5480bdc | 450 | !of_node_is_type(np, "serial")) { |
463ce0e1 BH |
451 | of_node_put(parent); |
452 | continue; | |
453 | } | |
48fc7f7e | 454 | /* Check for known pciclass, and also check whether we have |
463ce0e1 BH |
455 | * a device with child nodes for ports or not |
456 | */ | |
55b61fec SR |
457 | if (of_device_is_compatible(np, "pciclass,0700") || |
458 | of_device_is_compatible(np, "pciclass,070002")) | |
463ce0e1 | 459 | pci = np; |
55b61fec SR |
460 | else if (of_device_is_compatible(parent, "pciclass,0700") || |
461 | of_device_is_compatible(parent, "pciclass,070002")) | |
463ce0e1 BH |
462 | pci = parent; |
463 | else { | |
464 | of_node_put(parent); | |
465 | continue; | |
466 | } | |
467 | index = add_legacy_pci_port(np, pci); | |
468 | if (index >= 0 && np == stdout) | |
469 | legacy_serial_console = index; | |
470 | of_node_put(parent); | |
471 | } | |
017e0fad | 472 | #endif |
463ce0e1 | 473 | |
d1aabbbb LH |
474 | of_node_put(stdout); |
475 | ||
463ce0e1 | 476 | DBG("legacy_serial_console = %d\n", legacy_serial_console); |
37a801c7 MN |
477 | if (legacy_serial_console >= 0) |
478 | setup_legacy_serial_console(legacy_serial_console); | |
463ce0e1 BH |
479 | DBG(" <- find_legacy_serial_port()\n"); |
480 | } | |
481 | ||
482 | static struct platform_device serial_device = { | |
483 | .name = "serial8250", | |
484 | .id = PLAT8250_DEV_PLATFORM, | |
485 | .dev = { | |
486 | .platform_data = legacy_serial_ports, | |
487 | }, | |
488 | }; | |
489 | ||
490 | static void __init fixup_port_irq(int index, | |
491 | struct device_node *np, | |
492 | struct plat_serial8250_port *port) | |
493 | { | |
0ebfff14 BH |
494 | unsigned int virq; |
495 | ||
463ce0e1 BH |
496 | DBG("fixup_port_irq(%d)\n", index); |
497 | ||
0ebfff14 | 498 | virq = irq_of_parse_and_map(np, 0); |
ef24ba70 | 499 | if (!virq && legacy_serial_infos[index].irq_check_parent) { |
0ebfff14 BH |
500 | np = of_get_parent(np); |
501 | if (np == NULL) | |
502 | return; | |
503 | virq = irq_of_parse_and_map(np, 0); | |
504 | of_node_put(np); | |
463ce0e1 | 505 | } |
ef24ba70 | 506 | if (!virq) |
463ce0e1 BH |
507 | return; |
508 | ||
0ebfff14 | 509 | port->irq = virq; |
9deaa53a | 510 | |
3493c853 | 511 | #ifdef CONFIG_SERIAL_8250_FSL |
d68fefdd | 512 | if (of_device_is_compatible(np, "fsl,ns16550")) { |
9deaa53a | 513 | port->handle_irq = fsl8250_handle_irq; |
d68fefdd DS |
514 | port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE); |
515 | } | |
3493c853 | 516 | #endif |
463ce0e1 BH |
517 | } |
518 | ||
519 | static void __init fixup_port_pio(int index, | |
520 | struct device_node *np, | |
521 | struct plat_serial8250_port *port) | |
522 | { | |
017e0fad | 523 | #ifdef CONFIG_PCI |
463ce0e1 BH |
524 | struct pci_controller *hose; |
525 | ||
526 | DBG("fixup_port_pio(%d)\n", index); | |
527 | ||
528 | hose = pci_find_hose_for_OF_device(np); | |
529 | if (hose) { | |
530 | unsigned long offset = (unsigned long)hose->io_base_virt - | |
531 | #ifdef CONFIG_PPC64 | |
532 | pci_io_base; | |
533 | #else | |
534 | isa_io_base; | |
535 | #endif | |
536 | DBG("port %d, IO %lx -> %lx\n", | |
537 | index, port->iobase, port->iobase + offset); | |
538 | port->iobase += offset; | |
539 | } | |
017e0fad | 540 | #endif |
463ce0e1 BH |
541 | } |
542 | ||
8dacaedf BH |
543 | static void __init fixup_port_mmio(int index, |
544 | struct device_node *np, | |
545 | struct plat_serial8250_port *port) | |
546 | { | |
547 | DBG("fixup_port_mmio(%d)\n", index); | |
548 | ||
549 | port->membase = ioremap(port->mapbase, 0x100); | |
550 | } | |
551 | ||
463ce0e1 BH |
552 | /* |
553 | * This is called as an arch initcall, hopefully before the PCI bus is | |
554 | * probed and/or the 8250 driver loaded since we need to register our | |
555 | * platform devices before 8250 PCI ones are detected as some of them | |
556 | * must properly "override" the platform ones. | |
557 | * | |
558 | * This function fixes up the interrupt value for platform ports as it | |
559 | * couldn't be done earlier before interrupt maps have been parsed. It | |
560 | * also "corrects" the IO address for PIO ports for the same reason, | |
561 | * since earlier, the PHBs virtual IO space wasn't assigned yet. It then | |
562 | * registers all those platform ports for use by the 8250 driver when it | |
563 | * finally loads. | |
564 | */ | |
565 | static int __init serial_dev_init(void) | |
566 | { | |
567 | int i; | |
568 | ||
569 | if (legacy_serial_count == 0) | |
570 | return -ENODEV; | |
571 | ||
572 | /* | |
947af294 | 573 | * Before we register the platform serial devices, we need |
00d70419 | 574 | * to fixup their interrupts and their IO ports. |
463ce0e1 BH |
575 | */ |
576 | DBG("Fixing serial ports interrupts and IO ports ...\n"); | |
577 | ||
578 | for (i = 0; i < legacy_serial_count; i++) { | |
579 | struct plat_serial8250_port *port = &legacy_serial_ports[i]; | |
580 | struct device_node *np = legacy_serial_infos[i].np; | |
581 | ||
ef24ba70 | 582 | if (!port->irq) |
463ce0e1 BH |
583 | fixup_port_irq(i, np, port); |
584 | if (port->iotype == UPIO_PORT) | |
585 | fixup_port_pio(i, np, port); | |
be9633e9 | 586 | if ((port->iotype == UPIO_MEM) || (port->iotype == UPIO_TSI)) |
8dacaedf | 587 | fixup_port_mmio(i, np, port); |
463ce0e1 BH |
588 | } |
589 | ||
590 | DBG("Registering platform serial ports\n"); | |
591 | ||
592 | return platform_device_register(&serial_device); | |
593 | } | |
ee56c474 | 594 | device_initcall(serial_dev_init); |
463ce0e1 BH |
595 | |
596 | ||
025d7917 | 597 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
463ce0e1 BH |
598 | /* |
599 | * This is called very early, as part of console_init() (typically just after | |
600 | * time_init()). This function is respondible for trying to find a good | |
601 | * default console on serial ports. It tries to match the open firmware | |
025d7917 BH |
602 | * default output with one of the available serial console drivers that have |
603 | * been probed earlier by find_legacy_serial_ports() | |
463ce0e1 BH |
604 | */ |
605 | static int __init check_legacy_serial_console(void) | |
606 | { | |
607 | struct device_node *prom_stdout = NULL; | |
025d7917 | 608 | int i, speed = 0, offset = 0; |
a7f67bdf | 609 | const char *name; |
f14362d1 | 610 | const __be32 *spd; |
463ce0e1 BH |
611 | |
612 | DBG(" -> check_legacy_serial_console()\n"); | |
613 | ||
614 | /* The user has requested a console so this is already set up. */ | |
b8757b21 | 615 | if (strstr(boot_command_line, "console=")) { |
463ce0e1 BH |
616 | DBG(" console was specified !\n"); |
617 | return -EBUSY; | |
618 | } | |
619 | ||
620 | if (!of_chosen) { | |
621 | DBG(" of_chosen is NULL !\n"); | |
622 | return -ENODEV; | |
623 | } | |
b580d46c KG |
624 | |
625 | if (legacy_serial_console < 0) { | |
626 | DBG(" legacy_serial_console not found !\n"); | |
627 | return -ENODEV; | |
628 | } | |
463ce0e1 BH |
629 | /* We are getting a weird phandle from OF ... */ |
630 | /* ... So use the full path instead */ | |
e2eb6392 | 631 | name = of_get_property(of_chosen, "linux,stdout-path", NULL); |
bf3d6afb BH |
632 | if (name == NULL) |
633 | name = of_get_property(of_chosen, "stdout-path", NULL); | |
463ce0e1 | 634 | if (name == NULL) { |
bf3d6afb | 635 | DBG(" no stdout-path !\n"); |
463ce0e1 BH |
636 | return -ENODEV; |
637 | } | |
638 | prom_stdout = of_find_node_by_path(name); | |
639 | if (!prom_stdout) { | |
640 | DBG(" can't find stdout package %s !\n", name); | |
641 | return -ENODEV; | |
642 | } | |
b7c670d6 | 643 | DBG("stdout is %pOF\n", prom_stdout); |
463ce0e1 | 644 | |
e2eb6392 | 645 | name = of_get_property(prom_stdout, "name", NULL); |
463ce0e1 BH |
646 | if (!name) { |
647 | DBG(" stdout package has no name !\n"); | |
648 | goto not_found; | |
649 | } | |
e2eb6392 | 650 | spd = of_get_property(prom_stdout, "current-speed", NULL); |
463ce0e1 | 651 | if (spd) |
f14362d1 | 652 | speed = be32_to_cpup(spd); |
463ce0e1 | 653 | |
025d7917 BH |
654 | if (strcmp(name, "serial") != 0) |
655 | goto not_found; | |
656 | ||
657 | /* Look for it in probed array */ | |
658 | for (i = 0; i < legacy_serial_count; i++) { | |
659 | if (prom_stdout != legacy_serial_infos[i].np) | |
660 | continue; | |
661 | offset = i; | |
662 | speed = legacy_serial_infos[i].speed; | |
663 | break; | |
463ce0e1 | 664 | } |
025d7917 | 665 | if (i >= legacy_serial_count) |
463ce0e1 | 666 | goto not_found; |
025d7917 | 667 | |
463ce0e1 BH |
668 | of_node_put(prom_stdout); |
669 | ||
670 | DBG("Found serial console at ttyS%d\n", offset); | |
671 | ||
672 | if (speed) { | |
673 | static char __initdata opt[16]; | |
674 | sprintf(opt, "%d", speed); | |
675 | return add_preferred_console("ttyS", offset, opt); | |
676 | } else | |
677 | return add_preferred_console("ttyS", offset, NULL); | |
678 | ||
679 | not_found: | |
680 | DBG("No preferred console found !\n"); | |
681 | of_node_put(prom_stdout); | |
682 | return -ENODEV; | |
683 | } | |
684 | console_initcall(check_legacy_serial_console); | |
685 | ||
025d7917 | 686 | #endif /* CONFIG_SERIAL_8250_CONSOLE */ |