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463ce0e1 BH |
1 | #include <linux/kernel.h> |
2 | #include <linux/serial.h> | |
3 | #include <linux/serial_8250.h> | |
4 | #include <linux/serial_core.h> | |
5 | #include <linux/console.h> | |
6 | #include <linux/pci.h> | |
22ae782f | 7 | #include <linux/of_address.h> |
1a7507c7 | 8 | #include <linux/of_device.h> |
7df5659e | 9 | #include <linux/serial_reg.h> |
463ce0e1 BH |
10 | #include <asm/io.h> |
11 | #include <asm/mmu.h> | |
12 | #include <asm/prom.h> | |
13 | #include <asm/serial.h> | |
14 | #include <asm/udbg.h> | |
15 | #include <asm/pci-bridge.h> | |
16 | #include <asm/ppc-pci.h> | |
17 | ||
18 | #undef DEBUG | |
19 | ||
20 | #ifdef DEBUG | |
21 | #define DBG(fmt...) do { printk(fmt); } while(0) | |
22 | #else | |
23 | #define DBG(fmt...) do { } while(0) | |
24 | #endif | |
25 | ||
26 | #define MAX_LEGACY_SERIAL_PORTS 8 | |
27 | ||
28 | static struct plat_serial8250_port | |
29 | legacy_serial_ports[MAX_LEGACY_SERIAL_PORTS+1]; | |
30 | static struct legacy_serial_info { | |
31 | struct device_node *np; | |
32 | unsigned int speed; | |
33 | unsigned int clock; | |
0ebfff14 | 34 | int irq_check_parent; |
463ce0e1 BH |
35 | phys_addr_t taddr; |
36 | } legacy_serial_infos[MAX_LEGACY_SERIAL_PORTS]; | |
1a7507c7 | 37 | |
ce6d73c9 | 38 | static const struct of_device_id legacy_serial_parents[] __initconst = { |
1a7507c7 PG |
39 | {.type = "soc",}, |
40 | {.type = "tsi-bridge",}, | |
f5903ede ME |
41 | {.type = "opb", }, |
42 | {.compatible = "ibm,opb",}, | |
1a7507c7 PG |
43 | {.compatible = "simple-bus",}, |
44 | {.compatible = "wrs,epld-localbus",}, | |
3bc5ab9b | 45 | {}, |
1a7507c7 PG |
46 | }; |
47 | ||
463ce0e1 BH |
48 | static unsigned int legacy_serial_count; |
49 | static int legacy_serial_console = -1; | |
50 | ||
c4cad90f BH |
51 | static const upf_t legacy_port_flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | |
52 | UPF_SHARE_IRQ | UPF_FIXED_PORT; | |
53 | ||
7df5659e AB |
54 | static unsigned int tsi_serial_in(struct uart_port *p, int offset) |
55 | { | |
56 | unsigned int tmp; | |
57 | offset = offset << p->regshift; | |
58 | if (offset == UART_IIR) { | |
59 | tmp = readl(p->membase + (UART_IIR & ~3)); | |
60 | return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */ | |
61 | } else | |
62 | return readb(p->membase + offset); | |
63 | } | |
64 | ||
65 | static void tsi_serial_out(struct uart_port *p, int offset, int value) | |
66 | { | |
67 | offset = offset << p->regshift; | |
68 | if (!((offset == UART_IER) && (value & UART_IER_UUE))) | |
69 | writeb(value, p->membase + offset); | |
70 | } | |
71 | ||
463ce0e1 BH |
72 | static int __init add_legacy_port(struct device_node *np, int want_index, |
73 | int iotype, phys_addr_t base, | |
b580d46c | 74 | phys_addr_t taddr, unsigned long irq, |
0ebfff14 | 75 | upf_t flags, int irq_check_parent) |
463ce0e1 | 76 | { |
13ae4037 | 77 | const __be32 *clk, *spd, *rs; |
a7f67bdf | 78 | u32 clock = BASE_BAUD * 16; |
13ae4037 | 79 | u32 shift = 0; |
463ce0e1 BH |
80 | int index; |
81 | ||
82 | /* get clock freq. if present */ | |
e2eb6392 | 83 | clk = of_get_property(np, "clock-frequency", NULL); |
31df1678 | 84 | if (clk && *clk) |
f14362d1 | 85 | clock = be32_to_cpup(clk); |
463ce0e1 BH |
86 | |
87 | /* get default speed if present */ | |
e2eb6392 | 88 | spd = of_get_property(np, "current-speed", NULL); |
463ce0e1 | 89 | |
13ae4037 SC |
90 | /* get register shift if present */ |
91 | rs = of_get_property(np, "reg-shift", NULL); | |
92 | if (rs && *rs) | |
93 | shift = be32_to_cpup(rs); | |
94 | ||
463ce0e1 BH |
95 | /* If we have a location index, then try to use it */ |
96 | if (want_index >= 0 && want_index < MAX_LEGACY_SERIAL_PORTS) | |
97 | index = want_index; | |
98 | else | |
99 | index = legacy_serial_count; | |
100 | ||
101 | /* if our index is still out of range, that mean that | |
102 | * array is full, we could scan for a free slot but that | |
103 | * make little sense to bother, just skip the port | |
104 | */ | |
105 | if (index >= MAX_LEGACY_SERIAL_PORTS) | |
106 | return -1; | |
107 | if (index >= legacy_serial_count) | |
108 | legacy_serial_count = index + 1; | |
109 | ||
110 | /* Check if there is a port who already claimed our slot */ | |
b0d436c7 | 111 | if (legacy_serial_infos[index].np != NULL) { |
463ce0e1 BH |
112 | /* if we still have some room, move it, else override */ |
113 | if (legacy_serial_count < MAX_LEGACY_SERIAL_PORTS) { | |
0ebfff14 | 114 | printk(KERN_DEBUG "Moved legacy port %d -> %d\n", |
463ce0e1 BH |
115 | index, legacy_serial_count); |
116 | legacy_serial_ports[legacy_serial_count] = | |
117 | legacy_serial_ports[index]; | |
118 | legacy_serial_infos[legacy_serial_count] = | |
119 | legacy_serial_infos[index]; | |
120 | legacy_serial_count++; | |
121 | } else { | |
0ebfff14 | 122 | printk(KERN_DEBUG "Replacing legacy port %d\n", index); |
463ce0e1 BH |
123 | } |
124 | } | |
125 | ||
126 | /* Now fill the entry */ | |
127 | memset(&legacy_serial_ports[index], 0, | |
128 | sizeof(struct plat_serial8250_port)); | |
129 | if (iotype == UPIO_PORT) | |
130 | legacy_serial_ports[index].iobase = base; | |
131 | else | |
8dacaedf | 132 | legacy_serial_ports[index].mapbase = base; |
7df5659e | 133 | |
463ce0e1 BH |
134 | legacy_serial_ports[index].iotype = iotype; |
135 | legacy_serial_ports[index].uartclk = clock; | |
136 | legacy_serial_ports[index].irq = irq; | |
b580d46c | 137 | legacy_serial_ports[index].flags = flags; |
13ae4037 | 138 | legacy_serial_ports[index].regshift = shift; |
463ce0e1 BH |
139 | legacy_serial_infos[index].taddr = taddr; |
140 | legacy_serial_infos[index].np = of_node_get(np); | |
141 | legacy_serial_infos[index].clock = clock; | |
f14362d1 | 142 | legacy_serial_infos[index].speed = spd ? be32_to_cpup(spd) : 0; |
0ebfff14 | 143 | legacy_serial_infos[index].irq_check_parent = irq_check_parent; |
463ce0e1 | 144 | |
7df5659e AB |
145 | if (iotype == UPIO_TSI) { |
146 | legacy_serial_ports[index].serial_in = tsi_serial_in; | |
147 | legacy_serial_ports[index].serial_out = tsi_serial_out; | |
148 | } | |
149 | ||
0ebfff14 | 150 | printk(KERN_DEBUG "Found legacy serial port %d for %s\n", |
463ce0e1 | 151 | index, np->full_name); |
0ebfff14 | 152 | printk(KERN_DEBUG " %s=%llx, taddr=%llx, irq=%lx, clk=%d, speed=%d\n", |
463ce0e1 BH |
153 | (iotype == UPIO_PORT) ? "port" : "mem", |
154 | (unsigned long long)base, (unsigned long long)taddr, irq, | |
155 | legacy_serial_ports[index].uartclk, | |
156 | legacy_serial_infos[index].speed); | |
157 | ||
158 | return index; | |
159 | } | |
160 | ||
b580d46c KG |
161 | static int __init add_legacy_soc_port(struct device_node *np, |
162 | struct device_node *soc_dev) | |
163 | { | |
f704b8d1 | 164 | u64 addr; |
4a396dc6 | 165 | const __be32 *addrp; |
be9633e9 | 166 | struct device_node *tsi = of_get_parent(np); |
b580d46c KG |
167 | |
168 | /* We only support ports that have a clock frequency properly | |
169 | * encoded in the device-tree. | |
170 | */ | |
e2eb6392 | 171 | if (of_get_property(np, "clock-frequency", NULL) == NULL) |
b580d46c KG |
172 | return -1; |
173 | ||
13ae4037 SC |
174 | /* if reg-offset don't try to use it */ |
175 | if ((of_get_property(np, "reg-offset", NULL) != NULL)) | |
1e6d1f26 JL |
176 | return -1; |
177 | ||
8d38a5b2 | 178 | /* if rtas uses this device, don't try to use it as well */ |
e2eb6392 | 179 | if (of_get_property(np, "used-by-rtas", NULL) != NULL) |
8d38a5b2 AB |
180 | return -1; |
181 | ||
b580d46c KG |
182 | /* Get the address */ |
183 | addrp = of_get_address(soc_dev, 0, NULL, NULL); | |
184 | if (addrp == NULL) | |
185 | return -1; | |
186 | ||
187 | addr = of_translate_address(soc_dev, addrp); | |
7c6efda5 BH |
188 | if (addr == OF_BAD_ADDR) |
189 | return -1; | |
b580d46c KG |
190 | |
191 | /* Add port, irq will be dealt with later. We passed a translated | |
192 | * IO port value. It will be fixed up later along with the irq | |
193 | */ | |
be9633e9 | 194 | if (tsi && !strcmp(tsi->type, "tsi-bridge")) |
c4cad90f | 195 | return add_legacy_port(np, -1, UPIO_TSI, addr, addr, |
ef24ba70 | 196 | 0, legacy_port_flags, 0); |
be9633e9 | 197 | else |
c4cad90f | 198 | return add_legacy_port(np, -1, UPIO_MEM, addr, addr, |
ef24ba70 | 199 | 0, legacy_port_flags, 0); |
b580d46c KG |
200 | } |
201 | ||
463ce0e1 | 202 | static int __init add_legacy_isa_port(struct device_node *np, |
017e0fad | 203 | struct device_node *isa_brg) |
463ce0e1 | 204 | { |
f14362d1 | 205 | const __be32 *reg; |
a7f67bdf | 206 | const char *typep; |
463ce0e1 | 207 | int index = -1; |
f704b8d1 | 208 | u64 taddr; |
463ce0e1 | 209 | |
7c6efda5 BH |
210 | DBG(" -> add_legacy_isa_port(%s)\n", np->full_name); |
211 | ||
463ce0e1 | 212 | /* Get the ISA port number */ |
e2eb6392 | 213 | reg = of_get_property(np, "reg", NULL); |
463ce0e1 BH |
214 | if (reg == NULL) |
215 | return -1; | |
216 | ||
217 | /* Verify it's an IO port, we don't support anything else */ | |
f14362d1 | 218 | if (!(be32_to_cpu(reg[0]) & 0x00000001)) |
463ce0e1 BH |
219 | return -1; |
220 | ||
221 | /* Now look for an "ibm,aix-loc" property that gives us ordering | |
222 | * if any... | |
223 | */ | |
e2eb6392 | 224 | typep = of_get_property(np, "ibm,aix-loc", NULL); |
463ce0e1 BH |
225 | |
226 | /* If we have a location index, then use it */ | |
227 | if (typep && *typep == 'S') | |
228 | index = simple_strtol(typep+1, NULL, 0) - 1; | |
229 | ||
f704b8d1 BH |
230 | /* Translate ISA address. If it fails, we still register the port |
231 | * with no translated address so that it can be picked up as an IO | |
232 | * port later by the serial driver | |
30925748 BH |
233 | * |
234 | * Note: Don't even try on P8 lpc, we know it's not directly mapped | |
f704b8d1 | 235 | */ |
30925748 BH |
236 | if (!of_device_is_compatible(isa_brg, "ibm,power8-lpc")) { |
237 | taddr = of_translate_address(np, reg); | |
238 | if (taddr == OF_BAD_ADDR) | |
239 | taddr = 0; | |
240 | } else | |
f704b8d1 | 241 | taddr = 0; |
463ce0e1 BH |
242 | |
243 | /* Add port, irq will be dealt with later */ | |
30925748 | 244 | return add_legacy_port(np, index, UPIO_PORT, be32_to_cpu(reg[1]), |
ef24ba70 | 245 | taddr, 0, legacy_port_flags, 0); |
463ce0e1 BH |
246 | |
247 | } | |
248 | ||
017e0fad | 249 | #ifdef CONFIG_PCI |
463ce0e1 BH |
250 | static int __init add_legacy_pci_port(struct device_node *np, |
251 | struct device_node *pci_dev) | |
252 | { | |
f704b8d1 | 253 | u64 addr, base; |
4a396dc6 | 254 | const __be32 *addrp; |
d2dd482b | 255 | unsigned int flags; |
8dacaedf | 256 | int iotype, index = -1, lindex = 0; |
463ce0e1 | 257 | |
7c6efda5 BH |
258 | DBG(" -> add_legacy_pci_port(%s)\n", np->full_name); |
259 | ||
463ce0e1 BH |
260 | /* We only support ports that have a clock frequency properly |
261 | * encoded in the device-tree (that is have an fcode). Anything | |
262 | * else can't be used that early and will be normally probed by | |
8dacaedf BH |
263 | * the generic 8250_pci driver later on. The reason is that 8250 |
264 | * compatible UARTs on PCI need all sort of quirks (port offsets | |
265 | * etc...) that this code doesn't know about | |
463ce0e1 | 266 | */ |
e2eb6392 | 267 | if (of_get_property(np, "clock-frequency", NULL) == NULL) |
463ce0e1 | 268 | return -1; |
463ce0e1 BH |
269 | |
270 | /* Get the PCI address. Assume BAR 0 */ | |
d2dd482b | 271 | addrp = of_get_pci_address(pci_dev, 0, NULL, &flags); |
463ce0e1 BH |
272 | if (addrp == NULL) |
273 | return -1; | |
274 | ||
275 | /* We only support BAR 0 for now */ | |
d2dd482b | 276 | iotype = (flags & IORESOURCE_MEM) ? UPIO_MEM : UPIO_PORT; |
463ce0e1 | 277 | addr = of_translate_address(pci_dev, addrp); |
7c6efda5 BH |
278 | if (addr == OF_BAD_ADDR) |
279 | return -1; | |
463ce0e1 BH |
280 | |
281 | /* Set the IO base to the same as the translated address for MMIO, | |
282 | * or to the domain local IO base for PIO (it will be fixed up later) | |
283 | */ | |
284 | if (iotype == UPIO_MEM) | |
285 | base = addr; | |
286 | else | |
4a396dc6 | 287 | base = of_read_number(&addrp[2], 1); |
463ce0e1 BH |
288 | |
289 | /* Try to guess an index... If we have subdevices of the pci dev, | |
290 | * we get to their "reg" property | |
291 | */ | |
292 | if (np != pci_dev) { | |
f14362d1 IM |
293 | const __be32 *reg = of_get_property(np, "reg", NULL); |
294 | if (reg && (be32_to_cpup(reg) < 4)) | |
295 | index = lindex = be32_to_cpup(reg); | |
8dacaedf BH |
296 | } |
297 | ||
298 | /* Local index means it's the Nth port in the PCI chip. Unfortunately | |
299 | * the offset to add here is device specific. We know about those | |
300 | * EXAR ports and we default to the most common case. If your UART | |
301 | * doesn't work for these settings, you'll have to add your own special | |
302 | * cases here | |
303 | */ | |
55b61fec SR |
304 | if (of_device_is_compatible(pci_dev, "pci13a8,152") || |
305 | of_device_is_compatible(pci_dev, "pci13a8,154") || | |
306 | of_device_is_compatible(pci_dev, "pci13a8,158")) { | |
8dacaedf BH |
307 | addr += 0x200 * lindex; |
308 | base += 0x200 * lindex; | |
309 | } else { | |
310 | addr += 8 * lindex; | |
311 | base += 8 * lindex; | |
463ce0e1 BH |
312 | } |
313 | ||
314 | /* Add port, irq will be dealt with later. We passed a translated | |
315 | * IO port value. It will be fixed up later along with the irq | |
316 | */ | |
ef24ba70 | 317 | return add_legacy_port(np, index, iotype, base, addr, 0, |
c4cad90f | 318 | legacy_port_flags, np != pci_dev); |
463ce0e1 | 319 | } |
017e0fad | 320 | #endif |
463ce0e1 | 321 | |
37a801c7 MN |
322 | static void __init setup_legacy_serial_console(int console) |
323 | { | |
30925748 BH |
324 | struct legacy_serial_info *info = &legacy_serial_infos[console]; |
325 | struct plat_serial8250_port *port = &legacy_serial_ports[console]; | |
37a801c7 | 326 | void __iomem *addr; |
13ae4037 SC |
327 | unsigned int stride; |
328 | ||
329 | stride = 1 << port->regshift; | |
37a801c7 | 330 | |
30925748 BH |
331 | /* Check if a translated MMIO address has been found */ |
332 | if (info->taddr) { | |
333 | addr = ioremap(info->taddr, 0x1000); | |
334 | if (addr == NULL) | |
335 | return; | |
13ae4037 | 336 | udbg_uart_init_mmio(addr, stride); |
30925748 BH |
337 | } else { |
338 | /* Check if it's PIO and we support untranslated PIO */ | |
339 | if (port->iotype == UPIO_PORT && isa_io_special) | |
13ae4037 | 340 | udbg_uart_init_pio(port->iobase, stride); |
30925748 BH |
341 | else |
342 | return; | |
343 | } | |
344 | ||
345 | /* Try to query the current speed */ | |
37a801c7 | 346 | if (info->speed == 0) |
30925748 BH |
347 | info->speed = udbg_probe_uart_speed(info->clock); |
348 | ||
349 | /* Set it up */ | |
37a801c7 | 350 | DBG("default console speed = %d\n", info->speed); |
30925748 | 351 | udbg_uart_setup(info->speed, info->clock); |
37a801c7 MN |
352 | } |
353 | ||
463ce0e1 BH |
354 | /* |
355 | * This is called very early, as part of setup_system() or eventually | |
356 | * setup_arch(), basically before anything else in this file. This function | |
357 | * will try to build a list of all the available 8250-compatible serial ports | |
358 | * in the machine using the Open Firmware device-tree. It currently only deals | |
359 | * with ISA and PCI busses but could be extended. It allows a very early boot | |
360 | * console to be initialized, that list is also used later to provide 8250 with | |
361 | * the machine non-PCI ports and to properly pick the default console port | |
362 | */ | |
363 | void __init find_legacy_serial_ports(void) | |
364 | { | |
b580d46c | 365 | struct device_node *np, *stdout = NULL; |
a7f67bdf | 366 | const char *path; |
463ce0e1 BH |
367 | int index; |
368 | ||
369 | DBG(" -> find_legacy_serial_port()\n"); | |
370 | ||
371 | /* Now find out if one of these is out firmware console */ | |
e2eb6392 | 372 | path = of_get_property(of_chosen, "linux,stdout-path", NULL); |
b580d46c KG |
373 | if (path != NULL) { |
374 | stdout = of_find_node_by_path(path); | |
375 | if (stdout) | |
376 | DBG("stdout is %s\n", stdout->full_name); | |
377 | } else { | |
463ce0e1 | 378 | DBG(" no linux,stdout-path !\n"); |
463ce0e1 | 379 | } |
b580d46c | 380 | |
1a7507c7 | 381 | /* Iterate over all the 16550 ports, looking for known parents */ |
3329c0d1 | 382 | for_each_compatible_node(np, "serial", "ns16550") { |
1a7507c7 PG |
383 | struct device_node *parent = of_get_parent(np); |
384 | if (!parent) | |
385 | continue; | |
3bc5ab9b | 386 | if (of_match_node(legacy_serial_parents, parent) != NULL) { |
07d9fce2 PK |
387 | if (of_device_is_available(np)) { |
388 | index = add_legacy_soc_port(np, np); | |
389 | if (index >= 0 && np == stdout) | |
390 | legacy_serial_console = index; | |
391 | } | |
b580d46c | 392 | } |
1a7507c7 | 393 | of_node_put(parent); |
463ce0e1 BH |
394 | } |
395 | ||
1a7507c7 | 396 | /* Next, fill our array with ISA ports */ |
3329c0d1 | 397 | for_each_node_by_type(np, "serial") { |
463ce0e1 | 398 | struct device_node *isa = of_get_parent(np); |
30925748 BH |
399 | if (isa && (!strcmp(isa->name, "isa") || |
400 | !strcmp(isa->name, "lpc"))) { | |
e0f5fa99 BH |
401 | if (of_device_is_available(np)) { |
402 | index = add_legacy_isa_port(np, isa); | |
403 | if (index >= 0 && np == stdout) | |
404 | legacy_serial_console = index; | |
405 | } | |
463ce0e1 BH |
406 | } |
407 | of_node_put(isa); | |
408 | } | |
409 | ||
017e0fad | 410 | #ifdef CONFIG_PCI |
463ce0e1 BH |
411 | /* Next, try to locate PCI ports */ |
412 | for (np = NULL; (np = of_find_all_nodes(np));) { | |
413 | struct device_node *pci, *parent = of_get_parent(np); | |
414 | if (parent && !strcmp(parent->name, "isa")) { | |
415 | of_node_put(parent); | |
416 | continue; | |
417 | } | |
418 | if (strcmp(np->name, "serial") && strcmp(np->type, "serial")) { | |
419 | of_node_put(parent); | |
420 | continue; | |
421 | } | |
48fc7f7e | 422 | /* Check for known pciclass, and also check whether we have |
463ce0e1 BH |
423 | * a device with child nodes for ports or not |
424 | */ | |
55b61fec SR |
425 | if (of_device_is_compatible(np, "pciclass,0700") || |
426 | of_device_is_compatible(np, "pciclass,070002")) | |
463ce0e1 | 427 | pci = np; |
55b61fec SR |
428 | else if (of_device_is_compatible(parent, "pciclass,0700") || |
429 | of_device_is_compatible(parent, "pciclass,070002")) | |
463ce0e1 BH |
430 | pci = parent; |
431 | else { | |
432 | of_node_put(parent); | |
433 | continue; | |
434 | } | |
435 | index = add_legacy_pci_port(np, pci); | |
436 | if (index >= 0 && np == stdout) | |
437 | legacy_serial_console = index; | |
438 | of_node_put(parent); | |
439 | } | |
017e0fad | 440 | #endif |
463ce0e1 BH |
441 | |
442 | DBG("legacy_serial_console = %d\n", legacy_serial_console); | |
37a801c7 MN |
443 | if (legacy_serial_console >= 0) |
444 | setup_legacy_serial_console(legacy_serial_console); | |
463ce0e1 BH |
445 | DBG(" <- find_legacy_serial_port()\n"); |
446 | } | |
447 | ||
448 | static struct platform_device serial_device = { | |
449 | .name = "serial8250", | |
450 | .id = PLAT8250_DEV_PLATFORM, | |
451 | .dev = { | |
452 | .platform_data = legacy_serial_ports, | |
453 | }, | |
454 | }; | |
455 | ||
456 | static void __init fixup_port_irq(int index, | |
457 | struct device_node *np, | |
458 | struct plat_serial8250_port *port) | |
459 | { | |
0ebfff14 BH |
460 | unsigned int virq; |
461 | ||
463ce0e1 BH |
462 | DBG("fixup_port_irq(%d)\n", index); |
463 | ||
0ebfff14 | 464 | virq = irq_of_parse_and_map(np, 0); |
ef24ba70 | 465 | if (!virq && legacy_serial_infos[index].irq_check_parent) { |
0ebfff14 BH |
466 | np = of_get_parent(np); |
467 | if (np == NULL) | |
468 | return; | |
469 | virq = irq_of_parse_and_map(np, 0); | |
470 | of_node_put(np); | |
463ce0e1 | 471 | } |
ef24ba70 | 472 | if (!virq) |
463ce0e1 BH |
473 | return; |
474 | ||
0ebfff14 | 475 | port->irq = virq; |
9deaa53a | 476 | |
3493c853 | 477 | #ifdef CONFIG_SERIAL_8250_FSL |
9deaa53a PG |
478 | if (of_device_is_compatible(np, "fsl,ns16550")) |
479 | port->handle_irq = fsl8250_handle_irq; | |
3493c853 | 480 | #endif |
463ce0e1 BH |
481 | } |
482 | ||
483 | static void __init fixup_port_pio(int index, | |
484 | struct device_node *np, | |
485 | struct plat_serial8250_port *port) | |
486 | { | |
017e0fad | 487 | #ifdef CONFIG_PCI |
463ce0e1 BH |
488 | struct pci_controller *hose; |
489 | ||
490 | DBG("fixup_port_pio(%d)\n", index); | |
491 | ||
492 | hose = pci_find_hose_for_OF_device(np); | |
493 | if (hose) { | |
494 | unsigned long offset = (unsigned long)hose->io_base_virt - | |
495 | #ifdef CONFIG_PPC64 | |
496 | pci_io_base; | |
497 | #else | |
498 | isa_io_base; | |
499 | #endif | |
500 | DBG("port %d, IO %lx -> %lx\n", | |
501 | index, port->iobase, port->iobase + offset); | |
502 | port->iobase += offset; | |
503 | } | |
017e0fad | 504 | #endif |
463ce0e1 BH |
505 | } |
506 | ||
8dacaedf BH |
507 | static void __init fixup_port_mmio(int index, |
508 | struct device_node *np, | |
509 | struct plat_serial8250_port *port) | |
510 | { | |
511 | DBG("fixup_port_mmio(%d)\n", index); | |
512 | ||
513 | port->membase = ioremap(port->mapbase, 0x100); | |
514 | } | |
515 | ||
463ce0e1 BH |
516 | /* |
517 | * This is called as an arch initcall, hopefully before the PCI bus is | |
518 | * probed and/or the 8250 driver loaded since we need to register our | |
519 | * platform devices before 8250 PCI ones are detected as some of them | |
520 | * must properly "override" the platform ones. | |
521 | * | |
522 | * This function fixes up the interrupt value for platform ports as it | |
523 | * couldn't be done earlier before interrupt maps have been parsed. It | |
524 | * also "corrects" the IO address for PIO ports for the same reason, | |
525 | * since earlier, the PHBs virtual IO space wasn't assigned yet. It then | |
526 | * registers all those platform ports for use by the 8250 driver when it | |
527 | * finally loads. | |
528 | */ | |
529 | static int __init serial_dev_init(void) | |
530 | { | |
531 | int i; | |
532 | ||
533 | if (legacy_serial_count == 0) | |
534 | return -ENODEV; | |
535 | ||
536 | /* | |
947af294 | 537 | * Before we register the platform serial devices, we need |
00d70419 | 538 | * to fixup their interrupts and their IO ports. |
463ce0e1 BH |
539 | */ |
540 | DBG("Fixing serial ports interrupts and IO ports ...\n"); | |
541 | ||
542 | for (i = 0; i < legacy_serial_count; i++) { | |
543 | struct plat_serial8250_port *port = &legacy_serial_ports[i]; | |
544 | struct device_node *np = legacy_serial_infos[i].np; | |
545 | ||
ef24ba70 | 546 | if (!port->irq) |
463ce0e1 BH |
547 | fixup_port_irq(i, np, port); |
548 | if (port->iotype == UPIO_PORT) | |
549 | fixup_port_pio(i, np, port); | |
be9633e9 | 550 | if ((port->iotype == UPIO_MEM) || (port->iotype == UPIO_TSI)) |
8dacaedf | 551 | fixup_port_mmio(i, np, port); |
463ce0e1 BH |
552 | } |
553 | ||
554 | DBG("Registering platform serial ports\n"); | |
555 | ||
556 | return platform_device_register(&serial_device); | |
557 | } | |
ee56c474 | 558 | device_initcall(serial_dev_init); |
463ce0e1 BH |
559 | |
560 | ||
025d7917 | 561 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
463ce0e1 BH |
562 | /* |
563 | * This is called very early, as part of console_init() (typically just after | |
564 | * time_init()). This function is respondible for trying to find a good | |
565 | * default console on serial ports. It tries to match the open firmware | |
025d7917 BH |
566 | * default output with one of the available serial console drivers that have |
567 | * been probed earlier by find_legacy_serial_ports() | |
463ce0e1 BH |
568 | */ |
569 | static int __init check_legacy_serial_console(void) | |
570 | { | |
571 | struct device_node *prom_stdout = NULL; | |
025d7917 | 572 | int i, speed = 0, offset = 0; |
a7f67bdf | 573 | const char *name; |
f14362d1 | 574 | const __be32 *spd; |
463ce0e1 BH |
575 | |
576 | DBG(" -> check_legacy_serial_console()\n"); | |
577 | ||
578 | /* The user has requested a console so this is already set up. */ | |
b8757b21 | 579 | if (strstr(boot_command_line, "console=")) { |
463ce0e1 BH |
580 | DBG(" console was specified !\n"); |
581 | return -EBUSY; | |
582 | } | |
583 | ||
584 | if (!of_chosen) { | |
585 | DBG(" of_chosen is NULL !\n"); | |
586 | return -ENODEV; | |
587 | } | |
b580d46c KG |
588 | |
589 | if (legacy_serial_console < 0) { | |
590 | DBG(" legacy_serial_console not found !\n"); | |
591 | return -ENODEV; | |
592 | } | |
463ce0e1 BH |
593 | /* We are getting a weird phandle from OF ... */ |
594 | /* ... So use the full path instead */ | |
e2eb6392 | 595 | name = of_get_property(of_chosen, "linux,stdout-path", NULL); |
463ce0e1 BH |
596 | if (name == NULL) { |
597 | DBG(" no linux,stdout-path !\n"); | |
598 | return -ENODEV; | |
599 | } | |
600 | prom_stdout = of_find_node_by_path(name); | |
601 | if (!prom_stdout) { | |
602 | DBG(" can't find stdout package %s !\n", name); | |
603 | return -ENODEV; | |
604 | } | |
605 | DBG("stdout is %s\n", prom_stdout->full_name); | |
606 | ||
e2eb6392 | 607 | name = of_get_property(prom_stdout, "name", NULL); |
463ce0e1 BH |
608 | if (!name) { |
609 | DBG(" stdout package has no name !\n"); | |
610 | goto not_found; | |
611 | } | |
e2eb6392 | 612 | spd = of_get_property(prom_stdout, "current-speed", NULL); |
463ce0e1 | 613 | if (spd) |
f14362d1 | 614 | speed = be32_to_cpup(spd); |
463ce0e1 | 615 | |
025d7917 BH |
616 | if (strcmp(name, "serial") != 0) |
617 | goto not_found; | |
618 | ||
619 | /* Look for it in probed array */ | |
620 | for (i = 0; i < legacy_serial_count; i++) { | |
621 | if (prom_stdout != legacy_serial_infos[i].np) | |
622 | continue; | |
623 | offset = i; | |
624 | speed = legacy_serial_infos[i].speed; | |
625 | break; | |
463ce0e1 | 626 | } |
025d7917 | 627 | if (i >= legacy_serial_count) |
463ce0e1 | 628 | goto not_found; |
025d7917 | 629 | |
463ce0e1 BH |
630 | of_node_put(prom_stdout); |
631 | ||
632 | DBG("Found serial console at ttyS%d\n", offset); | |
633 | ||
634 | if (speed) { | |
635 | static char __initdata opt[16]; | |
636 | sprintf(opt, "%d", speed); | |
637 | return add_preferred_console("ttyS", offset, opt); | |
638 | } else | |
639 | return add_preferred_console("ttyS", offset, NULL); | |
640 | ||
641 | not_found: | |
642 | DBG("No preferred console found !\n"); | |
643 | of_node_put(prom_stdout); | |
644 | return -ENODEV; | |
645 | } | |
646 | console_initcall(check_legacy_serial_console); | |
647 | ||
025d7917 | 648 | #endif /* CONFIG_SERIAL_8250_CONSOLE */ |