powerpc/eeh: Unfreeze PE on enabling EEH functionality
[linux-2.6-block.git] / arch / powerpc / kernel / eeh_driver.c
CommitLineData
77bd7415
LV
1/*
2 * PCI Error Recovery Driver for RPA-compliant PPC64 platform.
3c8c90ab
LV
3 * Copyright IBM Corp. 2004 2005
4 * Copyright Linas Vepstas <linas@linas.org> 2004, 2005
77bd7415
LV
5 *
6 * All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or (at
11 * your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
16 * NON INFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
3c8c90ab 23 * Send comments and feedback to Linas Vepstas <linas@austin.ibm.com>
77bd7415
LV
24 */
25#include <linux/delay.h>
77bd7415 26#include <linux/interrupt.h>
ac325acd 27#include <linux/irq.h>
feadf7c0 28#include <linux/module.h>
77bd7415
LV
29#include <linux/pci.h>
30#include <asm/eeh.h>
31#include <asm/eeh_event.h>
32#include <asm/ppc-pci.h>
33#include <asm/pci-bridge.h>
34#include <asm/prom.h>
35#include <asm/rtas.h>
36
29f8bf1b
GS
37/**
38 * eeh_pcid_name - Retrieve name of PCI device driver
39 * @pdev: PCI device
40 *
41 * This routine is used to retrieve the name of PCI device driver
42 * if that's valid.
43 */
40a7cd92 44static inline const char *eeh_pcid_name(struct pci_dev *pdev)
77bd7415 45{
273d2803 46 if (pdev && pdev->dev.driver)
77bd7415
LV
47 return pdev->dev.driver->name;
48 return "";
49}
50
feadf7c0
GS
51/**
52 * eeh_pcid_get - Get the PCI device driver
53 * @pdev: PCI device
54 *
55 * The function is used to retrieve the PCI device driver for
56 * the indicated PCI device. Besides, we will increase the reference
57 * of the PCI device driver to prevent that being unloaded on
58 * the fly. Otherwise, kernel crash would be seen.
59 */
60static inline struct pci_driver *eeh_pcid_get(struct pci_dev *pdev)
61{
62 if (!pdev || !pdev->driver)
63 return NULL;
64
65 if (!try_module_get(pdev->driver->driver.owner))
66 return NULL;
67
68 return pdev->driver;
69}
70
71/**
72 * eeh_pcid_put - Dereference on the PCI device driver
73 * @pdev: PCI device
74 *
75 * The function is called to do dereference on the PCI device
76 * driver of the indicated PCI device.
77 */
78static inline void eeh_pcid_put(struct pci_dev *pdev)
79{
80 if (!pdev || !pdev->driver)
81 return;
82
83 module_put(pdev->driver->driver.owner);
84}
85
dcfcfe75 86#if 0
8e01520c 87static void print_device_node_tree(struct pci_dn *pdn, int dent)
77bd7415
LV
88{
89 int i;
8e01520c
AM
90 struct device_node *pc;
91
92 if (!pdn)
93 return;
94 for (i = 0; i < dent; i++)
77bd7415
LV
95 printk(" ");
96 printk("dn=%s mode=%x \tcfg_addr=%x pe_addr=%x \tfull=%s\n",
97 pdn->node->name, pdn->eeh_mode, pdn->eeh_config_addr,
98 pdn->eeh_pe_config_addr, pdn->node->full_name);
99 dent += 3;
8e01520c 100 pc = pdn->node->child;
77bd7415
LV
101 while (pc) {
102 print_device_node_tree(PCI_DN(pc), dent);
103 pc = pc->sibling;
104 }
105}
106#endif
107
8535ef05 108/**
29f8bf1b
GS
109 * eeh_disable_irq - Disable interrupt for the recovering device
110 * @dev: PCI device
111 *
112 * This routine must be called when reporting temporary or permanent
113 * error to the particular PCI device to disable interrupt of that
114 * device. If the device has enabled MSI or MSI-X interrupt, we needn't
115 * do real work because EEH should freeze DMA transfers for those PCI
116 * devices encountering EEH errors, which includes MSI or MSI-X.
8535ef05
MM
117 */
118static void eeh_disable_irq(struct pci_dev *dev)
119{
40a7cd92 120 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
8535ef05
MM
121
122 /* Don't disable MSI and MSI-X interrupts. They are
123 * effectively disabled by the DMA Stopped state
124 * when an EEH error occurs.
29f8bf1b 125 */
8535ef05
MM
126 if (dev->msi_enabled || dev->msix_enabled)
127 return;
128
59e3f837 129 if (!irq_has_action(dev->irq))
8535ef05
MM
130 return;
131
dbbceee1 132 edev->mode |= EEH_DEV_IRQ_DISABLED;
8535ef05
MM
133 disable_irq_nosync(dev->irq);
134}
135
136/**
29f8bf1b
GS
137 * eeh_enable_irq - Enable interrupt for the recovering device
138 * @dev: PCI device
139 *
140 * This routine must be called to enable interrupt while failed
141 * device could be resumed.
8535ef05
MM
142 */
143static void eeh_enable_irq(struct pci_dev *dev)
144{
40a7cd92 145 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
8535ef05 146
dbbceee1
GS
147 if ((edev->mode) & EEH_DEV_IRQ_DISABLED) {
148 edev->mode &= ~EEH_DEV_IRQ_DISABLED;
b8a9a11b
TG
149 /*
150 * FIXME !!!!!
151 *
152 * This is just ass backwards. This maze has
153 * unbalanced irq_enable/disable calls. So instead of
154 * finding the root cause it works around the warning
155 * in the irq_enable code by conditionally calling
156 * into it.
157 *
158 * That's just wrong.The warning in the core code is
159 * there to tell people to fix their assymetries in
160 * their own code, not by abusing the core information
161 * to avoid it.
162 *
163 * I so wish that the assymetry would be the other way
164 * round and a few more irq_disable calls render that
165 * shit unusable forever.
166 *
167 * tglx
168 */
57310c3c 169 if (irqd_irq_disabled(irq_get_irq_data(dev->irq)))
91150af3 170 enable_irq(dev->irq);
57310c3c 171 }
8535ef05
MM
172}
173
d2b0f6f7
GS
174static bool eeh_dev_removed(struct eeh_dev *edev)
175{
176 /* EEH device removed ? */
177 if (!edev || (edev->mode & EEH_DEV_REMOVED))
178 return true;
179
180 return false;
181}
182
cb5b5624 183/**
29f8bf1b 184 * eeh_report_error - Report pci error to each device driver
9b3c76f0 185 * @data: eeh device
29f8bf1b 186 * @userdata: return value
a84f273c
GS
187 *
188 * Report an EEH error to each device driver, collect up and
189 * merge the device driver responses. Cumulative response
cb5b5624 190 * passed back in "userdata".
77bd7415 191 */
9b3c76f0 192static void *eeh_report_error(void *data, void *userdata)
77bd7415 193{
9b3c76f0
GS
194 struct eeh_dev *edev = (struct eeh_dev *)data;
195 struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
18eb3b39 196 enum pci_ers_result rc, *res = userdata;
feadf7c0 197 struct pci_driver *driver;
77bd7415 198
d2b0f6f7
GS
199 if (!dev || eeh_dev_removed(edev))
200 return NULL;
77bd7415
LV
201 dev->error_state = pci_channel_io_frozen;
202
feadf7c0
GS
203 driver = eeh_pcid_get(dev);
204 if (!driver) return NULL;
77bd7415 205
8535ef05
MM
206 eeh_disable_irq(dev);
207
6a1ca373 208 if (!driver->err_handler ||
feadf7c0
GS
209 !driver->err_handler->error_detected) {
210 eeh_pcid_put(dev);
9b3c76f0 211 return NULL;
feadf7c0 212 }
77bd7415 213
29f8bf1b 214 rc = driver->err_handler->error_detected(dev, pci_channel_io_frozen);
2a50f144
LV
215
216 /* A driver that needs a reset trumps all others */
217 if (rc == PCI_ERS_RESULT_NEED_RESET) *res = rc;
18eb3b39 218 if (*res == PCI_ERS_RESULT_NONE) *res = rc;
70298c6e 219
feadf7c0 220 eeh_pcid_put(dev);
9b3c76f0 221 return NULL;
6a1ca373
LV
222}
223
224/**
29f8bf1b 225 * eeh_report_mmio_enabled - Tell drivers that MMIO has been enabled
9b3c76f0 226 * @data: eeh device
29f8bf1b 227 * @userdata: return value
6a1ca373 228 *
638799b3
LV
229 * Tells each device driver that IO ports, MMIO and config space I/O
230 * are now enabled. Collects up and merges the device driver responses.
231 * Cumulative response passed back in "userdata".
6a1ca373 232 */
9b3c76f0 233static void *eeh_report_mmio_enabled(void *data, void *userdata)
6a1ca373 234{
9b3c76f0
GS
235 struct eeh_dev *edev = (struct eeh_dev *)data;
236 struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
6a1ca373 237 enum pci_ers_result rc, *res = userdata;
9b3c76f0 238 struct pci_driver *driver;
6a1ca373 239
d2b0f6f7
GS
240 if (!dev || eeh_dev_removed(edev))
241 return NULL;
242
feadf7c0
GS
243 driver = eeh_pcid_get(dev);
244 if (!driver) return NULL;
9b3c76f0 245
feadf7c0 246 if (!driver->err_handler ||
f26c7a03
GS
247 !driver->err_handler->mmio_enabled ||
248 (edev->mode & EEH_DEV_NO_HANDLER)) {
feadf7c0 249 eeh_pcid_put(dev);
9b3c76f0 250 return NULL;
feadf7c0 251 }
6a1ca373 252
29f8bf1b 253 rc = driver->err_handler->mmio_enabled(dev);
2a50f144
LV
254
255 /* A driver that needs a reset trumps all others */
256 if (rc == PCI_ERS_RESULT_NEED_RESET) *res = rc;
6a1ca373 257 if (*res == PCI_ERS_RESULT_NONE) *res = rc;
70298c6e 258
feadf7c0 259 eeh_pcid_put(dev);
9b3c76f0 260 return NULL;
77bd7415
LV
261}
262
cb5b5624 263/**
29f8bf1b 264 * eeh_report_reset - Tell device that slot has been reset
9b3c76f0 265 * @data: eeh device
29f8bf1b
GS
266 * @userdata: return value
267 *
268 * This routine must be called while EEH tries to reset particular
269 * PCI device so that the associated PCI device driver could take
270 * some actions, usually to save data the driver needs so that the
271 * driver can work again while the device is recovered.
77bd7415 272 */
9b3c76f0 273static void *eeh_report_reset(void *data, void *userdata)
77bd7415 274{
9b3c76f0
GS
275 struct eeh_dev *edev = (struct eeh_dev *)data;
276 struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
6a1ca373 277 enum pci_ers_result rc, *res = userdata;
9b3c76f0 278 struct pci_driver *driver;
77bd7415 279
d2b0f6f7
GS
280 if (!dev || eeh_dev_removed(edev))
281 return NULL;
c58dc575
MM
282 dev->error_state = pci_channel_io_normal;
283
feadf7c0
GS
284 driver = eeh_pcid_get(dev);
285 if (!driver) return NULL;
286
8535ef05
MM
287 eeh_enable_irq(dev);
288
6a1ca373 289 if (!driver->err_handler ||
f26c7a03
GS
290 !driver->err_handler->slot_reset ||
291 (edev->mode & EEH_DEV_NO_HANDLER)) {
feadf7c0 292 eeh_pcid_put(dev);
9b3c76f0 293 return NULL;
feadf7c0 294 }
77bd7415 295
6a1ca373 296 rc = driver->err_handler->slot_reset(dev);
5794dbcb
LV
297 if ((*res == PCI_ERS_RESULT_NONE) ||
298 (*res == PCI_ERS_RESULT_RECOVERED)) *res = rc;
6a1ca373
LV
299 if (*res == PCI_ERS_RESULT_DISCONNECT &&
300 rc == PCI_ERS_RESULT_NEED_RESET) *res = rc;
70298c6e 301
feadf7c0 302 eeh_pcid_put(dev);
9b3c76f0 303 return NULL;
77bd7415
LV
304}
305
cb5b5624 306/**
29f8bf1b 307 * eeh_report_resume - Tell device to resume normal operations
9b3c76f0 308 * @data: eeh device
29f8bf1b
GS
309 * @userdata: return value
310 *
311 * This routine must be called to notify the device driver that it
312 * could resume so that the device driver can do some initialization
313 * to make the recovered device work again.
cb5b5624 314 */
9b3c76f0 315static void *eeh_report_resume(void *data, void *userdata)
77bd7415 316{
9b3c76f0
GS
317 struct eeh_dev *edev = (struct eeh_dev *)data;
318 struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
319 struct pci_driver *driver;
320
d2b0f6f7
GS
321 if (!dev || eeh_dev_removed(edev))
322 return NULL;
77bd7415
LV
323 dev->error_state = pci_channel_io_normal;
324
feadf7c0
GS
325 driver = eeh_pcid_get(dev);
326 if (!driver) return NULL;
d0e70341 327
8535ef05
MM
328 eeh_enable_irq(dev);
329
d0e70341 330 if (!driver->err_handler ||
f26c7a03
GS
331 !driver->err_handler->resume ||
332 (edev->mode & EEH_DEV_NO_HANDLER)) {
333 edev->mode &= ~EEH_DEV_NO_HANDLER;
feadf7c0 334 eeh_pcid_put(dev);
9b3c76f0 335 return NULL;
feadf7c0 336 }
77bd7415
LV
337
338 driver->err_handler->resume(dev);
70298c6e 339
feadf7c0 340 eeh_pcid_put(dev);
9b3c76f0 341 return NULL;
77bd7415
LV
342}
343
cb5b5624 344/**
29f8bf1b 345 * eeh_report_failure - Tell device driver that device is dead.
9b3c76f0 346 * @data: eeh device
29f8bf1b 347 * @userdata: return value
cb5b5624
LV
348 *
349 * This informs the device driver that the device is permanently
350 * dead, and that no further recovery attempts will be made on it.
351 */
9b3c76f0 352static void *eeh_report_failure(void *data, void *userdata)
77bd7415 353{
9b3c76f0
GS
354 struct eeh_dev *edev = (struct eeh_dev *)data;
355 struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
356 struct pci_driver *driver;
357
d2b0f6f7
GS
358 if (!dev || eeh_dev_removed(edev))
359 return NULL;
77bd7415
LV
360 dev->error_state = pci_channel_io_perm_failure;
361
feadf7c0
GS
362 driver = eeh_pcid_get(dev);
363 if (!driver) return NULL;
77bd7415 364
8535ef05
MM
365 eeh_disable_irq(dev);
366
367 if (!driver->err_handler ||
feadf7c0
GS
368 !driver->err_handler->error_detected) {
369 eeh_pcid_put(dev);
9b3c76f0 370 return NULL;
feadf7c0 371 }
8535ef05 372
77bd7415 373 driver->err_handler->error_detected(dev, pci_channel_io_perm_failure);
70298c6e 374
feadf7c0 375 eeh_pcid_put(dev);
9b3c76f0 376 return NULL;
77bd7415
LV
377}
378
f5c57710
GS
379static void *eeh_rmv_device(void *data, void *userdata)
380{
381 struct pci_driver *driver;
382 struct eeh_dev *edev = (struct eeh_dev *)data;
383 struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
384 int *removed = (int *)userdata;
385
386 /*
387 * Actually, we should remove the PCI bridges as well.
388 * However, that's lots of complexity to do that,
389 * particularly some of devices under the bridge might
390 * support EEH. So we just care about PCI devices for
391 * simplicity here.
392 */
393 if (!dev || (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE))
394 return NULL;
8cc6b6cd 395
d2b0f6f7
GS
396 /*
397 * We rely on count-based pcibios_release_device() to
398 * detach permanently offlined PEs. Unfortunately, that's
399 * not reliable enough. We might have the permanently
400 * offlined PEs attached, but we needn't take care of
401 * them and their child devices.
402 */
403 if (eeh_dev_removed(edev))
404 return NULL;
405
f5c57710 406 driver = eeh_pcid_get(dev);
8cc6b6cd
TLSC
407 if (driver) {
408 eeh_pcid_put(dev);
409 if (driver->err_handler)
410 return NULL;
411 }
f5c57710
GS
412
413 /* Remove it from PCI subsystem */
414 pr_debug("EEH: Removing %s without EEH sensitive driver\n",
415 pci_name(dev));
416 edev->bus = dev->bus;
417 edev->mode |= EEH_DEV_DISCONNECTED;
418 (*removed)++;
419
1c2042c8 420 pci_lock_rescan_remove();
f5c57710 421 pci_stop_and_remove_bus_device(dev);
1c2042c8 422 pci_unlock_rescan_remove();
f5c57710
GS
423
424 return NULL;
425}
426
427static void *eeh_pe_detach_dev(void *data, void *userdata)
428{
429 struct eeh_pe *pe = (struct eeh_pe *)data;
430 struct eeh_dev *edev, *tmp;
431
432 eeh_pe_for_each_dev(pe, edev, tmp) {
433 if (!(edev->mode & EEH_DEV_DISCONNECTED))
434 continue;
435
436 edev->mode &= ~(EEH_DEV_DISCONNECTED | EEH_DEV_IRQ_DISABLED);
437 eeh_rmv_from_parent_pe(edev);
438 }
439
440 return NULL;
441}
442
78954700
GS
443/*
444 * Explicitly clear PE's frozen state for PowerNV where
445 * we have frozen PE until BAR restore is completed. It's
446 * harmless to clear it for pSeries. To be consistent with
447 * PE reset (for 3 times), we try to clear the frozen state
448 * for 3 times as well.
449 */
2c665992 450static void *__eeh_clear_pe_frozen_state(void *data, void *flag)
78954700 451{
2c665992 452 struct eeh_pe *pe = (struct eeh_pe *)data;
78954700
GS
453 int i, rc;
454
455 for (i = 0; i < 3; i++) {
456 rc = eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
457 if (rc)
458 continue;
459 rc = eeh_pci_enable(pe, EEH_OPT_THAW_DMA);
460 if (!rc)
461 break;
462 }
463
464 /* The PE has been isolated, clear it */
2c665992 465 if (rc) {
78954700
GS
466 pr_warn("%s: Can't clear frozen PHB#%x-PE#%x (%d)\n",
467 __func__, pe->phb->global_number, pe->addr, rc);
2c665992
GS
468 return (void *)pe;
469 }
470
471 return NULL;
472}
473
474static int eeh_clear_pe_frozen_state(struct eeh_pe *pe)
475{
476 void *rc;
477
478 rc = eeh_pe_traverse(pe, __eeh_clear_pe_frozen_state, NULL);
479 if (!rc)
78954700
GS
480 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
481
2c665992 482 return rc ? -EIO : 0;
78954700
GS
483}
484
77bd7415 485/**
29f8bf1b 486 * eeh_reset_device - Perform actual reset of a pci slot
9b3c76f0 487 * @pe: EEH PE
29f8bf1b 488 * @bus: PCI bus corresponding to the isolcated slot
77bd7415 489 *
29f8bf1b
GS
490 * This routine must be called to do reset on the indicated PE.
491 * During the reset, udev might be invoked because those affected
492 * PCI devices will be removed and then added.
77bd7415 493 */
9b3c76f0 494static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
77bd7415 495{
f5c57710 496 struct pci_bus *frozen_bus = eeh_pe_bus_get(pe);
5a71978e 497 struct timeval tstamp;
f5c57710 498 int cnt, rc, removed = 0;
42405456
LV
499
500 /* pcibios will clear the counter; save the value */
9b3c76f0 501 cnt = pe->freeze_count;
5a71978e 502 tstamp = pe->tstamp;
42405456 503
20ee6a97
GS
504 /*
505 * We don't remove the corresponding PE instances because
506 * we need the information afterwords. The attached EEH
507 * devices are expected to be attached soon when calling
508 * into pcibios_add_pci_devices().
509 */
f5c57710 510 eeh_pe_state_mark(pe, EEH_PE_KEEP);
1c2042c8
RW
511 if (bus) {
512 pci_lock_rescan_remove();
807a827d 513 pcibios_remove_pci_devices(bus);
1c2042c8
RW
514 pci_unlock_rescan_remove();
515 } else if (frozen_bus) {
f5c57710 516 eeh_pe_dev_traverse(pe, eeh_rmv_device, &removed);
1c2042c8 517 }
77bd7415 518
d0914f50
GS
519 /*
520 * Reset the pci controller. (Asserts RST#; resets config space).
b6495c0c 521 * Reconfigure bridges and devices. Don't try to bring the system
29f8bf1b 522 * up if the reset failed for some reason.
d0914f50
GS
523 *
524 * During the reset, it's very dangerous to have uncontrolled PCI
525 * config accesses. So we prefer to block them. However, controlled
526 * PCI config accesses initiated from EEH itself are allowed.
29f8bf1b 527 */
d0914f50 528 eeh_pe_state_mark(pe, EEH_PE_RESET);
9b3c76f0 529 rc = eeh_reset_pe(pe);
d0914f50
GS
530 if (rc) {
531 eeh_pe_state_clear(pe, EEH_PE_RESET);
b6495c0c 532 return rc;
d0914f50 533 }
77bd7415 534
1c2042c8
RW
535 pci_lock_rescan_remove();
536
9b3c76f0
GS
537 /* Restore PE */
538 eeh_ops->configure_bridge(pe);
539 eeh_pe_restore_bars(pe);
d0914f50 540 eeh_pe_state_clear(pe, EEH_PE_RESET);
77bd7415 541
78954700
GS
542 /* Clear frozen state */
543 rc = eeh_clear_pe_frozen_state(pe);
544 if (rc)
545 return rc;
546
77bd7415 547 /* Give the system 5 seconds to finish running the user-space
a84f273c
GS
548 * hotplug shutdown scripts, e.g. ifdown for ethernet. Yes,
549 * this is a hack, but if we don't do this, and try to bring
550 * the device up before the scripts have taken it down,
77bd7415
LV
551 * potentially weird things happen.
552 */
553 if (bus) {
f5c57710 554 pr_info("EEH: Sleep 5s ahead of complete hotplug\n");
29f8bf1b 555 ssleep(5);
f5c57710
GS
556
557 /*
558 * The EEH device is still connected with its parent
559 * PE. We should disconnect it so the binding can be
560 * rebuilt when adding PCI devices.
561 */
562 eeh_pe_traverse(pe, eeh_pe_detach_dev, NULL);
77bd7415 563 pcibios_add_pci_devices(bus);
f5c57710
GS
564 } else if (frozen_bus && removed) {
565 pr_info("EEH: Sleep 5s ahead of partial hotplug\n");
566 ssleep(5);
567
568 eeh_pe_traverse(pe, eeh_pe_detach_dev, NULL);
569 pcibios_add_pci_devices(frozen_bus);
77bd7415 570 }
f5c57710 571 eeh_pe_state_clear(pe, EEH_PE_KEEP);
5a71978e
GS
572
573 pe->tstamp = tstamp;
9b3c76f0 574 pe->freeze_count = cnt;
b6495c0c 575
1c2042c8 576 pci_unlock_rescan_remove();
b6495c0c 577 return 0;
77bd7415
LV
578}
579
580/* The longest amount of time to wait for a pci device
581 * to come back on line, in seconds.
582 */
fb48dc22 583#define MAX_WAIT_FOR_RECOVERY 300
77bd7415 584
8a6b1bc7 585static void eeh_handle_normal_event(struct eeh_pe *pe)
77bd7415 586{
77bd7415 587 struct pci_bus *frozen_bus;
b6495c0c 588 int rc = 0;
18eb3b39 589 enum pci_ers_result result = PCI_ERS_RESULT_NONE;
77bd7415 590
9b3c76f0 591 frozen_bus = eeh_pe_bus_get(pe);
77bd7415 592 if (!frozen_bus) {
9b3c76f0
GS
593 pr_err("%s: Cannot find PCI bus for PHB#%d-PE#%x\n",
594 __func__, pe->phb->global_number, pe->addr);
595 return;
77bd7415
LV
596 }
597
5a71978e 598 eeh_pe_update_time_stamp(pe);
9b3c76f0
GS
599 pe->freeze_count++;
600 if (pe->freeze_count > EEH_MAX_ALLOWED_FREEZES)
8df83028 601 goto excess_failures;
0dae2743 602 pr_warn("EEH: This PCI device has failed %d times in the last hour\n",
9b3c76f0 603 pe->freeze_count);
77bd7415
LV
604
605 /* Walk the various device drivers attached to this slot through
606 * a reset sequence, giving each an opportunity to do what it needs
607 * to accomplish the reset. Each child gets a report of the
608 * status ... if any child can't handle the reset, then the entire
609 * slot is dlpar removed and added.
610 */
56ca4fde 611 pr_info("EEH: Notify device drivers to shutdown\n");
9b3c76f0 612 eeh_pe_dev_traverse(pe, eeh_report_error, &result);
77bd7415 613
5f1a7c81 614 /* Get the current PCI slot state. This can take a long time,
29f8bf1b
GS
615 * sometimes over 3 seconds for certain systems.
616 */
9b3c76f0 617 rc = eeh_ops->wait_state(pe, MAX_WAIT_FOR_RECOVERY*1000);
eb594a47 618 if (rc < 0 || rc == EEH_STATE_NOT_SUPPORT) {
0dae2743 619 pr_warn("EEH: Permanent failure\n");
5f1a7c81
LV
620 goto hard_fail;
621 }
622
ede8ca26
LV
623 /* Since rtas may enable MMIO when posting the error log,
624 * don't post the error log until after all dev drivers
17213c3b
LV
625 * have been informed.
626 */
56ca4fde 627 pr_info("EEH: Collect temporary log\n");
9b3c76f0 628 eeh_slot_error_detail(pe, EEH_LOG_TEMP);
ede8ca26 629
77bd7415
LV
630 /* If all device drivers were EEH-unaware, then shut
631 * down all of the device drivers, and hope they
632 * go down willingly, without panicing the system.
633 */
18eb3b39 634 if (result == PCI_ERS_RESULT_NONE) {
56ca4fde 635 pr_info("EEH: Reset with hotplug activity\n");
9b3c76f0 636 rc = eeh_reset_device(pe, frozen_bus);
e0f90b64 637 if (rc) {
0dae2743
GS
638 pr_warn("%s: Unable to reset, err=%d\n",
639 __func__, rc);
b6495c0c 640 goto hard_fail;
e0f90b64 641 }
77bd7415
LV
642 }
643
6a1ca373
LV
644 /* If all devices reported they can proceed, then re-enable MMIO */
645 if (result == PCI_ERS_RESULT_CAN_RECOVER) {
56ca4fde 646 pr_info("EEH: Enable I/O for affected devices\n");
9b3c76f0 647 rc = eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
6a1ca373 648
fa1be476
LV
649 if (rc < 0)
650 goto hard_fail;
6a1ca373
LV
651 if (rc) {
652 result = PCI_ERS_RESULT_NEED_RESET;
653 } else {
56ca4fde 654 pr_info("EEH: Notify device drivers to resume I/O\n");
9b3c76f0 655 eeh_pe_dev_traverse(pe, eeh_report_mmio_enabled, &result);
6a1ca373 656 }
77bd7415
LV
657 }
658
6a1ca373 659 /* If all devices reported they can proceed, then re-enable DMA */
18eb3b39 660 if (result == PCI_ERS_RESULT_CAN_RECOVER) {
56ca4fde 661 pr_info("EEH: Enabled DMA for affected devices\n");
9b3c76f0 662 rc = eeh_pci_enable(pe, EEH_OPT_THAW_DMA);
6a1ca373 663
fa1be476
LV
664 if (rc < 0)
665 goto hard_fail;
35845a78 666 if (rc) {
6a1ca373 667 result = PCI_ERS_RESULT_NEED_RESET;
35845a78
GS
668 } else {
669 /*
670 * We didn't do PE reset for the case. The PE
671 * is still in frozen state. Clear it before
672 * resuming the PE.
673 */
674 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
d0e70341 675 result = PCI_ERS_RESULT_RECOVERED;
35845a78 676 }
6a1ca373
LV
677 }
678
679 /* If any device has a hard failure, then shut off everything. */
e0f90b64 680 if (result == PCI_ERS_RESULT_DISCONNECT) {
0dae2743 681 pr_warn("EEH: Device driver gave up\n");
6a1ca373 682 goto hard_fail;
e0f90b64 683 }
6a1ca373
LV
684
685 /* If any device called out for a reset, then reset the slot */
686 if (result == PCI_ERS_RESULT_NEED_RESET) {
56ca4fde 687 pr_info("EEH: Reset without hotplug activity\n");
9b3c76f0 688 rc = eeh_reset_device(pe, NULL);
e0f90b64 689 if (rc) {
0dae2743
GS
690 pr_warn("%s: Cannot reset, err=%d\n",
691 __func__, rc);
b6495c0c 692 goto hard_fail;
e0f90b64 693 }
56ca4fde
GS
694
695 pr_info("EEH: Notify device drivers "
696 "the completion of reset\n");
6a1ca373 697 result = PCI_ERS_RESULT_NONE;
9b3c76f0 698 eeh_pe_dev_traverse(pe, eeh_report_reset, &result);
77bd7415
LV
699 }
700
6a1ca373 701 /* All devices should claim they have recovered by now. */
90fdd613
LV
702 if ((result != PCI_ERS_RESULT_RECOVERED) &&
703 (result != PCI_ERS_RESULT_NONE)) {
0dae2743 704 pr_warn("EEH: Not recovered\n");
6a1ca373 705 goto hard_fail;
e0f90b64 706 }
6a1ca373 707
77bd7415 708 /* Tell all device drivers that they can resume operations */
56ca4fde 709 pr_info("EEH: Notify device driver to resume\n");
9b3c76f0 710 eeh_pe_dev_traverse(pe, eeh_report_resume, NULL);
b6495c0c 711
9b3c76f0 712 return;
a84f273c 713
8df83028 714excess_failures:
b6495c0c
LV
715 /*
716 * About 90% of all real-life EEH failures in the field
717 * are due to poorly seated PCI cards. Only 10% or so are
718 * due to actual, failed cards.
719 */
9b3c76f0
GS
720 pr_err("EEH: PHB#%d-PE#%x has failed %d times in the\n"
721 "last hour and has been permanently disabled.\n"
722 "Please try reseating or replacing it.\n",
723 pe->phb->global_number, pe->addr,
724 pe->freeze_count);
8df83028
LV
725 goto perm_error;
726
727hard_fail:
9b3c76f0
GS
728 pr_err("EEH: Unable to recover from failure from PHB#%d-PE#%x.\n"
729 "Please try reseating or replacing it\n",
730 pe->phb->global_number, pe->addr);
b6495c0c 731
8df83028 732perm_error:
9b3c76f0 733 eeh_slot_error_detail(pe, EEH_LOG_PERM);
b6495c0c
LV
734
735 /* Notify all devices that they're about to go down. */
9b3c76f0 736 eeh_pe_dev_traverse(pe, eeh_report_failure, NULL);
b6495c0c 737
d2b0f6f7
GS
738 /* Mark the PE to be removed permanently */
739 pe->freeze_count = EEH_MAX_ALLOWED_FREEZES + 1;
740
741 /*
742 * Shut down the device drivers for good. We mark
743 * all removed devices correctly to avoid access
744 * the their PCI config any more.
745 */
1c2042c8 746 if (frozen_bus) {
d2b0f6f7
GS
747 eeh_pe_dev_mode_mark(pe, EEH_DEV_REMOVED);
748
1c2042c8 749 pci_lock_rescan_remove();
9b3c76f0 750 pcibios_remove_pci_devices(frozen_bus);
1c2042c8
RW
751 pci_unlock_rescan_remove();
752 }
77bd7415 753}
8a6b1bc7
GS
754
755static void eeh_handle_special_event(void)
756{
757 struct eeh_pe *pe, *phb_pe;
758 struct pci_bus *bus;
7e4e7867 759 struct pci_controller *hose;
8a6b1bc7 760 unsigned long flags;
7e4e7867 761 int rc;
8a6b1bc7 762
8a6b1bc7 763
7e4e7867
GS
764 do {
765 rc = eeh_ops->next_error(&pe);
766
767 switch (rc) {
768 case EEH_NEXT_ERR_DEAD_IOC:
769 /* Mark all PHBs in dead state */
770 eeh_serialize_lock(&flags);
771
772 /* Purge all events */
5c7a35e3 773 eeh_remove_event(NULL, true);
7e4e7867
GS
774
775 list_for_each_entry(hose, &hose_list, list_node) {
776 phb_pe = eeh_phb_pe_get(hose);
777 if (!phb_pe) continue;
778
9e049375 779 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
7e4e7867
GS
780 }
781
782 eeh_serialize_unlock(flags);
783
784 break;
785 case EEH_NEXT_ERR_FROZEN_PE:
786 case EEH_NEXT_ERR_FENCED_PHB:
787 case EEH_NEXT_ERR_DEAD_PHB:
788 /* Mark the PE in fenced state */
789 eeh_serialize_lock(&flags);
790
791 /* Purge all events of the PHB */
5c7a35e3 792 eeh_remove_event(pe, true);
7e4e7867
GS
793
794 if (rc == EEH_NEXT_ERR_DEAD_PHB)
9e049375 795 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
7e4e7867
GS
796 else
797 eeh_pe_state_mark(pe,
798 EEH_PE_ISOLATED | EEH_PE_RECOVERING);
799
800 eeh_serialize_unlock(flags);
801
802 break;
803 case EEH_NEXT_ERR_NONE:
804 return;
805 default:
806 pr_warn("%s: Invalid value %d from next_error()\n",
807 __func__, rc);
808 return;
8a6b1bc7 809 }
8a6b1bc7 810
7e4e7867
GS
811 /*
812 * For fenced PHB and frozen PE, it's handled as normal
813 * event. We have to remove the affected PHBs for dead
814 * PHB and IOC
815 */
816 if (rc == EEH_NEXT_ERR_FROZEN_PE ||
817 rc == EEH_NEXT_ERR_FENCED_PHB) {
818 eeh_handle_normal_event(pe);
9e049375 819 eeh_pe_state_clear(pe, EEH_PE_RECOVERING);
7e4e7867 820 } else {
1b17366d 821 pci_lock_rescan_remove();
7e4e7867
GS
822 list_for_each_entry(hose, &hose_list, list_node) {
823 phb_pe = eeh_phb_pe_get(hose);
824 if (!phb_pe ||
9e049375
GS
825 !(phb_pe->state & EEH_PE_ISOLATED) ||
826 (phb_pe->state & EEH_PE_RECOVERING))
7e4e7867
GS
827 continue;
828
829 /* Notify all devices to be down */
830 bus = eeh_pe_bus_get(phb_pe);
831 eeh_pe_dev_traverse(pe,
832 eeh_report_failure, NULL);
833 pcibios_remove_pci_devices(bus);
834 }
1b17366d 835 pci_unlock_rescan_remove();
8a6b1bc7 836 }
7e4e7867
GS
837
838 /*
839 * If we have detected dead IOC, we needn't proceed
840 * any more since all PHBs would have been removed
841 */
842 if (rc == EEH_NEXT_ERR_DEAD_IOC)
843 break;
844 } while (rc != EEH_NEXT_ERR_NONE);
8a6b1bc7
GS
845}
846
847/**
848 * eeh_handle_event - Reset a PCI device after hard lockup.
849 * @pe: EEH PE
850 *
851 * While PHB detects address or data parity errors on particular PCI
852 * slot, the associated PE will be frozen. Besides, DMA's occurring
853 * to wild addresses (which usually happen due to bugs in device
854 * drivers or in PCI adapter firmware) can cause EEH error. #SERR,
855 * #PERR or other misc PCI-related errors also can trigger EEH errors.
856 *
857 * Recovery process consists of unplugging the device driver (which
858 * generated hotplug events to userspace), then issuing a PCI #RST to
859 * the device, then reconfiguring the PCI config space for all bridges
860 * & devices under this slot, and then finally restarting the device
861 * drivers (which cause a second set of hotplug events to go out to
862 * userspace).
863 */
864void eeh_handle_event(struct eeh_pe *pe)
865{
866 if (pe)
867 eeh_handle_normal_event(pe);
868 else
869 eeh_handle_special_event();
870}