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bb04ffe8 CC |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* | |
3 | * Ultravisor definitions | |
4 | * | |
5 | * Copyright 2019, IBM Corporation. | |
6 | * | |
7 | */ | |
8 | #ifndef _ASM_POWERPC_ULTRAVISOR_H | |
9 | #define _ASM_POWERPC_ULTRAVISOR_H | |
10 | ||
139a1d28 MA |
11 | #include <asm/asm-prototypes.h> |
12 | #include <asm/ultravisor-api.h> | |
52231340 | 13 | #include <asm/firmware.h> |
139a1d28 | 14 | |
bb04ffe8 CC |
15 | int early_init_dt_scan_ultravisor(unsigned long node, const char *uname, |
16 | int depth, void *data); | |
17 | ||
52231340 CC |
18 | /* |
19 | * In ultravisor enabled systems, PTCR becomes ultravisor privileged only for | |
20 | * writing and an attempt to write to it will cause a Hypervisor Emulation | |
21 | * Assistance interrupt. | |
22 | */ | |
23 | static inline void set_ptcr_when_no_uv(u64 val) | |
24 | { | |
25 | if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR)) | |
26 | mtspr(SPRN_PTCR, val); | |
27 | } | |
28 | ||
139a1d28 MA |
29 | static inline int uv_register_pate(u64 lpid, u64 dw0, u64 dw1) |
30 | { | |
31 | return ucall_norets(UV_WRITE_PATE, lpid, dw0, dw1); | |
32 | } | |
33 | ||
f7777e00 RP |
34 | static inline int uv_share_page(u64 pfn, u64 npages) |
35 | { | |
36 | return ucall_norets(UV_SHARE_PAGE, pfn, npages); | |
37 | } | |
38 | ||
39 | static inline int uv_unshare_page(u64 pfn, u64 npages) | |
40 | { | |
41 | return ucall_norets(UV_UNSHARE_PAGE, pfn, npages); | |
42 | } | |
43 | ||
256ba2c1 RP |
44 | static inline int uv_unshare_all_pages(void) |
45 | { | |
46 | return ucall_norets(UV_UNSHARE_ALL_PAGES); | |
47 | } | |
48 | ||
bb04ffe8 | 49 | #endif /* _ASM_POWERPC_ULTRAVISOR_H */ |