Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
[linux-2.6-block.git] / arch / powerpc / include / asm / time.h
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1/*
2 * Common time prototypes and such for all ppc machines.
3 *
4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge
5 * Paul Mackerras' version and mine for PReP and Pmac.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifndef __POWERPC_TIME_H
14#define __POWERPC_TIME_H
15
16#ifdef __KERNEL__
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17#include <linux/types.h>
18#include <linux/percpu.h>
19
20#include <asm/processor.h>
b92a226e 21#include <asm/cpu_has_feature.h>
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22
23/* time.c */
24extern unsigned long tb_ticks_per_jiffy;
25extern unsigned long tb_ticks_per_usec;
26extern unsigned long tb_ticks_per_sec;
6e35994d 27extern struct clock_event_device decrementer_clockevent;
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28
29struct rtc_time;
30extern void to_tm(int tim, struct rtc_time * tm);
1b67bee1 31extern void tick_broadcast_ipi_handler(void);
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32
33extern void generic_calibrate_decr(void);
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34
35/* Some sane defaults: 125 MHz timebase, 1GHz processor */
36extern unsigned long ppc_proc_freq;
37#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
38extern unsigned long ppc_tb_freq;
39#define DEFAULT_TB_FREQ 125000000UL
40
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41struct div_result {
42 u64 result_high;
43 u64 result_low;
44};
45
46/* Accessor functions for the timebase (RTC on 601) registers. */
47/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
48#ifdef CONFIG_6xx
5d14a18d 49#define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB))
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50#else
51#define __USE_RTC() 0
52#endif
53
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54#ifdef CONFIG_PPC64
55
56/* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
57#define get_tbl get_tb
58
59#else
60
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61static inline unsigned long get_tbl(void)
62{
f2783c15 63#if defined(CONFIG_403GCX)
859deea9 64 unsigned long tbl;
f2783c15 65 asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
859deea9 66 return tbl;
f2783c15 67#else
859deea9 68 return mftbl();
f2783c15 69#endif
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70}
71
72static inline unsigned int get_tbu(void)
73{
859deea9 74#ifdef CONFIG_403GCX
f2783c15 75 unsigned int tbu;
f2783c15 76 asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
859deea9 77 return tbu;
f2783c15 78#else
859deea9 79 return mftbu();
f2783c15 80#endif
f2783c15 81}
859deea9 82#endif /* !CONFIG_PPC64 */
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83
84static inline unsigned int get_rtcl(void)
85{
86 unsigned int rtcl;
87
88 asm volatile("mfrtcl %0" : "=r" (rtcl));
89 return rtcl;
90}
91
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92static inline u64 get_rtc(void)
93{
94 unsigned int hi, lo, hi2;
95
96 do {
97 asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2"
98 : "=r" (hi), "=r" (lo), "=r" (hi2));
99 } while (hi2 != hi);
100 return (u64)hi * 1000000000 + lo;
101}
102
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103static inline u64 get_vtb(void)
104{
105#ifdef CONFIG_PPC_BOOK3S_64
106 if (cpu_has_feature(CPU_FTR_ARCH_207S))
905259e3 107 return mfspr(SPRN_VTB);
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108#endif
109 return 0;
110}
111
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112#ifdef CONFIG_PPC64
113static inline u64 get_tb(void)
114{
115 return mftb();
116}
859deea9 117#else /* CONFIG_PPC64 */
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118static inline u64 get_tb(void)
119{
120 unsigned int tbhi, tblo, tbhi2;
121
122 do {
123 tbhi = get_tbu();
124 tblo = get_tbl();
125 tbhi2 = get_tbu();
126 } while (tbhi != tbhi2);
127
128 return ((u64)tbhi << 32) | tblo;
129}
859deea9 130#endif /* !CONFIG_PPC64 */
f2783c15 131
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132static inline u64 get_tb_or_rtc(void)
133{
134 return __USE_RTC() ? get_rtc() : get_tb();
135}
136
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137static inline void set_tb(unsigned int upper, unsigned int lower)
138{
139 mtspr(SPRN_TBWL, 0);
140 mtspr(SPRN_TBWU, upper);
141 mtspr(SPRN_TBWL, lower);
142}
143
144/* Accessor functions for the decrementer register.
145 * The 4xx doesn't even have a decrementer. I tried to use the
146 * generic timer interrupt code, which seems OK, with the 4xx PIT
147 * in auto-reload mode. The problem is PIT stops counting when it
148 * hits zero. If it would wrap, we could use it just like a decrementer.
149 */
79901024 150static inline u64 get_dec(void)
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151{
152#if defined(CONFIG_40x)
153 return (mfspr(SPRN_PIT));
154#else
155 return (mfspr(SPRN_DEC));
156#endif
157}
158
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159/*
160 * Note: Book E and 4xx processors differ from other PowerPC processors
161 * in when the decrementer generates its interrupt: on the 1 to 0
162 * transition for Book E/4xx, but on the 0 to -1 transition for others.
163 */
79901024 164static inline void set_dec(u64 val)
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165{
166#if defined(CONFIG_40x)
79901024 167 mtspr(SPRN_PIT, (u32) val);
f2783c15 168#else
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169#ifndef CONFIG_BOOKE
170 --val;
f2783c15 171#endif
43875cc0 172 mtspr(SPRN_DEC, val);
63e9e1c2 173#endif /* not 40x */
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174}
175
176static inline unsigned long tb_ticks_since(unsigned long tstamp)
177{
178 if (__USE_RTC()) {
179 int delta = get_rtcl() - (unsigned int) tstamp;
180 return delta < 0 ? delta + 1000000000 : delta;
181 }
182 return get_tbl() - tstamp;
183}
184
185#define mulhwu(x,y) \
186({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
187
188#ifdef CONFIG_PPC64
189#define mulhdu(x,y) \
190({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
191#else
192extern u64 mulhdu(u64, u64);
193#endif
194
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195extern void div128_by_32(u64 dividend_high, u64 dividend_low,
196 unsigned divisor, struct div_result *dr);
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197
198/* Used to store Processor Utilization register (purr) values */
199
200struct cpu_usage {
201 u64 current_tb; /* Holds the current purr register values */
202};
203
204DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
205
d831d0b8 206extern void secondary_cpu_time_init(void);
71712b45 207
7df10275 208DECLARE_PER_CPU(u64, decrementers_next_tb);
37fb9a02 209
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210/* Convert timebase ticks to nanoseconds */
211unsigned long long tb_to_ns(unsigned long long tb_ticks);
212
f2783c15 213#endif /* __KERNEL__ */
7a69af63 214#endif /* __POWERPC_TIME_H */