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1da177e4 LT |
1 | #ifndef __ASM_SPINLOCK_H |
2 | #define __ASM_SPINLOCK_H | |
88ced031 | 3 | #ifdef __KERNEL__ |
1da177e4 LT |
4 | |
5 | /* | |
6 | * Simple spin lock operations. | |
7 | * | |
8 | * Copyright (C) 2001-2004 Paul Mackerras <paulus@au.ibm.com>, IBM | |
9 | * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM | |
10 | * Copyright (C) 2002 Dave Engebretsen <engebret@us.ibm.com>, IBM | |
11 | * Rework to support virtual processors | |
12 | * | |
13 | * Type of int is used as a full 64b word is not necessary. | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or | |
16 | * modify it under the terms of the GNU General Public License | |
17 | * as published by the Free Software Foundation; either version | |
18 | * 2 of the License, or (at your option) any later version. | |
fb1c8f93 IM |
19 | * |
20 | * (the type definitions are in asm/spinlock_types.h) | |
1da177e4 | 21 | */ |
945feb17 | 22 | #include <linux/irqflags.h> |
0212ddd8 | 23 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
24 | #include <asm/paca.h> |
25 | #include <asm/hvcall.h> | |
0212ddd8 | 26 | #endif |
0212ddd8 | 27 | #include <asm/synch.h> |
4e14a4d1 | 28 | #include <asm/ppc-opcode.h> |
36a7eeaf | 29 | #include <asm/asm-405.h> |
1da177e4 | 30 | |
0212ddd8 PM |
31 | #ifdef CONFIG_PPC64 |
32 | /* use 0x800000yy when locked, where yy == CPU number */ | |
54bb7f4b | 33 | #ifdef __BIG_ENDIAN__ |
0212ddd8 PM |
34 | #define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token)) |
35 | #else | |
54bb7f4b AB |
36 | #define LOCK_TOKEN (*(u32 *)(&get_paca()->paca_index)) |
37 | #endif | |
38 | #else | |
0212ddd8 PM |
39 | #define LOCK_TOKEN 1 |
40 | #endif | |
41 | ||
f007cacf PM |
42 | #if defined(CONFIG_PPC64) && defined(CONFIG_SMP) |
43 | #define CLEAR_IO_SYNC (get_paca()->io_sync = 0) | |
44 | #define SYNC_IO do { \ | |
45 | if (unlikely(get_paca()->io_sync)) { \ | |
46 | mb(); \ | |
47 | get_paca()->io_sync = 0; \ | |
48 | } \ | |
49 | } while (0) | |
50 | #else | |
51 | #define CLEAR_IO_SYNC | |
52 | #define SYNC_IO | |
53 | #endif | |
54 | ||
41946c86 PX |
55 | #ifdef CONFIG_PPC_PSERIES |
56 | #define vcpu_is_preempted vcpu_is_preempted | |
57 | static inline bool vcpu_is_preempted(int cpu) | |
58 | { | |
a6201da3 AK |
59 | if (!firmware_has_feature(FW_FEATURE_SPLPAR)) |
60 | return false; | |
41946c86 PX |
61 | return !!(be32_to_cpu(lppaca_of(cpu).yield_count) & 1); |
62 | } | |
63 | #endif | |
64 | ||
3405d230 ME |
65 | static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock) |
66 | { | |
67 | return lock.slock == 0; | |
68 | } | |
69 | ||
7179ba52 ME |
70 | static inline int arch_spin_is_locked(arch_spinlock_t *lock) |
71 | { | |
51d7d520 | 72 | smp_mb(); |
7179ba52 ME |
73 | return !arch_spin_value_unlocked(*lock); |
74 | } | |
75 | ||
fb1c8f93 IM |
76 | /* |
77 | * This returns the old value in the lock, so we succeeded | |
78 | * in getting the lock if the return value is 0. | |
79 | */ | |
0199c4e6 | 80 | static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock) |
fb1c8f93 | 81 | { |
0212ddd8 | 82 | unsigned long tmp, token; |
1da177e4 | 83 | |
0212ddd8 | 84 | token = LOCK_TOKEN; |
fb1c8f93 | 85 | __asm__ __volatile__( |
4e14a4d1 | 86 | "1: " PPC_LWARX(%0,0,%2,1) "\n\ |
fb1c8f93 IM |
87 | cmpwi 0,%0,0\n\ |
88 | bne- 2f\n\ | |
89 | stwcx. %1,0,%2\n\ | |
f10e2e5b AB |
90 | bne- 1b\n" |
91 | PPC_ACQUIRE_BARRIER | |
92 | "2:" | |
93 | : "=&r" (tmp) | |
0212ddd8 | 94 | : "r" (token), "r" (&lock->slock) |
fb1c8f93 | 95 | : "cr0", "memory"); |
1da177e4 | 96 | |
fb1c8f93 IM |
97 | return tmp; |
98 | } | |
1da177e4 | 99 | |
0199c4e6 | 100 | static inline int arch_spin_trylock(arch_spinlock_t *lock) |
1da177e4 | 101 | { |
f007cacf | 102 | CLEAR_IO_SYNC; |
0199c4e6 | 103 | return __arch_spin_trylock(lock) == 0; |
1da177e4 LT |
104 | } |
105 | ||
106 | /* | |
107 | * On a system with shared processors (that is, where a physical | |
108 | * processor is multiplexed between several virtual processors), | |
109 | * there is no point spinning on a lock if the holder of the lock | |
110 | * isn't currently scheduled on a physical processor. Instead | |
111 | * we detect this situation and ask the hypervisor to give the | |
112 | * rest of our timeslice to the lock holder. | |
113 | * | |
114 | * So that we can tell which virtual processor is holding a lock, | |
115 | * we put 0x80000000 | smp_processor_id() in the lock when it is | |
116 | * held. Conveniently, we have a word in the paca that holds this | |
117 | * value. | |
118 | */ | |
119 | ||
1b041885 | 120 | #if defined(CONFIG_PPC_SPLPAR) |
1da177e4 | 121 | /* We only yield to the hypervisor if we are in shared processor mode */ |
f13c13a0 | 122 | #define SHARED_PROCESSOR (lppaca_shared_proc(local_paca->lppaca_ptr)) |
445c8951 | 123 | extern void __spin_yield(arch_spinlock_t *lock); |
fb3a6bbc | 124 | extern void __rw_yield(arch_rwlock_t *lock); |
1b041885 | 125 | #else /* SPLPAR */ |
1da177e4 LT |
126 | #define __spin_yield(x) barrier() |
127 | #define __rw_yield(x) barrier() | |
128 | #define SHARED_PROCESSOR 0 | |
129 | #endif | |
1da177e4 | 130 | |
0199c4e6 | 131 | static inline void arch_spin_lock(arch_spinlock_t *lock) |
1da177e4 | 132 | { |
f007cacf | 133 | CLEAR_IO_SYNC; |
1da177e4 | 134 | while (1) { |
0199c4e6 | 135 | if (likely(__arch_spin_trylock(lock) == 0)) |
1da177e4 LT |
136 | break; |
137 | do { | |
138 | HMT_low(); | |
139 | if (SHARED_PROCESSOR) | |
140 | __spin_yield(lock); | |
fb1c8f93 | 141 | } while (unlikely(lock->slock != 0)); |
1da177e4 LT |
142 | HMT_medium(); |
143 | } | |
144 | } | |
145 | ||
89b5810f | 146 | static inline |
0199c4e6 | 147 | void arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long flags) |
1da177e4 LT |
148 | { |
149 | unsigned long flags_dis; | |
150 | ||
f007cacf | 151 | CLEAR_IO_SYNC; |
1da177e4 | 152 | while (1) { |
0199c4e6 | 153 | if (likely(__arch_spin_trylock(lock) == 0)) |
1da177e4 LT |
154 | break; |
155 | local_save_flags(flags_dis); | |
156 | local_irq_restore(flags); | |
157 | do { | |
158 | HMT_low(); | |
159 | if (SHARED_PROCESSOR) | |
160 | __spin_yield(lock); | |
fb1c8f93 | 161 | } while (unlikely(lock->slock != 0)); |
1da177e4 LT |
162 | HMT_medium(); |
163 | local_irq_restore(flags_dis); | |
164 | } | |
165 | } | |
a4c1887d | 166 | #define arch_spin_lock_flags arch_spin_lock_flags |
1da177e4 | 167 | |
0199c4e6 | 168 | static inline void arch_spin_unlock(arch_spinlock_t *lock) |
fb1c8f93 | 169 | { |
f007cacf | 170 | SYNC_IO; |
0199c4e6 | 171 | __asm__ __volatile__("# arch_spin_unlock\n\t" |
f10e2e5b | 172 | PPC_RELEASE_BARRIER: : :"memory"); |
fb1c8f93 IM |
173 | lock->slock = 0; |
174 | } | |
175 | ||
1da177e4 LT |
176 | /* |
177 | * Read-write spinlocks, allowing multiple readers | |
178 | * but only one writer. | |
179 | * | |
180 | * NOTE! it is quite common to have readers in interrupts | |
181 | * but no interrupt writers. For those circumstances we | |
182 | * can "mix" irq-safe locks - any writer needs to get a | |
183 | * irq-safe write-lock, but readers can get non-irqsafe | |
184 | * read-locks. | |
185 | */ | |
1da177e4 | 186 | |
0212ddd8 PM |
187 | #ifdef CONFIG_PPC64 |
188 | #define __DO_SIGN_EXTEND "extsw %0,%0\n" | |
189 | #define WRLOCK_TOKEN LOCK_TOKEN /* it's negative */ | |
190 | #else | |
191 | #define __DO_SIGN_EXTEND | |
192 | #define WRLOCK_TOKEN (-1) | |
193 | #endif | |
194 | ||
1da177e4 LT |
195 | /* |
196 | * This returns the old value in the lock + 1, | |
197 | * so we got a read lock if the return value is > 0. | |
198 | */ | |
e5931943 | 199 | static inline long __arch_read_trylock(arch_rwlock_t *rw) |
1da177e4 LT |
200 | { |
201 | long tmp; | |
202 | ||
203 | __asm__ __volatile__( | |
4e14a4d1 | 204 | "1: " PPC_LWARX(%0,0,%1,1) "\n" |
0212ddd8 PM |
205 | __DO_SIGN_EXTEND |
206 | " addic. %0,%0,1\n\ | |
207 | ble- 2f\n" | |
208 | PPC405_ERR77(0,%1) | |
209 | " stwcx. %0,0,%1\n\ | |
f10e2e5b AB |
210 | bne- 1b\n" |
211 | PPC_ACQUIRE_BARRIER | |
212 | "2:" : "=&r" (tmp) | |
1da177e4 LT |
213 | : "r" (&rw->lock) |
214 | : "cr0", "xer", "memory"); | |
215 | ||
216 | return tmp; | |
217 | } | |
218 | ||
1da177e4 LT |
219 | /* |
220 | * This returns the old value in the lock, | |
221 | * so we got the write lock if the return value is 0. | |
222 | */ | |
e5931943 | 223 | static inline long __arch_write_trylock(arch_rwlock_t *rw) |
1da177e4 | 224 | { |
0212ddd8 | 225 | long tmp, token; |
1da177e4 | 226 | |
0212ddd8 | 227 | token = WRLOCK_TOKEN; |
1da177e4 | 228 | __asm__ __volatile__( |
4e14a4d1 | 229 | "1: " PPC_LWARX(%0,0,%2,1) "\n\ |
1da177e4 | 230 | cmpwi 0,%0,0\n\ |
0212ddd8 PM |
231 | bne- 2f\n" |
232 | PPC405_ERR77(0,%1) | |
233 | " stwcx. %1,0,%2\n\ | |
f10e2e5b AB |
234 | bne- 1b\n" |
235 | PPC_ACQUIRE_BARRIER | |
236 | "2:" : "=&r" (tmp) | |
0212ddd8 | 237 | : "r" (token), "r" (&rw->lock) |
1da177e4 LT |
238 | : "cr0", "memory"); |
239 | ||
240 | return tmp; | |
241 | } | |
242 | ||
e5931943 | 243 | static inline void arch_read_lock(arch_rwlock_t *rw) |
1da177e4 | 244 | { |
fb1c8f93 | 245 | while (1) { |
e5931943 | 246 | if (likely(__arch_read_trylock(rw) > 0)) |
fb1c8f93 IM |
247 | break; |
248 | do { | |
249 | HMT_low(); | |
250 | if (SHARED_PROCESSOR) | |
251 | __rw_yield(rw); | |
252 | } while (unlikely(rw->lock < 0)); | |
253 | HMT_medium(); | |
254 | } | |
1da177e4 LT |
255 | } |
256 | ||
e5931943 | 257 | static inline void arch_write_lock(arch_rwlock_t *rw) |
1da177e4 LT |
258 | { |
259 | while (1) { | |
e5931943 | 260 | if (likely(__arch_write_trylock(rw) == 0)) |
1da177e4 LT |
261 | break; |
262 | do { | |
263 | HMT_low(); | |
264 | if (SHARED_PROCESSOR) | |
265 | __rw_yield(rw); | |
d637413f | 266 | } while (unlikely(rw->lock != 0)); |
1da177e4 LT |
267 | HMT_medium(); |
268 | } | |
269 | } | |
270 | ||
e5931943 | 271 | static inline int arch_read_trylock(arch_rwlock_t *rw) |
fb1c8f93 | 272 | { |
e5931943 | 273 | return __arch_read_trylock(rw) > 0; |
fb1c8f93 IM |
274 | } |
275 | ||
e5931943 | 276 | static inline int arch_write_trylock(arch_rwlock_t *rw) |
fb1c8f93 | 277 | { |
e5931943 | 278 | return __arch_write_trylock(rw) == 0; |
fb1c8f93 IM |
279 | } |
280 | ||
e5931943 | 281 | static inline void arch_read_unlock(arch_rwlock_t *rw) |
fb1c8f93 IM |
282 | { |
283 | long tmp; | |
284 | ||
285 | __asm__ __volatile__( | |
144b9c13 | 286 | "# read_unlock\n\t" |
f10e2e5b | 287 | PPC_RELEASE_BARRIER |
144b9c13 | 288 | "1: lwarx %0,0,%1\n\ |
0212ddd8 PM |
289 | addic %0,%0,-1\n" |
290 | PPC405_ERR77(0,%1) | |
291 | " stwcx. %0,0,%1\n\ | |
fb1c8f93 IM |
292 | bne- 1b" |
293 | : "=&r"(tmp) | |
294 | : "r"(&rw->lock) | |
efc3624c | 295 | : "cr0", "xer", "memory"); |
fb1c8f93 IM |
296 | } |
297 | ||
e5931943 | 298 | static inline void arch_write_unlock(arch_rwlock_t *rw) |
fb1c8f93 | 299 | { |
144b9c13 | 300 | __asm__ __volatile__("# write_unlock\n\t" |
f10e2e5b | 301 | PPC_RELEASE_BARRIER: : :"memory"); |
fb1c8f93 IM |
302 | rw->lock = 0; |
303 | } | |
304 | ||
0199c4e6 TG |
305 | #define arch_spin_relax(lock) __spin_yield(lock) |
306 | #define arch_read_relax(lock) __rw_yield(lock) | |
307 | #define arch_write_relax(lock) __rw_yield(lock) | |
ef6edc97 | 308 | |
d89e588c PZ |
309 | /* See include/linux/spinlock.h */ |
310 | #define smp_mb__after_spinlock() smp_mb() | |
311 | ||
88ced031 | 312 | #endif /* __KERNEL__ */ |
1da177e4 | 313 | #endif /* __ASM_SPINLOCK_H */ |