Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
5ad57078 | 2 | * smp.h: PowerPC-specific SMP code. |
1da177e4 LT |
3 | * |
4 | * Original was a copy of sparc smp.h. Now heavily modified | |
5 | * for PPC. | |
6 | * | |
7 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | |
8 | * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License | |
12 | * as published by the Free Software Foundation; either version | |
13 | * 2 of the License, or (at your option) any later version. | |
14 | */ | |
15 | ||
5ad57078 PM |
16 | #ifndef _ASM_POWERPC_SMP_H |
17 | #define _ASM_POWERPC_SMP_H | |
1da177e4 | 18 | #ifdef __KERNEL__ |
1da177e4 | 19 | |
1da177e4 LT |
20 | #include <linux/threads.h> |
21 | #include <linux/cpumask.h> | |
22 | #include <linux/kernel.h> | |
23 | ||
24 | #ifndef __ASSEMBLY__ | |
25 | ||
5ad57078 | 26 | #ifdef CONFIG_PPC64 |
1da177e4 | 27 | #include <asm/paca.h> |
5ad57078 | 28 | #endif |
d5a7430d | 29 | #include <asm/percpu.h> |
1da177e4 LT |
30 | |
31 | extern int boot_cpuid; | |
9d07bc84 | 32 | extern int boot_cpu_count; |
1da177e4 LT |
33 | |
34 | extern void cpu_die(void); | |
35 | ||
36 | #ifdef CONFIG_SMP | |
37 | ||
e0476371 | 38 | extern void smp_send_debugger_break(void); |
7d12e780 | 39 | extern void smp_message_recv(int); |
fa3f82c8 | 40 | extern void start_secondary_resume(void); |
1da177e4 | 41 | |
6b7487fc | 42 | DECLARE_PER_CPU(unsigned int, cpu_pvr); |
1c21a293 | 43 | |
1da177e4 | 44 | #ifdef CONFIG_HOTPLUG_CPU |
1c91cc57 | 45 | extern void migrate_irqs(void); |
1da177e4 | 46 | int generic_cpu_disable(void); |
1da177e4 LT |
47 | void generic_cpu_die(unsigned int cpu); |
48 | void generic_mach_cpu_die(void); | |
105765f4 | 49 | void generic_set_cpu_dead(unsigned int cpu); |
1da177e4 LT |
50 | #endif |
51 | ||
5ad57078 | 52 | #ifdef CONFIG_PPC64 |
048c8bc9 | 53 | #define raw_smp_processor_id() (local_paca->paca_index) |
1da177e4 | 54 | #define hard_smp_processor_id() (get_paca()->hw_cpu_id) |
5ad57078 PM |
55 | #else |
56 | /* 32-bit */ | |
57 | extern int smp_hw_index[]; | |
58 | ||
59 | #define raw_smp_processor_id() (current_thread_info()->cpu) | |
60 | #define hard_smp_processor_id() (smp_hw_index[smp_processor_id()]) | |
41eba0ad BH |
61 | |
62 | static inline int get_hard_smp_processor_id(int cpu) | |
63 | { | |
64 | return smp_hw_index[cpu]; | |
65 | } | |
66 | ||
67 | static inline void set_hard_smp_processor_id(int cpu, int phys) | |
68 | { | |
69 | smp_hw_index[cpu] = phys; | |
70 | } | |
5ad57078 | 71 | #endif |
1da177e4 | 72 | |
cc1ba8ea AB |
73 | DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map); |
74 | DECLARE_PER_CPU(cpumask_var_t, cpu_core_map); | |
75 | ||
76 | static inline struct cpumask *cpu_sibling_mask(int cpu) | |
77 | { | |
78 | return per_cpu(cpu_sibling_map, cpu); | |
79 | } | |
80 | ||
81 | static inline struct cpumask *cpu_core_mask(int cpu) | |
82 | { | |
83 | return per_cpu(cpu_core_map, cpu); | |
84 | } | |
85 | ||
e9efed3b | 86 | extern int cpu_to_core_id(int cpu); |
1da177e4 LT |
87 | |
88 | /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. | |
89 | * | |
90 | * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up | |
91 | * in /proc/interrupts will be wrong!!! --Troy */ | |
92 | #define PPC_MSG_CALL_FUNCTION 0 | |
93 | #define PPC_MSG_RESCHEDULE 1 | |
b7d7a240 | 94 | #define PPC_MSG_CALL_FUNC_SINGLE 2 |
1da177e4 LT |
95 | #define PPC_MSG_DEBUGGER_BREAK 3 |
96 | ||
25ddd738 MM |
97 | /* |
98 | * irq controllers that have dedicated ipis per message and don't | |
99 | * need additional code in the action handler may use this | |
100 | */ | |
101 | extern int smp_request_message_ipi(int virq, int message); | |
102 | extern const char *smp_ipi_name[]; | |
103 | ||
1da177e4 LT |
104 | void smp_init_iSeries(void); |
105 | void smp_init_pSeries(void); | |
19fe0475 | 106 | void smp_init_cell(void); |
c347b798 | 107 | void smp_init_celleb(void); |
5ad57078 | 108 | void smp_setup_cpu_maps(void); |
1da177e4 LT |
109 | |
110 | extern int __cpu_disable(void); | |
111 | extern void __cpu_die(unsigned int cpu); | |
5ad57078 PM |
112 | |
113 | #else | |
114 | /* for UP */ | |
78b5b626 | 115 | #define hard_smp_processor_id() get_hard_smp_processor_id(0) |
5ad57078 | 116 | #define smp_setup_cpu_maps() |
5ad57078 | 117 | |
1da177e4 LT |
118 | #endif /* CONFIG_SMP */ |
119 | ||
5ad57078 | 120 | #ifdef CONFIG_PPC64 |
41eba0ad BH |
121 | static inline int get_hard_smp_processor_id(int cpu) |
122 | { | |
123 | return paca[cpu].hw_cpu_id; | |
124 | } | |
125 | ||
126 | static inline void set_hard_smp_processor_id(int cpu, int phys) | |
127 | { | |
128 | paca[cpu].hw_cpu_id = phys; | |
129 | } | |
2249ca9d PM |
130 | |
131 | extern void smp_release_cpus(void); | |
132 | ||
5ad57078 PM |
133 | #else |
134 | /* 32-bit */ | |
135 | #ifndef CONFIG_SMP | |
4df20460 | 136 | extern int boot_cpuid_phys; |
41eba0ad BH |
137 | static inline int get_hard_smp_processor_id(int cpu) |
138 | { | |
139 | return boot_cpuid_phys; | |
140 | } | |
141 | ||
142 | static inline void set_hard_smp_processor_id(int cpu, int phys) | |
143 | { | |
78b5b626 | 144 | boot_cpuid_phys = phys; |
41eba0ad BH |
145 | } |
146 | #endif /* !CONFIG_SMP */ | |
147 | #endif /* !CONFIG_PPC64 */ | |
1da177e4 LT |
148 | |
149 | extern int smt_enabled_at_boot; | |
150 | ||
151 | extern int smp_mpic_probe(void); | |
152 | extern void smp_mpic_setup_cpu(int cpu); | |
de300974 | 153 | extern int smp_generic_kick_cpu(int nr); |
1da177e4 LT |
154 | |
155 | extern void smp_generic_give_timebase(void); | |
156 | extern void smp_generic_take_timebase(void); | |
157 | ||
158 | extern struct smp_ops_t *smp_ops; | |
159 | ||
b7d7a240 | 160 | extern void arch_send_call_function_single_ipi(int cpu); |
f063ea02 | 161 | extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); |
b7d7a240 | 162 | |
cf54dc7c BH |
163 | /* Definitions relative to the secondary CPU spin loop |
164 | * and entry point. Not all of them exist on both 32 and | |
165 | * 64-bit but defining them all here doesn't harm | |
166 | */ | |
167 | extern void generic_secondary_smp_init(void); | |
2d27cfd3 | 168 | extern void generic_secondary_thread_init(void); |
cf54dc7c BH |
169 | extern unsigned long __secondary_hold_spinloop; |
170 | extern unsigned long __secondary_hold_acknowledge; | |
171 | extern char __secondary_hold; | |
172 | ||
1da177e4 LT |
173 | #endif /* __ASSEMBLY__ */ |
174 | ||
1da177e4 | 175 | #endif /* __KERNEL__ */ |
5ad57078 | 176 | #endif /* _ASM_POWERPC_SMP_H) */ |