[linux-block.git] / arch / powerpc / include / asm / pte-common.h

/* Included from asm/pgtable-*.h only ! */

/*
 * Some bits are only used on some cpu families... Make sure that all
 * the undefined gets a sensible default
 */
#ifndef _PAGE_HASHPTE
#define _PAGE_HASHPTE	0
#endif
#ifndef _PAGE_SHARED
#define _PAGE_SHARED	0
#endif
#ifndef _PAGE_HWWRITE
#define _PAGE_HWWRITE	0
#endif
#ifndef _PAGE_EXEC
#define _PAGE_EXEC	0
#endif
#ifndef _PAGE_ENDIAN
#define _PAGE_ENDIAN	0
#endif
#ifndef _PAGE_COHERENT
#define _PAGE_COHERENT	0
#endif
#ifndef _PAGE_WRITETHRU
#define _PAGE_WRITETHRU	0
#endif
#ifndef _PAGE_4K_PFN
#define _PAGE_4K_PFN		0
#endif
#ifndef _PAGE_SAO
#define _PAGE_SAO	0
#endif
#ifndef _PAGE_PSIZE
#define _PAGE_PSIZE		0
#endif
/* _PAGE_RO and _PAGE_RW shall not be defined at the same time */
#ifndef _PAGE_RO
#define _PAGE_RO 0
#else
#define _PAGE_RW 0
#endif

#ifndef _PAGE_PTE
#define _PAGE_PTE 0
#endif

#ifndef _PMD_PRESENT_MASK
#define _PMD_PRESENT_MASK	_PMD_PRESENT
#endif
#ifndef _PMD_SIZE
#define _PMD_SIZE	0
#define PMD_PAGE_SIZE(pmd)	bad_call_to_PMD_PAGE_SIZE()
#endif
#ifndef _PAGE_KERNEL_RO
#define _PAGE_KERNEL_RO		(_PAGE_RO)
#endif
#ifndef _PAGE_KERNEL_ROX
#define _PAGE_KERNEL_ROX	(_PAGE_EXEC | _PAGE_RO)
#endif
#ifndef _PAGE_KERNEL_RW
#define _PAGE_KERNEL_RW		(_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
#endif
#ifndef _PAGE_KERNEL_RWX
#define _PAGE_KERNEL_RWX	(_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE | _PAGE_EXEC)
#endif
#ifndef _PAGE_HPTEFLAGS
#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
#endif
#ifndef _PTE_NONE_MASK
#define _PTE_NONE_MASK	_PAGE_HPTEFLAGS
#endif

/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
 * kernel without large page PMD support
 */
#ifndef __ASSEMBLY__
extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);

/*
 * Don't just check for any non zero bits in __PAGE_USER, since for book3e
 * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in
 * _PAGE_USER.  Need to explicitly match _PAGE_BAP_UR bit in that case too.
 */
static inline bool pte_user(pte_t pte)
{
	return (pte_val(pte) & _PAGE_USER) == _PAGE_USER;
}
#endif /* __ASSEMBLY__ */

/* Location of the PFN in the PTE. Most 32-bit platforms use the same
 * as _PAGE_SHIFT here (ie, naturally aligned).
 * Platform who don't just pre-define the value so we don't override it here
 */
#ifndef PTE_RPN_SHIFT
#define PTE_RPN_SHIFT	(PAGE_SHIFT)
#endif

/* The mask convered by the RPN must be a ULL on 32-bit platforms with
 * 64-bit PTEs
 */
#if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
#define PTE_RPN_MASK	(~((1ULL<<PTE_RPN_SHIFT)-1))
#else
#define PTE_RPN_MASK	(~((1UL<<PTE_RPN_SHIFT)-1))
#endif

/* _PAGE_CHG_MASK masks of bits that are to be preserved across
 * pgprot changes
 */
#define _PAGE_CHG_MASK	(PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
                         _PAGE_ACCESSED | _PAGE_SPECIAL)

/* Mask of bits returned by pte_pgprot() */
#define PAGE_PROT_BITS	(_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
			 _PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \
			 _PAGE_USER | _PAGE_ACCESSED | _PAGE_RO | \
			 _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC)

/*
 * We define 2 sets of base prot bits, one for basic pages (ie,
 * cacheable kernel and user pages) and one for non cacheable
 * pages. We always set _PAGE_COHERENT when SMP is enabled or
 * the processor might need it for DMA coherency.
 */
#define _PAGE_BASE_NC	(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU) || \
	defined(CONFIG_PPC_E500MC)
#define _PAGE_BASE	(_PAGE_BASE_NC | _PAGE_COHERENT)
#else
#define _PAGE_BASE	(_PAGE_BASE_NC)
#endif

/* Permission masks used to generate the __P and __S table,
 *
 * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
 *
 * Write permissions imply read permissions for now (we could make write-only
 * pages on BookE but we don't bother for now). Execute permission control is
 * possible on platforms that define _PAGE_EXEC
 *
 * Note due to the way vm flags are laid out, the bits are XWR
 */
#define PAGE_NONE	__pgprot(_PAGE_BASE)
#define PAGE_SHARED	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
#define PAGE_SHARED_X	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | \
				 _PAGE_EXEC)
#define PAGE_COPY	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO)
#define PAGE_COPY_X	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO | \
				 _PAGE_EXEC)
#define PAGE_READONLY	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO)
#define PAGE_READONLY_X	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RO | \
				 _PAGE_EXEC)

#define __P000	PAGE_NONE
#define __P001	PAGE_READONLY
#define __P010	PAGE_COPY
#define __P011	PAGE_COPY
#define __P100	PAGE_READONLY_X
#define __P101	PAGE_READONLY_X
#define __P110	PAGE_COPY_X
#define __P111	PAGE_COPY_X

#define __S000	PAGE_NONE
#define __S001	PAGE_READONLY
#define __S010	PAGE_SHARED
#define __S011	PAGE_SHARED
#define __S100	PAGE_READONLY_X
#define __S101	PAGE_READONLY_X
#define __S110	PAGE_SHARED_X
#define __S111	PAGE_SHARED_X

/* Permission masks used for kernel mappings */
#define PAGE_KERNEL	__pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
#define PAGE_KERNEL_NC	__pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
				 _PAGE_NO_CACHE)
#define PAGE_KERNEL_NCG	__pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
				 _PAGE_NO_CACHE | _PAGE_GUARDED)
#define PAGE_KERNEL_X	__pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
#define PAGE_KERNEL_RO	__pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
#define PAGE_KERNEL_ROX	__pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)

/* Protection used for kernel text. We want the debuggers to be able to
 * set breakpoints anywhere, so don't write protect the kernel text
 * on platforms where such control is possible.
 */
#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
	defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
#define PAGE_KERNEL_TEXT	PAGE_KERNEL_X
#else
#define PAGE_KERNEL_TEXT	PAGE_KERNEL_ROX
#endif

/* Make modules code happy. We don't set RO yet */
#define PAGE_KERNEL_EXEC	PAGE_KERNEL_X

/* Advertise special mapping type for AGP */
#define PAGE_AGP		(PAGE_KERNEL_NC)
#define HAVE_PAGE_AGP

/* Advertise support for _PAGE_SPECIAL */
#define __HAVE_ARCH_PTE_SPECIAL

#ifndef _PAGE_READ
/* if not defined, we should not find _PAGE_WRITE too */
#define _PAGE_READ 0
#define _PAGE_WRITE _PAGE_RW
#endif

#ifndef H_PAGE_4K_PFN
#define H_PAGE_4K_PFN 0
#endif
Commit	Line	Data
71087002 BH	1	/* Included from asm/pgtable-.h only ! /
	2
	3	/*
	4	* Some bits are only used on some cpu families... Make sure that all
	5	* the undefined gets a sensible default
	6	*/
	7	#ifndef _PAGE_HASHPTE
	8	#define _PAGE_HASHPTE 0
	9	#endif
	10	#ifndef _PAGE_SHARED
	11	#define _PAGE_SHARED 0
	12	#endif
	13	#ifndef _PAGE_HWWRITE
	14	#define _PAGE_HWWRITE 0
	15	#endif
71087002 BH	16	#ifndef _PAGE_EXEC
	17	#define _PAGE_EXEC 0
	18	#endif
	19	#ifndef _PAGE_ENDIAN
	20	#define _PAGE_ENDIAN 0
	21	#endif
	22	#ifndef _PAGE_COHERENT
	23	#define _PAGE_COHERENT 0
	24	#endif
	25	#ifndef _PAGE_WRITETHRU
	26	#define _PAGE_WRITETHRU 0
	27	#endif
71087002 BH	28	#ifndef _PAGE_4K_PFN
	29	#define _PAGE_4K_PFN 0
	30	#endif
57e2a99f BH	31	#ifndef _PAGE_SAO
	32	#define _PAGE_SAO 0
	33	#endif
71087002 BH	34	#ifndef _PAGE_PSIZE
	35	#define _PAGE_PSIZE 0
	36	#endif
a7b9f671 LC	37	/* _PAGE_RO and _PAGE_RW shall not be defined at the same time */
	38	#ifndef _PAGE_RO
	39	#define _PAGE_RO 0
	40	#else
	41	#define _PAGE_RW 0
	42	#endif
6a119eae AK	43
	44	#ifndef _PAGE_PTE
	45	#define _PAGE_PTE 0
	46	#endif
	47
71087002 BH	48	#ifndef _PMD_PRESENT_MASK
	49	#define _PMD_PRESENT_MASK _PMD_PRESENT
	50	#endif
	51	#ifndef _PMD_SIZE
	52	#define _PMD_SIZE 0
	53	#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
	54	#endif
	55	#ifndef _PAGE_KERNEL_RO
a7b9f671	56	#define _PAGE_KERNEL_RO (_PAGE_RO)
ea3cc330 BH	57	#endif
ea3cc330 BH	58	#ifndef _PAGE_KERNEL_ROX
a7b9f671	59	#define _PAGE_KERNEL_ROX (_PAGE_EXEC \| _PAGE_RO)
71087002 BH	60	#endif
71087002 BH	61	#ifndef _PAGE_KERNEL_RW
ea3cc330 BH	62	#define _PAGE_KERNEL_RW (_PAGE_DIRTY \| _PAGE_RW \| _PAGE_HWWRITE)
	63	#endif
	64	#ifndef _PAGE_KERNEL_RWX
	65	#define _PAGE_KERNEL_RWX (_PAGE_DIRTY \| _PAGE_RW \| _PAGE_HWWRITE \| _PAGE_EXEC)
71087002 BH	66	#endif
	67	#ifndef _PAGE_HPTEFLAGS
	68	#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
	69	#endif
	70	#ifndef _PTE_NONE_MASK
	71	#define _PTE_NONE_MASK _PAGE_HPTEFLAGS
	72	#endif
	73
	74	/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
	75	* kernel without large page PMD support
	76	*/
	77	#ifndef __ASSEMBLY__
	78	extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
7e1e63c5 ME	79
	80	/*
	81	* Don't just check for any non zero bits in __PAGE_USER, since for book3e
	82	* and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in
	83	* _PAGE_USER. Need to explicitly match _PAGE_BAP_UR bit in that case too.
	84	*/
	85	static inline bool pte_user(pte_t pte)
	86	{
	87	return (pte_val(pte) & _PAGE_USER) == _PAGE_USER;
	88	}
71087002 BH	89	#endif /* __ASSEMBLY__ */
	90
	91	/* Location of the PFN in the PTE. Most 32-bit platforms use the same
	92	* as _PAGE_SHIFT here (ie, naturally aligned).
	93	* Platform who don't just pre-define the value so we don't override it here
	94	*/
	95	#ifndef PTE_RPN_SHIFT
	96	#define PTE_RPN_SHIFT (PAGE_SHIFT)
	97	#endif
	98
	99	/* The mask convered by the RPN must be a ULL on 32-bit platforms with
	100	* 64-bit PTEs
	101	*/
	102	#if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
71087002 BH	103	#define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
71087002 BH	104	#else
71087002 BH	105	#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
	106	#endif
	107
25985edc	108	/* _PAGE_CHG_MASK masks of bits that are to be preserved across
71087002 BH	109	* pgprot changes
	110	*/
	111	#define _PAGE_CHG_MASK (PTE_RPN_MASK \| _PAGE_HPTEFLAGS \| _PAGE_DIRTY \| \
	112	_PAGE_ACCESSED \| _PAGE_SPECIAL)
	113
	114	/* Mask of bits returned by pte_pgprot() */
	115	#define PAGE_PROT_BITS (_PAGE_GUARDED \| _PAGE_COHERENT \| _PAGE_NO_CACHE \| \
	116	_PAGE_WRITETHRU \| _PAGE_ENDIAN \| _PAGE_4K_PFN \| \
a7b9f671	117	_PAGE_USER \| _PAGE_ACCESSED \| _PAGE_RO \| \
ea3cc330	118	_PAGE_RW \| _PAGE_HWWRITE \| _PAGE_DIRTY \| _PAGE_EXEC)
71087002 BH	119
	120	/*
	121	* We define 2 sets of base prot bits, one for basic pages (ie,
	122	* cacheable kernel and user pages) and one for non cacheable
	123	* pages. We always set _PAGE_COHERENT when SMP is enabled or
	124	* the processor might need it for DMA coherency.
	125	*/
	126	#define _PAGE_BASE_NC (_PAGE_PRESENT \| _PAGE_ACCESSED \| _PAGE_PSIZE)
c6023202 SW	127	#if defined(CONFIG_SMP) \|\| defined(CONFIG_PPC_STD_MMU) \|\| \
c6023202 SW	128	defined(CONFIG_PPC_E500MC)
71087002 BH	129	#define _PAGE_BASE (_PAGE_BASE_NC \| _PAGE_COHERENT)
	130	#else
	131	#define _PAGE_BASE (_PAGE_BASE_NC)
	132	#endif
	133
	134	/* Permission masks used to generate the __P and __S table,
	135	*
	136	* Note:__pgprot is defined in arch/powerpc/include/asm/page.h
	137	*
	138	* Write permissions imply read permissions for now (we could make write-only
	139	* pages on BookE but we don't bother for now). Execute permission control is
	140	* possible on platforms that define _PAGE_EXEC
	141	*
	142	* Note due to the way vm flags are laid out, the bits are XWR
	143	*/
	144	#define PAGE_NONE __pgprot(_PAGE_BASE)
	145	#define PAGE_SHARED __pgprot(_PAGE_BASE \| _PAGE_USER \| _PAGE_RW)
a7b9f671 LC	146	#define PAGE_SHARED_X __pgprot(_PAGE_BASE \| _PAGE_USER \| _PAGE_RW \| \
	147	_PAGE_EXEC)
	148	#define PAGE_COPY __pgprot(_PAGE_BASE \| _PAGE_USER \| _PAGE_RO)
	149	#define PAGE_COPY_X __pgprot(_PAGE_BASE \| _PAGE_USER \| _PAGE_RO \| \
	150	_PAGE_EXEC)
	151	#define PAGE_READONLY __pgprot(_PAGE_BASE \| _PAGE_USER \| _PAGE_RO)
	152	#define PAGE_READONLY_X __pgprot(_PAGE_BASE \| _PAGE_USER \| _PAGE_RO \| \
	153	_PAGE_EXEC)
71087002 BH	154
	155	#define __P000 PAGE_NONE
	156	#define __P001 PAGE_READONLY
	157	#define __P010 PAGE_COPY
	158	#define __P011 PAGE_COPY
	159	#define __P100 PAGE_READONLY_X
	160	#define __P101 PAGE_READONLY_X
	161	#define __P110 PAGE_COPY_X
	162	#define __P111 PAGE_COPY_X
	163
	164	#define __S000 PAGE_NONE
	165	#define __S001 PAGE_READONLY
	166	#define __S010 PAGE_SHARED
	167	#define __S011 PAGE_SHARED
	168	#define __S100 PAGE_READONLY_X
	169	#define __S101 PAGE_READONLY_X
	170	#define __S110 PAGE_SHARED_X
	171	#define __S111 PAGE_SHARED_X
	172
	173	/* Permission masks used for kernel mappings */
	174	#define PAGE_KERNEL __pgprot(_PAGE_BASE \| _PAGE_KERNEL_RW)
	175	#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC \| _PAGE_KERNEL_RW \| \
	176	_PAGE_NO_CACHE)
	177	#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC \| _PAGE_KERNEL_RW \| \
	178	_PAGE_NO_CACHE \| _PAGE_GUARDED)
ea3cc330	179	#define PAGE_KERNEL_X __pgprot(_PAGE_BASE \| _PAGE_KERNEL_RWX)
71087002	180	#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE \| _PAGE_KERNEL_RO)
ea3cc330	181	#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE \| _PAGE_KERNEL_ROX)
71087002 BH	182
	183	/* Protection used for kernel text. We want the debuggers to be able to
	184	* set breakpoints anywhere, so don't write protect the kernel text
	185	* on platforms where such control is possible.
	186	*/
	187	#if defined(CONFIG_KGDB) \|\| defined(CONFIG_XMON) \|\| defined(CONFIG_BDI_SWITCH) \|\|\
09597cfe	188	defined(CONFIG_KPROBES) \|\| defined(CONFIG_DYNAMIC_FTRACE)
71087002 BH	189	#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
	190	#else
	191	#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
	192	#endif
	193
	194	/* Make modules code happy. We don't set RO yet */
	195	#define PAGE_KERNEL_EXEC PAGE_KERNEL_X
	196
	197	/* Advertise special mapping type for AGP */
	198	#define PAGE_AGP (PAGE_KERNEL_NC)
	199	#define HAVE_PAGE_AGP
	200
	201	/* Advertise support for _PAGE_SPECIAL */
71087002	202	#define __HAVE_ARCH_PTE_SPECIAL
71087002	203
c7d54842 AK	204	#ifndef _PAGE_READ
	205	/* if not defined, we should not find _PAGE_WRITE too */
	206	#define _PAGE_READ 0
	207	#define _PAGE_WRITE _PAGE_RW
	208	#endif
945537df AK	209
	210	#ifndef H_PAGE_4K_PFN
	211	#define H_PAGE_4K_PFN 0
	212	#endif