projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 2874c5fd | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 1da177e4 LT |
2 | /* |
| 3 | * c 2001 PPC 64 Team, IBM Corp | |
| 1da177e4 | 4 | */ |
| d387899f SR |
5 | #ifndef _ASM_POWERPC_PPC_PCI_H |
| 6 | #define _ASM_POWERPC_PPC_PCI_H | |
| 88ced031 | 7 | #ifdef __KERNEL__ |
| 1da177e4 | 8 | |
| bed59275 SR |
9 | #ifdef CONFIG_PCI |
| 10 | ||
| 1da177e4 LT |
11 | #include <linux/pci.h> |
| 12 | #include <asm/pci-bridge.h> | |
| 13 | ||
| 14 | extern unsigned long isa_io_base; | |
| 15 | ||
| 1da177e4 LT |
16 | extern void pci_setup_phb_io(struct pci_controller *hose, int primary); |
| 17 | extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary); | |
| 18 | ||
| 19 | ||
| 20 | extern struct list_head hose_list; | |
| 1da177e4 | 21 | |
| 3d5134ee | 22 | extern struct pci_dev *isa_bridge_pcidev; /* may be NULL if no ISA bus */ |
| 1da177e4 | 23 | |
| ae65a391 | 24 | /** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */ |
| dda804ad NA |
25 | #define BUID_HI(buid) upper_32_bits(buid) |
| 26 | #define BUID_LO(buid) lower_32_bits(buid) | |
| ae65a391 | 27 | |
| 1da177e4 LT |
28 | /* PCI device_node operations */ |
| 29 | struct device_node; | |
| e8e9b34c GS |
30 | struct pci_dn; |
| 31 | ||
| cdddc577 GS |
32 | void *pci_traverse_device_nodes(struct device_node *start, |
| 33 | void *(*fn)(struct device_node *, void *), | |
| 34 | void *data); | |
| e8e9b34c GS |
35 | void *traverse_pci_dn(struct pci_dn *root, |
| 36 | void *(*fn)(struct pci_dn *, void *), | |
| 37 | void *data); | |
| 4c9d2800 | 38 | extern void pci_devs_phb_init_dynamic(struct pci_controller *phb); |
| 1da177e4 | 39 | |
| dad32bbf | 40 | /* From rtas_pci.h */ |
| 4c9d2800 BH |
41 | extern void init_pci_config_tokens (void); |
| 42 | extern unsigned long get_phb_buid (struct device_node *); | |
| 43 | extern int rtas_setup_phb(struct pci_controller *phb); | |
| 1da177e4 | 44 | |
| 6dee3fb9 | 45 | #ifdef CONFIG_EEH |
| 5d5a0936 | 46 | |
| 3ab96a02 GS |
47 | void eeh_addr_cache_insert_dev(struct pci_dev *dev); |
| 48 | void eeh_addr_cache_rmv_dev(struct pci_dev *dev); | |
| 49 | struct eeh_dev *eeh_addr_cache_get_dev(unsigned long addr); | |
| ff477966 GS |
50 | void eeh_slot_error_detail(struct eeh_pe *pe, int severity); |
| 51 | int eeh_pci_enable(struct eeh_pe *pe, int function); | |
| 1ef52073 | 52 | int eeh_pe_reset_full(struct eeh_pe *pe, bool include_passed); |
| d7bb8862 | 53 | void eeh_save_bars(struct eeh_dev *edev); |
| 8b553f32 | 54 | int rtas_write_config(struct pci_dn *, int where, int size, u32 val); |
| 7684b40c | 55 | int rtas_read_config(struct pci_dn *, int where, int size, u32 *val); |
| 5b663529 | 56 | void eeh_pe_state_mark(struct eeh_pe *pe, int state); |
| e762bb89 | 57 | void eeh_pe_mark_isolated(struct eeh_pe *pe); |
| 9ed5ca66 | 58 | void eeh_pe_state_clear(struct eeh_pe *pe, int state, bool include_passed); |
| 39bfd715 | 59 | void eeh_pe_state_mark_with_cfg(struct eeh_pe *pe, int state); |
| d2b0f6f7 | 60 | void eeh_pe_dev_mode_mark(struct eeh_pe *pe, int mode); |
| 9fb40eb8 | 61 | |
| e1d04c97 LV |
62 | void eeh_sysfs_add_device(struct pci_dev *pdev); |
| 63 | void eeh_sysfs_remove_device(struct pci_dev *pdev); | |
| 64 | ||
| 8d3d50bf BL |
65 | static inline const char *eeh_pci_name(struct pci_dev *pdev) |
| 66 | { | |
| 67 | return pdev ? pci_name(pdev) : "<null>"; | |
| 68 | } | |
| 69 | ||
| 778a785f TLSC |
70 | static inline const char *eeh_driver_name(struct pci_dev *pdev) |
| 71 | { | |
| 72 | return (pdev && pdev->driver) ? pdev->driver->name : "<null>"; | |
| 73 | } | |
| 74 | ||
| 17213c3b | 75 | #endif /* CONFIG_EEH */ |
| 6dee3fb9 | 76 | |
| bed59275 | 77 | #else /* CONFIG_PCI */ |
| bed59275 SR |
78 | static inline void init_pci_config_tokens(void) { } |
| 79 | #endif /* !CONFIG_PCI */ | |
| 80 | ||
| 88ced031 | 81 | #endif /* __KERNEL__ */ |
| d387899f | 82 | #endif /* _ASM_POWERPC_PPC_PCI_H */ |