projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 2874c5fd | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 80c49c7e IM |
2 | /* |
| 3 | * Copyright 2014 IBM Corp. | |
| 80c49c7e IM |
4 | */ |
| 5 | ||
| 6 | #ifndef _ASM_PNV_PCI_H | |
| 7 | #define _ASM_PNV_PCI_H | |
| 8 | ||
| 9 | #include <linux/pci.h> | |
| 89379f16 | 10 | #include <linux/pci_hotplug.h> |
| 4ee11c1a | 11 | #include <linux/irq.h> |
| ec249dd8 | 12 | #include <misc/cxl-base.h> |
| ea0d856c | 13 | #include <asm/opal-api.h> |
| 80c49c7e | 14 | |
| 066bcd78 | 15 | #define PCI_SLOT_ID_PREFIX (1UL << 63) |
| ebe22531 GS |
16 | #define PCI_SLOT_ID(phb_id, bdfn) \ |
| 17 | (PCI_SLOT_ID_PREFIX | ((uint64_t)(bdfn) << 16) | (phb_id)) | |
| 18 | ||
| 7e19bf32 | 19 | extern int pnv_pci_get_slot_id(struct device_node *np, uint64_t *id); |
| ea0d856c GS |
20 | extern int pnv_pci_get_device_tree(uint32_t phandle, void *buf, uint64_t len); |
| 21 | extern int pnv_pci_get_presence_state(uint64_t id, uint8_t *state); | |
| 22 | extern int pnv_pci_get_power_state(uint64_t id, uint8_t *state); | |
| 23 | extern int pnv_pci_set_power_state(uint64_t id, uint8_t state, | |
| 24 | struct opal_msg *msg); | |
| 7e19bf32 | 25 | |
| d6a90bb8 PB |
26 | extern int pnv_pci_set_tunnel_bar(struct pci_dev *dev, uint64_t addr, |
| 27 | int enable); | |
| 1212aa1c | 28 | int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode); |
| 80c49c7e IM |
29 | int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq, |
| 30 | unsigned int virq); | |
| 31 | int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num); | |
| 32 | void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num); | |
| 33 | int pnv_cxl_get_irq_count(struct pci_dev *dev); | |
| 6f963ec2 | 34 | struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev); |
| 4ee11c1a SW |
35 | int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq); |
| 36 | bool is_pnv_opal_msi(struct irq_chip *chip); | |
| 80c49c7e IM |
37 | |
| 38 | #ifdef CONFIG_CXL_BASE | |
| 39 | int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs, | |
| 40 | struct pci_dev *dev, int num); | |
| 41 | void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs, | |
| 42 | struct pci_dev *dev); | |
| 43 | #endif | |
| 44 | ||
| 89379f16 AD |
45 | struct pnv_php_slot { |
| 46 | struct hotplug_slot slot; | |
| 89379f16 AD |
47 | uint64_t id; |
| 48 | char *name; | |
| 49 | int slot_no; | |
| 454593e5 GS |
50 | unsigned int flags; |
| 51 | #define PNV_PHP_FLAG_BROKEN_PDC 0x1 | |
| 89379f16 AD |
52 | struct kref kref; |
| 53 | #define PNV_PHP_STATE_INITIALIZED 0 | |
| 54 | #define PNV_PHP_STATE_REGISTERED 1 | |
| 55 | #define PNV_PHP_STATE_POPULATED 2 | |
| 56 | #define PNV_PHP_STATE_OFFLINE 3 | |
| 57 | int state; | |
| 360aebd8 GS |
58 | int irq; |
| 59 | struct workqueue_struct *wq; | |
| 89379f16 AD |
60 | struct device_node *dn; |
| 61 | struct pci_dev *pdev; | |
| 62 | struct pci_bus *bus; | |
| 63 | bool power_state_check; | |
| a7da2161 | 64 | u8 attention_state; |
| 89379f16 AD |
65 | void *fdt; |
| 66 | void *dt; | |
| 67 | struct of_changeset ocs; | |
| 68 | struct pnv_php_slot *parent; | |
| 69 | struct list_head children; | |
| 70 | struct list_head link; | |
| 71 | }; | |
| 72 | extern struct pnv_php_slot *pnv_php_find_slot(struct device_node *dn); | |
| 73 | extern int pnv_php_set_slot_power_state(struct hotplug_slot *slot, | |
| 74 | uint8_t state); | |
| 75 | ||
| 80c49c7e | 76 | #endif |