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80c49c7e IM |
1 | /* |
2 | * Copyright 2014 IBM Corp. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License | |
6 | * as published by the Free Software Foundation; either version | |
7 | * 2 of the License, or (at your option) any later version. | |
8 | */ | |
9 | ||
10 | #ifndef _ASM_PNV_PCI_H | |
11 | #define _ASM_PNV_PCI_H | |
12 | ||
13 | #include <linux/pci.h> | |
89379f16 | 14 | #include <linux/pci_hotplug.h> |
4ee11c1a | 15 | #include <linux/irq.h> |
ec249dd8 | 16 | #include <misc/cxl-base.h> |
ea0d856c | 17 | #include <asm/opal-api.h> |
80c49c7e | 18 | |
066bcd78 | 19 | #define PCI_SLOT_ID_PREFIX (1UL << 63) |
ebe22531 GS |
20 | #define PCI_SLOT_ID(phb_id, bdfn) \ |
21 | (PCI_SLOT_ID_PREFIX | ((uint64_t)(bdfn) << 16) | (phb_id)) | |
22 | ||
7e19bf32 | 23 | extern int pnv_pci_get_slot_id(struct device_node *np, uint64_t *id); |
ea0d856c GS |
24 | extern int pnv_pci_get_device_tree(uint32_t phandle, void *buf, uint64_t len); |
25 | extern int pnv_pci_get_presence_state(uint64_t id, uint8_t *state); | |
26 | extern int pnv_pci_get_power_state(uint64_t id, uint8_t *state); | |
27 | extern int pnv_pci_set_power_state(uint64_t id, uint8_t state, | |
28 | struct opal_msg *msg); | |
25529100 FB |
29 | extern int pnv_pci_set_p2p(struct pci_dev *initiator, struct pci_dev *target, |
30 | u64 desc); | |
7e19bf32 | 31 | |
d6a90bb8 PB |
32 | extern int pnv_pci_enable_tunnel(struct pci_dev *dev, uint64_t *asnind); |
33 | extern int pnv_pci_disable_tunnel(struct pci_dev *dev); | |
34 | extern int pnv_pci_set_tunnel_bar(struct pci_dev *dev, uint64_t addr, | |
35 | int enable); | |
36 | extern int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid, | |
37 | u32 *pid, u32 *tid); | |
1212aa1c | 38 | int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode); |
80c49c7e IM |
39 | int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq, |
40 | unsigned int virq); | |
41 | int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num); | |
42 | void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num); | |
43 | int pnv_cxl_get_irq_count(struct pci_dev *dev); | |
6f963ec2 | 44 | struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev); |
4ee11c1a SW |
45 | int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq); |
46 | bool is_pnv_opal_msi(struct irq_chip *chip); | |
80c49c7e IM |
47 | |
48 | #ifdef CONFIG_CXL_BASE | |
49 | int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs, | |
50 | struct pci_dev *dev, int num); | |
51 | void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs, | |
52 | struct pci_dev *dev); | |
53 | #endif | |
54 | ||
89379f16 AD |
55 | struct pnv_php_slot { |
56 | struct hotplug_slot slot; | |
89379f16 AD |
57 | uint64_t id; |
58 | char *name; | |
59 | int slot_no; | |
454593e5 GS |
60 | unsigned int flags; |
61 | #define PNV_PHP_FLAG_BROKEN_PDC 0x1 | |
89379f16 AD |
62 | struct kref kref; |
63 | #define PNV_PHP_STATE_INITIALIZED 0 | |
64 | #define PNV_PHP_STATE_REGISTERED 1 | |
65 | #define PNV_PHP_STATE_POPULATED 2 | |
66 | #define PNV_PHP_STATE_OFFLINE 3 | |
67 | int state; | |
360aebd8 GS |
68 | int irq; |
69 | struct workqueue_struct *wq; | |
89379f16 AD |
70 | struct device_node *dn; |
71 | struct pci_dev *pdev; | |
72 | struct pci_bus *bus; | |
73 | bool power_state_check; | |
a7da2161 | 74 | u8 attention_state; |
89379f16 AD |
75 | void *fdt; |
76 | void *dt; | |
77 | struct of_changeset ocs; | |
78 | struct pnv_php_slot *parent; | |
79 | struct list_head children; | |
80 | struct list_head link; | |
81 | }; | |
82 | extern struct pnv_php_slot *pnv_php_find_slot(struct device_node *dn); | |
83 | extern int pnv_php_set_slot_power_state(struct hotplug_slot *slot, | |
84 | uint8_t state); | |
85 | ||
80c49c7e | 86 | #endif |