Commit | Line | Data |
---|---|---|
b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
5cd16ee9 ME |
2 | #ifndef _ASM_POWERPC_PAGE_32_H |
3 | #define _ASM_POWERPC_PAGE_32_H | |
4 | ||
5736f96d CL |
5 | #include <asm/cache.h> |
6 | ||
37dd2bad KG |
7 | #if defined(CONFIG_PHYSICAL_ALIGN) && (CONFIG_PHYSICAL_START != 0) |
8 | #if (CONFIG_PHYSICAL_START % CONFIG_PHYSICAL_ALIGN) != 0 | |
9 | #error "CONFIG_PHYSICAL_START must be a multiple of CONFIG_PHYSICAL_ALIGN" | |
10 | #endif | |
11 | #endif | |
12 | ||
5cd16ee9 ME |
13 | #define VM_DATA_DEFAULT_FLAGS VM_DATA_DEFAULT_FLAGS32 |
14 | ||
52142e75 | 15 | #ifdef CONFIG_NOT_COHERENT_CACHE |
a6eb9fe1 | 16 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES |
52142e75 BH |
17 | #endif |
18 | ||
4ee7084e BB |
19 | #ifdef CONFIG_PTE_64BIT |
20 | #define PTE_FLAGS_OFFSET 4 /* offset of PTE flags, in bytes */ | |
21 | #else | |
22 | #define PTE_FLAGS_OFFSET 0 | |
23 | #endif | |
24 | ||
55c8fc3f CL |
25 | #if defined(CONFIG_PPC_256K_PAGES) || \ |
26 | (defined(CONFIG_PPC_8xx) && defined(CONFIG_PPC_16K_PAGES)) | |
e1240122 YT |
27 | #define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2 - 2) /* 1/4 of a page */ |
28 | #else | |
ca9153a3 | 29 | #define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2) /* full page */ |
e1240122 | 30 | #endif |
ca9153a3 | 31 | |
5cd16ee9 ME |
32 | #ifndef __ASSEMBLY__ |
33 | /* | |
34 | * The basic type of a PTE - 64 bits for those CPUs with > 32 bit | |
4ee7084e | 35 | * physical addressing. |
5cd16ee9 ME |
36 | */ |
37 | #ifdef CONFIG_PTE_64BIT | |
38 | typedef unsigned long long pte_basic_t; | |
5cd16ee9 ME |
39 | #else |
40 | typedef unsigned long pte_basic_t; | |
5cd16ee9 ME |
41 | #endif |
42 | ||
5736f96d CL |
43 | /* |
44 | * Clear page using the dcbz instruction, which doesn't cause any | |
45 | * memory traffic (except to write out any cache lines which get | |
46 | * displaced). This only works on cacheable memory. | |
47 | */ | |
48 | static inline void clear_page(void *addr) | |
49 | { | |
50 | unsigned int i; | |
51 | ||
52 | for (i = 0; i < PAGE_SIZE / L1_CACHE_BYTES; i++, addr += L1_CACHE_BYTES) | |
53 | dcbz(addr); | |
54 | } | |
5cd16ee9 ME |
55 | extern void copy_page(void *to, void *from); |
56 | ||
5b17e1cd | 57 | #include <asm-generic/getorder.h> |
5cd16ee9 | 58 | |
ca9153a3 IY |
59 | #define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1) |
60 | #define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1) | |
61 | ||
5cd16ee9 ME |
62 | #endif /* __ASSEMBLY__ */ |
63 | ||
64 | #endif /* _ASM_POWERPC_PAGE_32_H */ |