powerpc/mm: Move hash and no hash code to separate files
[linux-2.6-block.git] / arch / powerpc / include / asm / paca.h
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1da177e4 1/*
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2 * This control block defines the PACA which defines the processor
3 * specific data for each logical processor on the system.
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4 * There are some pointers defined that are utilized by PLIC.
5 *
6 * C 2001 PPC 64 Team, IBM Corp
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
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12 */
13#ifndef _ASM_POWERPC_PACA_H
14#define _ASM_POWERPC_PACA_H
88ced031 15#ifdef __KERNEL__
1da177e4 16
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17#ifdef CONFIG_PPC64
18
2fc251a8 19#include <linux/string.h>
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20#include <asm/types.h>
21#include <asm/lppaca.h>
22#include <asm/mmu.h>
23#include <asm/page.h>
24#include <asm/exception-64e.h>
7e57cba0 25#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
2191d657 26#include <asm/kvm_book3s_asm.h>
7e57cba0 27#endif
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28
29register struct paca_struct *local_paca asm("r13");
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30
31#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
32extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
33/*
34 * Add standard checks that preemption cannot occur when using get_paca():
35 * otherwise the paca_struct it points to may be the wrong one just after.
36 */
37#define get_paca() ((void) debug_smp_processor_id(), local_paca)
38#else
1da177e4 39#define get_paca() local_paca
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40#endif
41
3356bb9f 42#define get_lppaca() (get_paca()->lppaca_ptr)
2f6093c8 43#define get_slb_shadow() (get_paca()->slb_shadow_ptr)
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44
45struct task_struct;
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46
47/*
48 * Defines the layout of the paca.
49 *
50 * This structure is not directly accessed by firmware or the service
30ff2e87 51 * processor.
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52 */
53struct paca_struct {
91c60b5b 54#ifdef CONFIG_PPC_BOOK3S
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55 /*
56 * Because hw_cpu_id, unlike other paca fields, is accessed
57 * routinely from other CPUs (from the IRQ code), we stick to
58 * read-only (after boot) fields in the first cacheline to
59 * avoid cacheline bouncing.
60 */
61
1da177e4 62 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
91c60b5b 63#endif /* CONFIG_PPC_BOOK3S */
1da177e4 64 /*
2ef9481e 65 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
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66 * load lock_token and paca_index with a single lwz
67 * instruction. They must travel together and be properly
68 * aligned.
69 */
54bb7f4b 70#ifdef __BIG_ENDIAN__
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71 u16 lock_token; /* Constant 0x8000, used in locks */
72 u16 paca_index; /* Logical processor number */
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73#else
74 u16 paca_index; /* Logical processor number */
75 u16 lock_token; /* Constant 0x8000, used in locks */
76#endif
1da177e4 77
1da177e4 78 u64 kernel_toc; /* Kernel TOC address */
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79 u64 kernelbase; /* Base address of kernel */
80 u64 kernel_msr; /* MSR while running in kernel */
1da177e4 81 void *emergency_sp; /* pointer to emergency stack */
7a0268fa 82 u64 data_offset; /* per cpu data offset */
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83 s16 hw_cpu_id; /* Physical processor number */
84 u8 cpu_start; /* At startup, processor spins until */
85 /* this becomes non-zero. */
1fc711f7 86 u8 kexec_state; /* set when kexec down has irqs off */
91c60b5b 87#ifdef CONFIG_PPC_STD_MMU_64
e91948fd 88 struct slb_shadow *slb_shadow_ptr;
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89 struct dtl_entry *dispatch_log;
90 struct dtl_entry *dispatch_log_end;
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91#endif /* CONFIG_PPC_STD_MMU_64 */
92 u64 dscr_default; /* per-CPU default DSCR */
1da177e4 93
1739ea9e 94#ifdef CONFIG_PPC_STD_MMU_64
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95 /*
96 * Now, starting in cacheline 2, the exception save areas
97 */
3c726f8d 98 /* used for most interrupts/exceptions */
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99 u64 exgen[13] __attribute__((aligned(0x80)));
100 u64 exmc[13]; /* used for machine checks */
101 u64 exslb[13]; /* used for SLB/segment table misses
3c726f8d 102 * on the linear mapping */
91c60b5b 103 /* SLB related definitions */
bf72aeba 104 u16 vmalloc_sllp;
1da177e4 105 u16 slb_cache_ptr;
735cafc3 106 u32 slb_cache[SLB_CACHE_ENTRIES];
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107#endif /* CONFIG_PPC_STD_MMU_64 */
108
dce6670a 109#ifdef CONFIG_PPC_BOOK3E
016f8cf0 110 u64 exgen[8] __aligned(0x40);
f67f4ef5 111 /* Keep pgd in the same cacheline as the start of extlb */
016f8cf0 112 pgd_t *pgd __aligned(0x40); /* Current PGD */
f67f4ef5 113 pgd_t *kernel_pgd; /* Kernel PGD */
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114
115 /* Shared by all threads of a core -- points to tcd of first thread */
116 struct tlb_core_data *tcd_ptr;
117
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118 /*
119 * We can have up to 3 levels of reentrancy in the TLB miss handler,
120 * in each of four exception levels (normal, crit, mcheck, debug).
121 */
122 u64 extlb[12][EX_TLB_SIZE / sizeof(u64)];
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123 u64 exmc[8]; /* used for machine checks */
124 u64 excrit[8]; /* used for crit interrupts */
125 u64 exdbg[8]; /* used for debug interrupts */
126
127 /* Kernel stack pointers for use by special exceptions */
128 void *mc_kstack;
129 void *crit_kstack;
130 void *dbg_kstack;
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131
132 struct tlb_core_data tcd;
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133#endif /* CONFIG_PPC_BOOK3E */
134
c395465d 135#ifdef CONFIG_PPC_BOOK3S
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136 mm_context_id_t mm_ctx_id;
137#ifdef CONFIG_PPC_MM_SLICES
138 u64 mm_ctx_low_slices_psize;
139 unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
140#else
c33e54fa 141 u16 mm_ctx_user_psize;
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142 u16 mm_ctx_sllp;
143#endif
c395465d 144#endif
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145
146 /*
147 * then miscellaneous read-write fields
148 */
149 struct task_struct *__current; /* Pointer to current */
150 u64 kstack; /* Saved Kernel stack addr */
151 u64 stab_rr; /* stab/slb round-robin counter */
948cf67c 152 u64 saved_r1; /* r1 save for RTAS calls or PM */
1da177e4 153 u64 saved_msr; /* MSR saved here by enter_rtas */
68730401 154 u16 trap_save; /* Used when bad stack is encountered */
d04c56f7 155 u8 soft_enabled; /* irq soft-enable flag */
7230c564 156 u8 irq_happened; /* irq happened while soft-disabled */
f007cacf 157 u8 io_sync; /* writel() needs spin_unlock sync */
e360adbe 158 u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
2fde6d20 159 u8 nap_state_lost; /* NV GPR values lost in power7_idle */
9d378dfa 160 u64 sprg_vdso; /* Saved user-visible sprg */
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161#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
162 u64 tm_scratch; /* TM scratch area for reclaim */
163#endif
c6622f63 164
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165#ifdef CONFIG_PPC_POWERNV
166 /* Per-core mask tracking idle threads and a lock bit-[L][TTTTTTTT] */
167 u32 *core_idle_state_ptr;
168 u8 thread_idle_state; /* PNV_THREAD_RUNNING/NAP/SLEEP */
169 /* Mask to indicate thread id in core */
170 u8 thread_mask;
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171 /* Mask to denote subcore sibling threads */
172 u8 subcore_sibling_mask;
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173#endif
174
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175#ifdef CONFIG_PPC_BOOK3S_64
176 /* Exclusive emergency stack pointer for machine check exception. */
177 void *mc_emergency_sp;
178 /*
179 * Flag to check whether we are in machine check early handler
180 * and already using emergency stack.
181 */
182 u16 in_mce;
0ef95b41 183 u8 hmi_event_available; /* HMI event is available */
729b0f71 184#endif
ed79ba9e 185
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186 /* Stuff for accurate time accounting */
187 u64 user_time; /* accumulated usermode TB ticks */
188 u64 system_time; /* accumulated system TB ticks */
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189 u64 user_time_scaled; /* accumulated usermode SPURR ticks */
190 u64 starttime; /* TB value snapshot */
191 u64 starttime_user; /* TB value on exit to usermode */
4603ac18 192 u64 startspurr; /* SPURR value snapshot */
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193 u64 utime_sspurr; /* ->user_time when ->startspurr set */
194 u64 stolen_time; /* TB ticks taken by hypervisor */
195 u64 dtl_ridx; /* read index in dispatch log */
196 struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */
4b7ae55d 197
c14dea04 198#ifdef CONFIG_KVM_BOOK3S_HANDLER
7aa79938 199#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
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200 /* We use this to store guest state in */
201 struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
de56a948 202#endif
3c42bf8a 203 struct kvmppc_host_state kvm_hstate;
4b7ae55d 204#endif
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205};
206
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207#ifdef CONFIG_PPC_BOOK3S
208static inline void copy_mm_to_paca(mm_context_t *context)
209{
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210 get_paca()->mm_ctx_id = context->id;
211#ifdef CONFIG_PPC_MM_SLICES
212 get_paca()->mm_ctx_low_slices_psize = context->low_slices_psize;
213 memcpy(&get_paca()->mm_ctx_high_slices_psize,
214 &context->high_slices_psize, SLICE_ARRAY_SIZE);
215#else
c33e54fa 216 get_paca()->mm_ctx_user_psize = context->user_psize;
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217 get_paca()->mm_ctx_sllp = context->sllp;
218#endif
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219}
220#else
221static inline void copy_mm_to_paca(mm_context_t *context){}
222#endif
223
1426d5a3 224extern struct paca_struct *paca;
1426d5a3 225extern void initialise_paca(struct paca_struct *new_paca, int cpu);
fc53b420 226extern void setup_paca(struct paca_struct *new_paca);
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227extern void allocate_pacas(void);
228extern void free_unused_pacas(void);
229
230#else /* CONFIG_PPC64 */
231
232static inline void allocate_pacas(void) { };
233static inline void free_unused_pacas(void) { };
234
235#endif /* CONFIG_PPC64 */
1da177e4 236
88ced031 237#endif /* __KERNEL__ */
8882a4da 238#endif /* _ASM_POWERPC_PACA_H */