[linux-2.6-block.git] / arch / powerpc / include / asm / oprofile_impl.h

/*
 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
 *
 * Based on alpha version.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
#define _ASM_POWERPC_OPROFILE_IMPL_H
#ifdef __KERNEL__

#define OP_MAX_COUNTER 8

/* Per-counter configuration as set via oprofilefs.  */
struct op_counter_config {
	unsigned long enabled;
	unsigned long event;
	unsigned long count;
	/* Classic doesn't support per-counter user/kernel selection */
	unsigned long kernel;
	unsigned long user;
	unsigned long unit_mask;
};

/* System-wide configuration as set via oprofilefs.  */
struct op_system_config {
#ifdef CONFIG_PPC64
	unsigned long mmcr0;
	unsigned long mmcr1;
	unsigned long mmcra;
#endif
	unsigned long enable_kernel;
	unsigned long enable_user;
};

/* Per-arch configuration */
struct op_powerpc_model {
	int (*reg_setup) (struct op_counter_config *,
			   struct op_system_config *,
			   int num_counters);
	int  (*cpu_setup) (struct op_counter_config *);
	int  (*start) (struct op_counter_config *);
	int  (*global_start) (struct op_counter_config *);
	void (*stop) (void);
	void (*global_stop) (void);
	int (*sync_start)(void);
	int (*sync_stop)(void);
	void (*handle_interrupt) (struct pt_regs *,
				  struct op_counter_config *);
	int num_counters;
};

extern struct op_powerpc_model op_model_fsl_emb;
extern struct op_powerpc_model op_model_rs64;
extern struct op_powerpc_model op_model_power4;
extern struct op_powerpc_model op_model_7450;
extern struct op_powerpc_model op_model_cell;
extern struct op_powerpc_model op_model_pa6t;


/* All the classic PPC parts use these */
static inline unsigned int classic_ctr_read(unsigned int i)
{
	switch(i) {
	case 0:
		return mfspr(SPRN_PMC1);
	case 1:
		return mfspr(SPRN_PMC2);
	case 2:
		return mfspr(SPRN_PMC3);
	case 3:
		return mfspr(SPRN_PMC4);
	case 4:
		return mfspr(SPRN_PMC5);
	case 5:
		return mfspr(SPRN_PMC6);

/* No PPC32 chip has more than 6 so far */
#ifdef CONFIG_PPC64
	case 6:
		return mfspr(SPRN_PMC7);
	case 7:
		return mfspr(SPRN_PMC8);
#endif
	default:
		return 0;
	}
}

static inline void classic_ctr_write(unsigned int i, unsigned int val)
{
	switch(i) {
	case 0:
		mtspr(SPRN_PMC1, val);
		break;
	case 1:
		mtspr(SPRN_PMC2, val);
		break;
	case 2:
		mtspr(SPRN_PMC3, val);
		break;
	case 3:
		mtspr(SPRN_PMC4, val);
		break;
	case 4:
		mtspr(SPRN_PMC5, val);
		break;
	case 5:
		mtspr(SPRN_PMC6, val);
		break;

/* No PPC32 chip has more than 6, yet */
#ifdef CONFIG_PPC64
	case 6:
		mtspr(SPRN_PMC7, val);
		break;
	case 7:
		mtspr(SPRN_PMC8, val);
		break;
#endif
	default:
		break;
	}
}


extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth);

#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
	3	*
	4	* Based on alpha version.
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*/
	11
654810ec SR	12	#ifndef _ASM_POWERPC_OPROFILE_IMPL_H
654810ec SR	13	#define _ASM_POWERPC_OPROFILE_IMPL_H
88ced031	14	#ifdef __KERNEL__
1da177e4 LT	15
	16	#define OP_MAX_COUNTER 8
	17
	18	/* Per-counter configuration as set via oprofilefs. */
	19	struct op_counter_config {
1da177e4 LT	20	unsigned long enabled;
	21	unsigned long event;
	22	unsigned long count;
555d97ac	23	/* Classic doesn't support per-counter user/kernel selection */
1da177e4	24	unsigned long kernel;
1da177e4 LT	25	unsigned long user;
	26	unsigned long unit_mask;
	27	};
	28
	29	/* System-wide configuration as set via oprofilefs. */
	30	struct op_system_config {
555d97ac	31	#ifdef CONFIG_PPC64
1da177e4 LT	32	unsigned long mmcr0;
	33	unsigned long mmcr1;
	34	unsigned long mmcra;
654810ec	35	#endif
1da177e4 LT	36	unsigned long enable_kernel;
1da177e4 LT	37	unsigned long enable_user;
1da177e4 LT	38	};
	39
	40	/* Per-arch configuration */
a3e48c10	41	struct op_powerpc_model {
1474855d	42	int (reg_setup) (struct op_counter_config ,
1da177e4 LT	43	struct op_system_config *,
1da177e4 LT	44	int num_counters);
1474855d BN	45	int (cpu_setup) (struct op_counter_config );
	46	int (start) (struct op_counter_config );
	47	int (global_start) (struct op_counter_config );
1da177e4	48	void (*stop) (void);
18f2190d	49	void (*global_stop) (void);
1474855d BN	50	int (*sync_start)(void);
1474855d BN	51	int (*sync_stop)(void);
1da177e4 LT	52	void (handle_interrupt) (struct pt_regs ,
	53	struct op_counter_config *);
	54	int num_counters;
	55	};
	56
39aef685	57	extern struct op_powerpc_model op_model_fsl_emb;
a3e48c10 SR	58	extern struct op_powerpc_model op_model_rs64;
a3e48c10 SR	59	extern struct op_powerpc_model op_model_power4;
555d97ac	60	extern struct op_powerpc_model op_model_7450;
18f2190d	61	extern struct op_powerpc_model op_model_cell;
25fc530e OJ	62	extern struct op_powerpc_model op_model_pa6t;
25fc530e OJ	63
72533db0	64
555d97ac	65	/* All the classic PPC parts use these */
c69b767a	66	static inline unsigned int classic_ctr_read(unsigned int i)
1da177e4 LT	67	{
	68	switch(i) {
	69	case 0:
	70	return mfspr(SPRN_PMC1);
	71	case 1:
	72	return mfspr(SPRN_PMC2);
	73	case 2:
	74	return mfspr(SPRN_PMC3);
	75	case 3:
	76	return mfspr(SPRN_PMC4);
	77	case 4:
	78	return mfspr(SPRN_PMC5);
	79	case 5:
	80	return mfspr(SPRN_PMC6);
555d97ac AF	81
	82	/* No PPC32 chip has more than 6 so far */
	83	#ifdef CONFIG_PPC64
1da177e4 LT	84	case 6:
	85	return mfspr(SPRN_PMC7);
	86	case 7:
	87	return mfspr(SPRN_PMC8);
555d97ac	88	#endif
1da177e4 LT	89	default:
	90	return 0;
	91	}
	92	}
	93
c69b767a	94	static inline void classic_ctr_write(unsigned int i, unsigned int val)
1da177e4 LT	95	{
	96	switch(i) {
	97	case 0:
	98	mtspr(SPRN_PMC1, val);
	99	break;
	100	case 1:
	101	mtspr(SPRN_PMC2, val);
	102	break;
	103	case 2:
	104	mtspr(SPRN_PMC3, val);
	105	break;
	106	case 3:
	107	mtspr(SPRN_PMC4, val);
	108	break;
	109	case 4:
	110	mtspr(SPRN_PMC5, val);
	111	break;
	112	case 5:
	113	mtspr(SPRN_PMC6, val);
	114	break;
555d97ac AF	115
	116	/* No PPC32 chip has more than 6, yet */
	117	#ifdef CONFIG_PPC64
1da177e4 LT	118	case 6:
	119	mtspr(SPRN_PMC7, val);
	120	break;
	121	case 7:
	122	mtspr(SPRN_PMC8, val);
	123	break;
555d97ac	124	#endif
1da177e4 LT	125	default:
	126	break;
	127	}
	128	}
dd6c89f6	129
1da177e4	130
6c6bd754 BR	131	extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth);
6c6bd754 BR	132
88ced031	133	#endif /* __KERNEL__ */
654810ec	134	#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */