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Merge tag 'hwparam-20170420' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowell...
[linux-block.git] / arch / powerpc / include / asm / kvm_host.h
CommitLineData
bbf45ba5
HB		 1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 */
19
20#ifndef __POWERPC_KVM_HOST_H__
21#define __POWERPC_KVM_HOST_H__
22
23#include <linux/mutex.h>
544c6761
AG		 24#include <linux/hrtimer.h>
25#include <linux/interrupt.h>
bbf45ba5
HB		 26#include <linux/types.h>
27#include <linux/kvm_types.h>
371fefd6
PM		 28#include <linux/threads.h>
29#include <linux/spinlock.h>
96bc451a 30#include <linux/kvm_para.h>
aa04b4cc
PM		 31#include <linux/list.h>
32#include <linux/atomic.h>
bbf45ba5 33#include <asm/kvm_asm.h>
371fefd6 34#include <asm/processor.h>
342d3db7 35#include <asm/page.h>
249ba1ee 36#include <asm/cacheflush.h>
699a0ea0 37#include <asm/hvcall.h>
bbf45ba5 38
371fefd6
PM		 39#define KVM_MAX_VCPUS NR_CPUS
40#define KVM_MAX_VCORES NR_CPUS
696066f8 41#define KVM_USER_MEM_SLOTS 512
bbf45ba5 42
0b1b1dfd
GK		 43#include <asm/cputhreads.h>
44#define KVM_MAX_VCPU_ID (threads_per_subcore * KVM_MAX_VCORES)
45
34a75b0f
PM		 46#define __KVM_HAVE_ARCH_INTC_INITIALIZED
47
f4944613 48#define KVM_HALT_POLL_NS_DEFAULT 10000 /* 10 us */
588968b6 49
de9ba2f3
AG		 50/* These values are internal and can be increased later */
51#define KVM_NR_IRQCHIPS 1
52#define KVM_IRQCHIP_NUM_PINS 256
53
2860c4b1
PB		 54/* PPC-specific vcpu->requests bit members */
55#define KVM_REQ_WATCHDOG 8
56#define KVM_REQ_EPR_EXIT 9
57
342d3db7
PM		 58#include <linux/mmu_notifier.h>
59
60#define KVM_ARCH_WANT_MMU_NOTIFIER
61
342d3db7 62extern int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
b3ae2096
TY		 63extern int kvm_unmap_hva_range(struct kvm *kvm,
64 unsigned long start, unsigned long end);
57128468 65extern int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
342d3db7
PM		 66extern int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
67extern void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
68
fe71557a
TC		 69static inline void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
70 unsigned long address)
71{
72}
73
fef093be
AG		 74#define HPTEG_CACHE_NUM (1 << 15)
75#define HPTEG_HASH_BITS_PTE 13
2d27fc5e 76#define HPTEG_HASH_BITS_PTE_LONG 12
fef093be
AG		 77#define HPTEG_HASH_BITS_VPTE 13
78#define HPTEG_HASH_BITS_VPTE_LONG 5
a4a0f252 79#define HPTEG_HASH_BITS_VPTE_64K 11
fef093be 80#define HPTEG_HASH_NUM_PTE (1 << HPTEG_HASH_BITS_PTE)
2d27fc5e 81#define HPTEG_HASH_NUM_PTE_LONG (1 << HPTEG_HASH_BITS_PTE_LONG)
fef093be
AG		 82#define HPTEG_HASH_NUM_VPTE (1 << HPTEG_HASH_BITS_VPTE)
83#define HPTEG_HASH_NUM_VPTE_LONG (1 << HPTEG_HASH_BITS_VPTE_LONG)
a4a0f252 84#define HPTEG_HASH_NUM_VPTE_64K (1 << HPTEG_HASH_BITS_VPTE_64K)
ca95150b 85
28e83b4f
AG		 86/* Physical Address Mask - allowed range of real mode RAM access */
87#define KVM_PAM 0x0fffffffffffffffULL
88
a8606e20
PM		 89struct lppaca;
90struct slb_shadow;
2e25aa5f 91struct dtl_entry;
a8606e20 92
3ff95502
PM		 93struct kvmppc_vcpu_book3s;
94struct kvmppc_book3s_shadow_vcpu;
95
bbf45ba5 96struct kvm_vm_stat {
8a7e75d4 97 ulong remote_tlb_flush;
bbf45ba5
HB		 98};
99
100struct kvm_vcpu_stat {
8a7e75d4
SJS		 101 u64 sum_exits;
102 u64 mmio_exits;
103 u64 signal_exits;
104 u64 light_exits;
bbf45ba5 105 /* Account for special types of light exits: */
8a7e75d4
SJS		 106 u64 itlb_real_miss_exits;
107 u64 itlb_virt_miss_exits;
108 u64 dtlb_real_miss_exits;
109 u64 dtlb_virt_miss_exits;
110 u64 syscall_exits;
111 u64 isi_exits;
112 u64 dsi_exits;
113 u64 emulated_inst_exits;
114 u64 dec_exits;
115 u64 ext_intr_exits;
2a27f514
SJS		 116 u64 halt_poll_success_ns;
117 u64 halt_poll_fail_ns;
118 u64 halt_wait_ns;
8a7e75d4
SJS		 119 u64 halt_successful_poll;
120 u64 halt_attempted_poll;
2a27f514 121 u64 halt_successful_wait;
8a7e75d4
SJS		 122 u64 halt_poll_invalid;
123 u64 halt_wakeup;
124 u64 dbell_exits;
125 u64 gdbell_exits;
126 u64 ld;
127 u64 st;
00c3a37c 128#ifdef CONFIG_PPC_BOOK3S
8a7e75d4
SJS		 129 u64 pf_storage;
130 u64 pf_instruc;
131 u64 sp_storage;
132 u64 sp_instruc;
133 u64 queue_intr;
134 u64 ld_slow;
135 u64 st_slow;
ca95150b 136#endif
65e7026a
SW		 137 u64 pthru_all;
138 u64 pthru_host;
139 u64 pthru_bad_aff;
bbf45ba5
HB		 140};
141
73e75b41
HB		 142enum kvm_exit_types {
143 MMIO_EXITS,
73e75b41
HB		 144 SIGNAL_EXITS,
145 ITLB_REAL_MISS_EXITS,
146 ITLB_VIRT_MISS_EXITS,
147 DTLB_REAL_MISS_EXITS,
148 DTLB_VIRT_MISS_EXITS,
149 SYSCALL_EXITS,
150 ISI_EXITS,
151 DSI_EXITS,
152 EMULATED_INST_EXITS,
153 EMULATED_MTMSRWE_EXITS,
154 EMULATED_WRTEE_EXITS,
155 EMULATED_MTSPR_EXITS,
156 EMULATED_MFSPR_EXITS,
157 EMULATED_MTMSR_EXITS,
158 EMULATED_MFMSR_EXITS,
159 EMULATED_TLBSX_EXITS,
160 EMULATED_TLBWE_EXITS,
161 EMULATED_RFI_EXITS,
d30f6e48 162 EMULATED_RFCI_EXITS,
c8ca97ca 163 EMULATED_RFDI_EXITS,
73e75b41
HB		 164 DEC_EXITS,
165 EXT_INTR_EXITS,
166 HALT_WAKEUP,
167 USR_PR_INST,
168 FP_UNAVAIL,
169 DEBUG_EXITS,
170 TIMEINGUEST,
d30f6e48
SW		 171 DBELL_EXITS,
172 GDBELL_EXITS,
73e75b41
HB		 173 __NUMBER_OF_KVM_EXIT_TYPES
174};
175
73e75b41 176/* allow access to big endian 32bit upper/lower parts and 64bit var */
7b701591 177struct kvmppc_exit_timing {
73e75b41
HB		 178 union {
179 u64 tv64;
180 struct {
181 u32 tbu, tbl;
182 } tv32;
183 };
184};
73e75b41 185
de56a948
PM		 186struct kvmppc_pginfo {
187 unsigned long pfn;
188 atomic_t refcnt;
189};
190
121f80ba
AK		 191struct kvmppc_spapr_tce_iommu_table {
192 struct rcu_head rcu;
193 struct list_head next;
194 struct iommu_table *tbl;
195 struct kref kref;
196};
197
54738c09
DG		 198struct kvmppc_spapr_tce_table {
199 struct list_head list;
200 struct kvm *kvm;
201 u64 liobn;
366baf28 202 struct rcu_head rcu;
fe26e527 203 u32 page_shift;
14f853f1 204 u64 offset; /* in pages */
fe26e527 205 u64 size; /* window size in pages */
121f80ba 206 struct list_head iommu_tables;
54738c09
DG		 207 struct page *pages[0];
208};
209
bc5ad3f3
BH		 210/* XICS components, defined in book3s_xics.c */
211struct kvmppc_xics;
212struct kvmppc_icp;
5af50993
BH		 213extern struct kvm_device_ops kvm_xics_ops;
214
215/* XIVE components, defined in book3s_xive.c */
216struct kvmppc_xive;
217struct kvmppc_xive_vcpu;
218extern struct kvm_device_ops kvm_xive_ops;
bc5ad3f3 219
8daaafc8
SW		 220struct kvmppc_passthru_irqmap;
221
8936dda4
PM		 222/*
223 * The reverse mapping array has one entry for each HPTE,
224 * which stores the guest's view of the second word of the HPTE
06ce2c63
PM		 225 * (including the guest physical address of the mapping),
226 * plus forward and backward pointers in a doubly-linked ring
227 * of HPTEs that map the same host page. The pointers in this
228 * ring are 32-bit HPTE indexes, to save space.
8936dda4
PM		 229 */
230struct revmap_entry {
231 unsigned long guest_rpte;
06ce2c63 232 unsigned int forw, back;
8936dda4
PM		 233};
234
06ce2c63 235/*
a66b48c3 236 * We use the top bit of each memslot->arch.rmap entry as a lock bit,
06ce2c63
PM		 237 * and bit 32 as a present flag. The bottom 32 bits are the
238 * index in the guest HPT of a HPTE that points to the page.
239 */
240#define KVMPPC_RMAP_LOCK_BIT 63
bad3b507 241#define KVMPPC_RMAP_RC_SHIFT 32
08fe1e7b 242#define KVMPPC_RMAP_CHG_SHIFT 48
bad3b507
PM		 243#define KVMPPC_RMAP_REFERENCED (HPTE_R_R << KVMPPC_RMAP_RC_SHIFT)
244#define KVMPPC_RMAP_CHANGED (HPTE_R_C << KVMPPC_RMAP_RC_SHIFT)
08fe1e7b 245#define KVMPPC_RMAP_CHG_ORDER (0x3ful << KVMPPC_RMAP_CHG_SHIFT)
06ce2c63
PM		 246#define KVMPPC_RMAP_PRESENT 0x100000000ul
247#define KVMPPC_RMAP_INDEX 0xfffffffful
248
db3fe4eb 249struct kvm_arch_memory_slot {
9975f5e3 250#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
d89cc617 251 unsigned long *rmap;
9975f5e3 252#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
db3fe4eb
TY		 253};
254
3f9d4f5a
DG		 255struct kvm_hpt_info {
256 /* Host virtual (linear mapping) address of guest HPT */
257 unsigned long virt;
258 /* Array of reverse mapping entries for each guest HPTE */
259 struct revmap_entry *rev;
3f9d4f5a
DG		 260 /* Guest HPT size is 2**(order) bytes */
261 u32 order;
262 /* 1 if HPT allocated with CMA, 0 otherwise */
263 int cma;
264};
265
5e985969
DG		 266struct kvm_resize_hpt;
267
bbf45ba5 268struct kvm_arch {
d30f6e48 269 unsigned int lpid;
9975f5e3 270#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
7c5b06ca 271 unsigned int tlb_sets;
3f9d4f5a 272 struct kvm_hpt_info hpt;
a56ee9f8 273 atomic64_t mmio_update;
de56a948
PM		 274 unsigned int host_lpid;
275 unsigned long host_lpcr;
276 unsigned long sdr1;
277 unsigned long host_sdr1;
278 int tlbie_lock;
aa04b4cc 279 unsigned long lpcr;
697d3899 280 unsigned long vrma_slb_v;
31037eca 281 int hpte_setup_done;
32fad281 282 atomic_t vcpus_running;
1b400ba0 283 u32 online_vcores;
44e5f6be 284 atomic_t hpte_mod_interest;
1b400ba0 285 cpumask_t need_tlb_flush;
a29ebeaf 286 cpumask_t cpu_in_guest;
9e04ba69
PM		 287 u8 radix;
288 pgd_t *pgtable;
468808bd 289 u64 process_table;
e23a808b
PM		 290 struct dentry *debugfs_dir;
291 struct dentry *htab_dentry;
5e985969 292 struct kvm_resize_hpt *resize_hpt; /* protected by kvm->lock */
9975f5e3 293#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
7aa79938 294#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
9308ab8e
PM		 295 struct mutex hpt_mutex;
296#endif
f31e65e1
BH		 297#ifdef CONFIG_PPC_BOOK3S_64
298 struct list_head spapr_tce_tables;
8e591cb7 299 struct list_head rtas_tokens;
699a0ea0 300 DECLARE_BITMAP(enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
f31e65e1 301#endif
de9ba2f3
AG		 302#ifdef CONFIG_KVM_MPIC
303 struct openpic *mpic;
304#endif
bc5ad3f3
BH		 305#ifdef CONFIG_KVM_XICS
306 struct kvmppc_xics *xics;
5af50993 307 struct kvmppc_xive *xive;
8daaafc8 308 struct kvmppc_passthru_irqmap *pimap;
bc5ad3f3 309#endif
cbbc58d4 310 struct kvmppc_ops *kvm_ops;
1287cb3f
AG		 311#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
312 /* This array can grow quite large, keep it at the end */
313 struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
314#endif
bbf45ba5
HB		 315};
316
7d6c40da
PM		 317#define VCORE_ENTRY_MAP(vc) ((vc)->entry_exit_map & 0xff)
318#define VCORE_EXIT_MAP(vc) ((vc)->entry_exit_map >> 8)
319#define VCORE_IS_EXITING(vc) (VCORE_EXIT_MAP(vc) != 0)
371fefd6 320
b4deba5c
PM		 321/* This bit is used when a vcore exit is triggered from outside the vcore */
322#define VCORE_EXIT_REQ 0x10000
323
ec257165
PM		 324/*
325 * Values for vcore_state.
326 * Note that these are arranged such that lower values
327 * (< VCORE_SLEEPING) don't require stolen time accounting
328 * on load/unload, and higher values do.
329 */
19ccb76a 330#define VCORE_INACTIVE 0
ec257165
PM		 331#define VCORE_PREEMPT 1
332#define VCORE_PIGGYBACK 2
333#define VCORE_SLEEPING 3
334#define VCORE_RUNNING 4
335#define VCORE_EXITING 5
0cda69dd 336#define VCORE_POLLING 6
19ccb76a 337
2e25aa5f
PM		 338/*
339 * Struct used to manage memory for a virtual processor area
340 * registered by a PAPR guest. There are three types of area
341 * that a guest can register.
342 */
343struct kvmppc_vpa {
c35635ef 344 unsigned long gpa; /* Current guest phys addr */
2e25aa5f
PM		 345 void *pinned_addr; /* Address in kernel linear mapping */
346 void *pinned_end; /* End of region */
347 unsigned long next_gpa; /* Guest phys addr for update */
348 unsigned long len; /* Number of bytes required */
349 u8 update_pending; /* 1 => update pinned_addr from next_gpa */
c35635ef 350 bool dirty; /* true => area has been modified by kernel */
2e25aa5f
PM		 351};
352
ca95150b 353struct kvmppc_pte {
af7b4d10 354 ulong eaddr;
ca95150b 355 u64 vpage;
af7b4d10 356 ulong raddr;
3ed9c6d2
AG		 357 bool may_read : 1;
358 bool may_write : 1;
359 bool may_execute : 1;
96df2267 360 unsigned long wimg;
a4a0f252 361 u8 page_size; /* MMU_PAGE_xxx */
ca95150b
AG		 362};
363
364struct kvmppc_mmu {
365 /* book3s_64 only */
366 void (*slbmte)(struct kvm_vcpu *vcpu, u64 rb, u64 rs);
367 u64 (*slbmfee)(struct kvm_vcpu *vcpu, u64 slb_nr);
368 u64 (*slbmfev)(struct kvm_vcpu *vcpu, u64 slb_nr);
369 void (*slbie)(struct kvm_vcpu *vcpu, u64 slb_nr);
370 void (*slbia)(struct kvm_vcpu *vcpu);
371 /* book3s */
372 void (*mtsrin)(struct kvm_vcpu *vcpu, u32 srnum, ulong value);
373 u32 (*mfsrin)(struct kvm_vcpu *vcpu, u32 srnum);
93b159b4
PM		 374 int (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr,
375 struct kvmppc_pte *pte, bool data, bool iswrite);
ca95150b
AG		 376 void (*reset_msr)(struct kvm_vcpu *vcpu);
377 void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large);
af7b4d10 378 int (*esid_to_vsid)(struct kvm_vcpu *vcpu, ulong esid, u64 *vsid);
ca95150b
AG		 379 u64 (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data);
380 bool (*is_dcbz32)(struct kvm_vcpu *vcpu);
381};
382
c4befc58
PM		 383struct kvmppc_slb {
384 u64 esid;
385 u64 vsid;
386 u64 orige;
387 u64 origv;
388 bool valid : 1;
389 bool Ks : 1;
390 bool Kp : 1;
391 bool nx : 1;
392 bool large : 1; /* PTEs are 16MB */
393 bool tb : 1; /* 1TB segment */
394 bool class : 1;
a4a0f252 395 u8 base_page_size; /* MMU_PAGE_xxx */
ca95150b
AG		 396};
397
b6c295df
PM		 398/* Struct used to accumulate timing information in HV real mode code */
399struct kvmhv_tb_accumulator {
400 u64 seqcount; /* used to synchronize access, also count * 2 */
401 u64 tb_total; /* total time in timebase ticks */
402 u64 tb_min; /* min time */
403 u64 tb_max; /* max time */
404};
405
8daaafc8
SW		 406#ifdef CONFIG_PPC_BOOK3S_64
407struct kvmppc_irq_map {
408 u32 r_hwirq;
409 u32 v_hwirq;
410 struct irq_desc *desc;
411};
412
413#define KVMPPC_PIRQ_MAPPED 1024
414struct kvmppc_passthru_irqmap {
415 int n_mapped;
416 struct kvmppc_irq_map mapped[KVMPPC_PIRQ_MAPPED];
417};
418#endif
419
6df8d3fc
BB		 420# ifdef CONFIG_PPC_FSL_BOOK3E
421#define KVMPPC_BOOKE_IAC_NUM 2
422#define KVMPPC_BOOKE_DAC_NUM 2
423# else
424#define KVMPPC_BOOKE_IAC_NUM 4
425#define KVMPPC_BOOKE_DAC_NUM 2
426# endif
427#define KVMPPC_BOOKE_MAX_IAC 4
428#define KVMPPC_BOOKE_MAX_DAC 2
429
5df554ad
SW		 430/* KVMPPC_EPR_USER takes precedence over KVMPPC_EPR_KERNEL */
431#define KVMPPC_EPR_NONE 0 /* EPR not supported */
432#define KVMPPC_EPR_USER 1 /* exit to userspace to fill EPR */
433#define KVMPPC_EPR_KERNEL 2 /* in-kernel irqchip */
434
eb1e4f43
SW		 435#define KVMPPC_IRQ_DEFAULT 0
436#define KVMPPC_IRQ_MPIC 1
5af50993 437#define KVMPPC_IRQ_XICS 2 /* Includes a XIVE option */
eb1e4f43 438
a56ee9f8
YX		 439#define MMIO_HPTE_CACHE_SIZE 4
440
441struct mmio_hpte_cache_entry {
442 unsigned long hpte_v;
443 unsigned long hpte_r;
444 unsigned long rpte;
445 unsigned long pte_index;
446 unsigned long eaddr;
447 unsigned long slb_v;
448 long mmio_update;
449 unsigned int slb_base_pshift;
450};
451
452struct mmio_hpte_cache {
453 struct mmio_hpte_cache_entry entry[MMIO_HPTE_CACHE_SIZE];
454 unsigned int index;
455};
456
6f63e81b
BL		 457#define KVMPPC_VSX_COPY_NONE 0
458#define KVMPPC_VSX_COPY_WORD 1
459#define KVMPPC_VSX_COPY_DWORD 2
460#define KVMPPC_VSX_COPY_DWORD_LOAD_DUMP 3
461
eb1e4f43
SW		 462struct openpic;
463
5af50993
BH		 464/* W0 and W1 of a XIVE thread management context */
465union xive_tma_w01 {
466 struct {
467 u8 nsr;
468 u8 cppr;
469 u8 ipb;
470 u8 lsmfb;
471 u8 ack;
472 u8 inc;
473 u8 age;
474 u8 pipr;
475 };
476 __be64 w01;
477};
478
bbf45ba5 479struct kvm_vcpu_arch {
ca95150b 480 ulong host_stack;
bbf45ba5 481 u32 host_pid;
00c3a37c 482#ifdef CONFIG_PPC_BOOK3S
c4befc58 483 struct kvmppc_slb slb[64];
de56a948 484 int slb_max; /* 1 + index of last valid entry in slb[] */
c4befc58 485 int slb_nr; /* total number of entries in SLB */
ca95150b 486 struct kvmppc_mmu mmu;
3ff95502
PM		 487 struct kvmppc_vcpu_book3s *book3s;
488#endif
489#ifdef CONFIG_PPC_BOOK3S_32
490 struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
ca95150b 491#endif
bbf45ba5 492
5cf8ca22 493 ulong gpr[32];
bbf45ba5 494
efff1912 495 struct thread_fp_state fp;
180a34d2 496
4cd35f67
SW		 497#ifdef CONFIG_SPE
498 ulong evr[32];
499 ulong spefscr;
500 ulong host_spefscr;
501 u64 acc;
502#endif
180a34d2 503#ifdef CONFIG_ALTIVEC
efff1912 504 struct thread_vr_state vr;
180a34d2
AG		 505#endif
506
d30f6e48
SW		 507#ifdef CONFIG_KVM_BOOKE_HV
508 u32 host_mas4;
509 u32 host_mas6;
510 u32 shadow_epcr;
d30f6e48
SW		 511 u32 shadow_msrp;
512 u32 eplc;
513 u32 epsc;
514 u32 oldpir;
515#endif
516
62b4db00
AG		 517#if defined(CONFIG_BOOKE)
518#if defined(CONFIG_KVM_BOOKE_HV) || defined(CONFIG_64BIT)
519 u32 epcr;
520#endif
521#endif
522
5aa9e2f4
AG		 523#ifdef CONFIG_PPC_BOOK3S
524 /* For Gekko paired singles */
525 u32 qpr[32];
526#endif
527
5cf8ca22 528 ulong pc;
5cf8ca22
HB		 529 ulong ctr;
530 ulong lr;
e14e7a1e 531#ifdef CONFIG_PPC_BOOK3S
b005255e 532 ulong tar;
e14e7a1e 533#endif
7e57cba0 534
5cf8ca22 535 ulong xer;
7e57cba0 536 u32 cr;
bbf45ba5 537
00c3a37c 538#ifdef CONFIG_PPC_BOOK3S
ca95150b 539 ulong hflags;
180a34d2 540 ulong guest_owned_ext;
de56a948
PM		 541 ulong purr;
542 ulong spurr;
b005255e 543 ulong ic;
de56a948
PM		 544 ulong dscr;
545 ulong amr;
546 ulong uamor;
b005255e 547 ulong iamr;
de56a948 548 u32 ctrl;
8563bf52 549 u32 dabrx;
de56a948 550 ulong dabr;
b005255e
MN		 551 ulong dawr;
552 ulong dawrx;
553 ulong ciabr;
0acb9111 554 ulong cfar;
4b8473c9 555 ulong ppr;
f35f3a48 556 u32 pspb;
b005255e 557 ulong fscr;
616dff86 558 ulong shadow_fscr;
b005255e
MN		 559 ulong ebbhr;
560 ulong ebbrr;
561 ulong bescr;
562 ulong csigr;
563 ulong tacr;
564 ulong tcscr;
565 ulong acop;
566 ulong wort;
e9cf1e08
PM		 567 ulong tid;
568 ulong psscr;
a2d56020 569 ulong shadow_srr1;
ca95150b 570#endif
eab17672 571 u32 vrsave; /* also USPRG0 */
bbf45ba5 572 u32 mmucr;
5fd8505e 573 /* shadow_msr is unused for BookE HV */
ecee273f 574 ulong shadow_msr;
5cf8ca22
HB		 575 ulong csrr0;
576 ulong csrr1;
577 ulong dsrr0;
578 ulong dsrr1;
5ce941ee
SW		 579 ulong mcsrr0;
580 ulong mcsrr1;
581 ulong mcsr;
bbf45ba5 582 u32 dec;
21bd000a 583#ifdef CONFIG_BOOKE
bbf45ba5 584 u32 decar;
21bd000a 585#endif
3cd60e31
AK		 586 /* Time base value when we entered the guest */
587 u64 entry_tb;
8f42ab27 588 u64 entry_vtb;
06da28e7 589 u64 entry_ic;
bbf45ba5 590 u32 tcr;
dfd4d47e 591 ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
bb3a8a17 592 u32 ivor[64];
5cf8ca22 593 ulong ivpr;
ca95150b 594 u32 pvr;
49dd2c49
HB		 595
596 u32 shadow_pid;
dd9ebf1f 597 u32 shadow_pid1;
bbf45ba5 598 u32 pid;
49dd2c49
HB		 599 u32 swap_pid;
600
bbf45ba5
HB		 601 u32 ccr0;
602 u32 ccr1;
f7b200af 603 u32 dbsr;
bbf45ba5 604
b005255e 605 u64 mmcr[5];
9e368f29 606 u32 pmc[8];
b005255e 607 u32 spmc[2];
14941789
PM		 608 u64 siar;
609 u64 sdar;
b005255e 610 u64 sier;
7b490411
MN		 611#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
612 u64 tfhar;
613 u64 texasr;
614 u64 tfiar;
615
616 u32 cr_tm;
0d808df0 617 u64 xer_tm;
7b490411
MN		 618 u64 lr_tm;
619 u64 ctr_tm;
620 u64 amr_tm;
621 u64 ppr_tm;
622 u64 dscr_tm;
623 u64 tar_tm;
624
625 ulong gpr_tm[32];
626
627 struct thread_fp_state fp_tm;
628
629 struct thread_vr_state vr_tm;
630 u32 vrsave_tm; /* also USPRG0 */
631
632#endif
de56a948 633
73e75b41 634#ifdef CONFIG_KVM_EXIT_TIMING
09000adb 635 struct mutex exit_timing_lock;
7b701591
HB		 636 struct kvmppc_exit_timing timing_exit;
637 struct kvmppc_exit_timing timing_last_enter;
73e75b41
HB		 638 u32 last_exit_type;
639 u32 timing_count_type[__NUMBER_OF_KVM_EXIT_TYPES];
640 u64 timing_sum_duration[__NUMBER_OF_KVM_EXIT_TYPES];
641 u64 timing_sum_quad_duration[__NUMBER_OF_KVM_EXIT_TYPES];
642 u64 timing_min_duration[__NUMBER_OF_KVM_EXIT_TYPES];
643 u64 timing_max_duration[__NUMBER_OF_KVM_EXIT_TYPES];
644 u64 timing_last_exit;
645 struct dentry *debugfs_exit_timing;
646#endif
647
de56a948
PM		 648#ifdef CONFIG_PPC_BOOK3S
649 ulong fault_dar;
650 u32 fault_dsisr;
e5ee5422 651 unsigned long intr_msr;
f4c51f84 652 ulong fault_gpa; /* guest real address of page fault (POWER9) */
de56a948
PM		 653#endif
654
0604675f 655#ifdef CONFIG_BOOKE
5cf8ca22
HB		 656 ulong fault_dear;
657 ulong fault_esr;
daf5e271
LY		 658 ulong queued_dear;
659 ulong queued_esr;
f61c94bb
BB		 660 spinlock_t wdt_lock;
661 struct timer_list wdt_timer;
8fdd21a2 662 u32 tlbcfg[4];
307d9008 663 u32 tlbps[4];
8fdd21a2 664 u32 mmucfg;
9a6061d7 665 u32 eptcfg;
d30f6e48 666 u32 epr;
99e99d19 667 u64 sprg9;
debf27d6 668 u32 pwrmgtcr0;
15b708be 669 u32 crit_save;
ce11e48b 670 /* guest debug registers*/
547465ef 671 struct debug_reg dbg_reg;
0604675f 672#endif
bbf45ba5 673 gpa_t paddr_accessed;
6020c0f6 674 gva_t vaddr_accessed;
08c9a188 675 pgd_t *pgdir;
bbf45ba5
HB		 676
677 u8 io_gpr; /* GPR used as IO source/target */
d078eed3 678 u8 mmio_host_swabbed;
3587d534 679 u8 mmio_sign_extend;
6f63e81b
BL		 680 /* conversion between single and double precision */
681 u8 mmio_sp64_extend;
682 /*
683 * Number of simulations for vsx.
684 * If we use 2*8bytes to simulate 1*16bytes,
685 * then the number should be 2 and
686 * mmio_vsx_copy_type=KVMPPC_VSX_COPY_DWORD.
687 * If we use 4*4bytes to simulate 1*16bytes,
688 * the number should be 4 and
689 * mmio_vsx_copy_type=KVMPPC_VSX_COPY_WORD.
690 */
691 u8 mmio_vsx_copy_nums;
692 u8 mmio_vsx_offset;
693 u8 mmio_vsx_copy_type;
694 u8 mmio_vsx_tx_sx_enabled;
ad0a048b
AG		 695 u8 osi_needed;
696 u8 osi_enabled;
9432ba60 697 u8 papr_enabled;
f61c94bb 698 u8 watchdog_enabled;
af8f38b3
AG		 699 u8 sane;
700 u8 cpu_type;
de56a948 701 u8 hcall_needed;
5df554ad 702 u8 epr_flags; /* KVMPPC_EPR_xxx */
1c810636 703 u8 epr_needed;
bbf45ba5
HB		 704
705 u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */
706
544c6761 707 struct hrtimer dec_timer;
ca95150b 708 u64 dec_jiffies;
de56a948 709 u64 dec_expires;
bbf45ba5 710 unsigned long pending_exceptions;
a8606e20
PM		 711 u8 ceded;
712 u8 prodded;
de56a948 713 u32 last_inst;
a8606e20 714
8577370f 715 struct swait_queue_head *wqp;
371fefd6
PM		 716 struct kvmppc_vcore *vcore;
717 int ret;
de56a948 718 int trap;
371fefd6
PM		 719 int state;
720 int ptid;
ec257165 721 int thread_cpu;
a29ebeaf 722 int prev_cpu;
19ccb76a 723 bool timer_running;
371fefd6
PM		 724 wait_queue_head_t cpu_run;
725
96bc451a 726 struct kvm_vcpu_arch_shared *shared;
5deb8e7a
AG		 727#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
728 bool shared_big_endian;
729#endif
beb03f14
AG		 730 unsigned long magic_page_pa; /* phys addr to map the magic page to */
731 unsigned long magic_page_ea; /* effect. addr to map the magic page to */
f3383cf8 732 bool disable_kernel_nx;
de56a948 733
eb1e4f43
SW		 734 int irq_type; /* one of KVM_IRQ_* */
735 int irq_cpu_id;
736 struct openpic *mpic; /* KVM_IRQ_MPIC */
bc5ad3f3
BH		 737#ifdef CONFIG_KVM_XICS
738 struct kvmppc_icp *icp; /* XICS presentation controller */
5af50993
BH		 739 struct kvmppc_xive_vcpu *xive_vcpu; /* XIVE virtual CPU data */
740 __be32 xive_cam_word; /* Cooked W2 in proper endian with valid bit */
741 u32 xive_pushed; /* Is the VP pushed on the physical CPU ? */
742 union xive_tma_w01 xive_saved_state; /* W0..1 of XIVE thread state */
bc5ad3f3 743#endif
eb1e4f43 744
9975f5e3 745#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
de56a948 746 struct kvm_vcpu_arch_shared shregs;
371fefd6 747
a56ee9f8 748 struct mmio_hpte_cache mmio_cache;
697d3899
PM		 749 unsigned long pgfault_addr;
750 long pgfault_index;
751 unsigned long pgfault_hpte[2];
a56ee9f8 752 struct mmio_hpte_cache_entry *pgfault_cache;
697d3899 753
371fefd6
PM		 754 struct task_struct *run_task;
755 struct kvm_run *kvm_run;
2e25aa5f
PM		 756
757 spinlock_t vpa_update_lock;
758 struct kvmppc_vpa vpa;
759 struct kvmppc_vpa dtl;
760 struct dtl_entry *dtl_ptr;
761 unsigned long dtl_index;
0456ec4f 762 u64 stolen_logged;
2e25aa5f 763 struct kvmppc_vpa slb_shadow;
c7b67670
PM		 764
765 spinlock_t tbacct_lock;
766 u64 busy_stolen;
767 u64 busy_preempt;
4a157d61
PM		 768
769 u32 emul_inst;
de56a948 770#endif
b6c295df
PM		 771
772#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
773 struct kvmhv_tb_accumulator *cur_activity; /* What we're timing */
774 u64 cur_tb_start; /* when it started */
775 struct kvmhv_tb_accumulator rm_entry; /* real-mode entry code */
776 struct kvmhv_tb_accumulator rm_intr; /* real-mode intr handling */
777 struct kvmhv_tb_accumulator rm_exit; /* real-mode exit code */
778 struct kvmhv_tb_accumulator guest_time; /* guest execution */
779 struct kvmhv_tb_accumulator cede_time; /* time napping inside guest */
780
781 struct dentry *debugfs_dir;
782 struct dentry *debugfs_timings;
783#endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
bbf45ba5
HB		 784};
785
efff1912 786#define VCPU_FPR(vcpu, i) (vcpu)->arch.fp.fpr[i][TS_FPROFFSET]
6f63e81b
BL		 787#define VCPU_VSX_FPR(vcpu, i, j) ((vcpu)->arch.fp.fpr[i][j])
788#define VCPU_VSX_VR(vcpu, i) ((vcpu)->arch.vr.vr[i])
efff1912 789
19ccb76a 790/* Values for vcpu->arch.state */
8455d79e
PM		 791#define KVMPPC_VCPU_NOTREADY 0
792#define KVMPPC_VCPU_RUNNABLE 1
c7b67670 793#define KVMPPC_VCPU_BUSY_IN_HOST 2
371fefd6 794
b3c5d3c2
AG		 795/* Values for vcpu->arch.io_gpr */
796#define KVM_MMIO_REG_MASK 0x001f
797#define KVM_MMIO_REG_EXT_MASK 0xffe0
798#define KVM_MMIO_REG_GPR 0x0000
799#define KVM_MMIO_REG_FPR 0x0020
800#define KVM_MMIO_REG_QPR 0x0040
801#define KVM_MMIO_REG_FQPR 0x0060
6f63e81b 802#define KVM_MMIO_REG_VSX 0x0080
b3c5d3c2 803
2246f8b5 804#define __KVM_HAVE_ARCH_WQP
5df554ad 805#define __KVM_HAVE_CREATE_DEVICE
b6d33834 806
13a34e06 807static inline void kvm_arch_hardware_disable(void) {}
0865e636
RK		 808static inline void kvm_arch_hardware_unsetup(void) {}
809static inline void kvm_arch_sync_events(struct kvm *kvm) {}
15f46015 810static inline void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots) {}
0865e636
RK		 811static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}
812static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
813static inline void kvm_arch_exit(void) {}
3217f7c2
CD		 814static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
815static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
3491caf2 816static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
0865e636 817
bbf45ba5 818#endif /* __POWERPC_KVM_HOST_H__ */
Linux 6.x block layer and io_uring tree(s)