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1 | /* |
2 | * Copyright 2010-2011 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License, version 2, as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | #ifndef ASM_KVM_BOOKE_HV_ASM_H | |
10 | #define ASM_KVM_BOOKE_HV_ASM_H | |
11 | ||
2c86cd18 CL |
12 | #include <asm/feature-fixups.h> |
13 | ||
d30f6e48 SW |
14 | #ifdef __ASSEMBLY__ |
15 | ||
16 | /* | |
17 | * All exceptions from guest state must go through KVM | |
18 | * (except for those which are delivered directly to the guest) -- | |
19 | * there are no exceptions for which we fall through directly to | |
20 | * the normal host handler. | |
21 | * | |
e51f8f32 | 22 | * 32-bit host |
d30f6e48 SW |
23 | * Expected inputs (normal exceptions): |
24 | * SCRATCH0 = saved r10 | |
25 | * r10 = thread struct | |
26 | * r11 = appropriate SRR1 variant (currently used as scratch) | |
27 | * r13 = saved CR | |
28 | * *(r10 + THREAD_NORMSAVE(0)) = saved r11 | |
29 | * *(r10 + THREAD_NORMSAVE(2)) = saved r13 | |
30 | * | |
31 | * Expected inputs (crit/mcheck/debug exceptions): | |
32 | * appropriate SCRATCH = saved r8 | |
33 | * r8 = exception level stack frame | |
34 | * r9 = *(r8 + _CCR) = saved CR | |
35 | * r11 = appropriate SRR1 variant (currently used as scratch) | |
36 | * *(r8 + GPR9) = saved r9 | |
37 | * *(r8 + GPR10) = saved r10 (r10 not yet clobbered) | |
38 | * *(r8 + GPR11) = saved r11 | |
e51f8f32 MC |
39 | * |
40 | * 64-bit host | |
9d378dfa | 41 | * Expected inputs (GEN/GDBELL/DBG/CRIT/MC exception types): |
e51f8f32 MC |
42 | * r10 = saved CR |
43 | * r13 = PACA_POINTER | |
44 | * *(r13 + PACA_EX##type + EX_R10) = saved r10 | |
45 | * *(r13 + PACA_EX##type + EX_R11) = saved r11 | |
46 | * SPRN_SPRG_##type##_SCRATCH = saved r13 | |
e51f8f32 MC |
47 | * |
48 | * Expected inputs (TLB exception type): | |
49 | * r10 = saved CR | |
a3dc6207 | 50 | * r12 = extlb pointer |
e51f8f32 | 51 | * r13 = PACA_POINTER |
a3dc6207 SW |
52 | * *(r12 + EX_TLB_R10) = saved r10 |
53 | * *(r12 + EX_TLB_R11) = saved r11 | |
54 | * *(r12 + EX_TLB_R13) = saved r13 | |
55 | * SPRN_SPRG_GEN_SCRATCH = saved r12 | |
e51f8f32 MC |
56 | * |
57 | * Only the bolted version of TLB miss exception handlers is supported now. | |
d30f6e48 SW |
58 | */ |
59 | .macro DO_KVM intno srr1 | |
60 | #ifdef CONFIG_KVM_BOOKE_HV | |
61 | BEGIN_FTR_SECTION | |
62 | mtocrf 0x80, r11 /* check MSR[GS] without clobbering reg */ | |
d61966fc | 63 | bf 3, 1975f |
d30f6e48 | 64 | b kvmppc_handler_\intno\()_\srr1 |
d61966fc | 65 | 1975: |
d30f6e48 SW |
66 | END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV) |
67 | #endif | |
68 | .endm | |
69 | ||
70 | #endif /*__ASSEMBLY__ */ | |
71 | #endif /* ASM_KVM_BOOKE_HV_ASM_H */ |