projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| d30f6e48 SW |
2 | /* |
| 3 | * Copyright 2010-2011 Freescale Semiconductor, Inc. | |
| d30f6e48 SW |
4 | */ |
| 5 | ||
| 6 | #ifndef ASM_KVM_BOOKE_HV_ASM_H | |
| 7 | #define ASM_KVM_BOOKE_HV_ASM_H | |
| 8 | ||
| 2c86cd18 CL |
9 | #include <asm/feature-fixups.h> |
| 10 | ||
| d30f6e48 SW |
11 | #ifdef __ASSEMBLY__ |
| 12 | ||
| 13 | /* | |
| 14 | * All exceptions from guest state must go through KVM | |
| 15 | * (except for those which are delivered directly to the guest) -- | |
| 16 | * there are no exceptions for which we fall through directly to | |
| 17 | * the normal host handler. | |
| 18 | * | |
| e51f8f32 | 19 | * 32-bit host |
| d30f6e48 SW |
20 | * Expected inputs (normal exceptions): |
| 21 | * SCRATCH0 = saved r10 | |
| 22 | * r10 = thread struct | |
| 23 | * r11 = appropriate SRR1 variant (currently used as scratch) | |
| 24 | * r13 = saved CR | |
| 25 | * *(r10 + THREAD_NORMSAVE(0)) = saved r11 | |
| 26 | * *(r10 + THREAD_NORMSAVE(2)) = saved r13 | |
| 27 | * | |
| 28 | * Expected inputs (crit/mcheck/debug exceptions): | |
| 29 | * appropriate SCRATCH = saved r8 | |
| 30 | * r8 = exception level stack frame | |
| 31 | * r9 = *(r8 + _CCR) = saved CR | |
| 32 | * r11 = appropriate SRR1 variant (currently used as scratch) | |
| 33 | * *(r8 + GPR9) = saved r9 | |
| 34 | * *(r8 + GPR10) = saved r10 (r10 not yet clobbered) | |
| 35 | * *(r8 + GPR11) = saved r11 | |
| e51f8f32 MC |
36 | * |
| 37 | * 64-bit host | |
| 9d378dfa | 38 | * Expected inputs (GEN/GDBELL/DBG/CRIT/MC exception types): |
| e51f8f32 MC |
39 | * r10 = saved CR |
| 40 | * r13 = PACA_POINTER | |
| 41 | * *(r13 + PACA_EX##type + EX_R10) = saved r10 | |
| 42 | * *(r13 + PACA_EX##type + EX_R11) = saved r11 | |
| 43 | * SPRN_SPRG_##type##_SCRATCH = saved r13 | |
| e51f8f32 MC |
44 | * |
| 45 | * Expected inputs (TLB exception type): | |
| 46 | * r10 = saved CR | |
| a3dc6207 | 47 | * r12 = extlb pointer |
| e51f8f32 | 48 | * r13 = PACA_POINTER |
| a3dc6207 SW |
49 | * *(r12 + EX_TLB_R10) = saved r10 |
| 50 | * *(r12 + EX_TLB_R11) = saved r11 | |
| 51 | * *(r12 + EX_TLB_R13) = saved r13 | |
| 52 | * SPRN_SPRG_GEN_SCRATCH = saved r12 | |
| e51f8f32 MC |
53 | * |
| 54 | * Only the bolted version of TLB miss exception handlers is supported now. | |
| d30f6e48 SW |
55 | */ |
| 56 | .macro DO_KVM intno srr1 | |
| 57 | #ifdef CONFIG_KVM_BOOKE_HV | |
| 58 | BEGIN_FTR_SECTION | |
| 59 | mtocrf 0x80, r11 /* check MSR[GS] without clobbering reg */ | |
| d61966fc | 60 | bf 3, 1975f |
| d30f6e48 | 61 | b kvmppc_handler_\intno\()_\srr1 |
| d61966fc | 62 | 1975: |
| d30f6e48 SW |
63 | END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV) |
| 64 | #endif | |
| 65 | .endm | |
| 66 | ||
| 67 | #endif /*__ASSEMBLY__ */ | |
| 68 | #endif /* ASM_KVM_BOOKE_HV_ASM_H */ |