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KVM: PPC: Add support for explicit HIOR setting
[linux-2.6-block.git] / arch / powerpc / include / asm / kvm_book3s.h
CommitLineData
4e342025
AG		 1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright SUSE Linux Products GmbH 2009
16 *
17 * Authors: Alexander Graf <agraf@suse.de>
18 */
19
20#ifndef __ASM_KVM_BOOK3S_H__
21#define __ASM_KVM_BOOK3S_H__
22
23#include <linux/types.h>
24#include <linux/kvm_host.h>
2191d657 25#include <asm/kvm_book3s_asm.h>
4e342025 26
4e342025 27struct kvmppc_bat {
e15a1137 28 u64 raw;
4e342025
AG		 29 u32 bepi;
30 u32 bepi_mask;
4e342025
AG		 31 u32 brpn;
32 u8 wimg;
33 u8 pp;
3ed9c6d2
AG		 34 bool vs : 1;
35 bool vp : 1;
4e342025
AG		 36};
37
38struct kvmppc_sid_map {
39 u64 guest_vsid;
40 u64 guest_esid;
41 u64 host_vsid;
3ed9c6d2 42 bool valid : 1;
4e342025
AG		 43};
44
45#define SID_MAP_BITS 9
46#define SID_MAP_NUM (1 << SID_MAP_BITS)
47#define SID_MAP_MASK (SID_MAP_NUM - 1)
48
8b6db3bc
AG		 49#ifdef CONFIG_PPC_BOOK3S_64
50#define SID_CONTEXTS 1
51#else
52#define SID_CONTEXTS 128
53#define VSID_POOL_SIZE (SID_CONTEXTS * 16)
54#endif
55
c4befc58
PM		 56struct hpte_cache {
57 struct hlist_node list_pte;
58 struct hlist_node list_pte_long;
59 struct hlist_node list_vpte;
60 struct hlist_node list_vpte_long;
61 struct rcu_head rcu_head;
62 u64 host_va;
63 u64 pfn;
64 ulong slot;
65 struct kvmppc_pte pte;
66};
67
4e342025
AG		 68struct kvmppc_vcpu_book3s {
69 struct kvm_vcpu vcpu;
c7f38f46 70 struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
4e342025 71 struct kvmppc_sid_map sid_map[SID_MAP_NUM];
4e342025
AG		 72 struct {
73 u64 esid;
74 u64 vsid;
75 } slb_shadow[64];
76 u8 slb_shadow_max;
4e342025
AG		 77 struct kvmppc_bat ibat[8];
78 struct kvmppc_bat dbat[8];
79 u64 hid[6];
d6d549b2 80 u64 gqr[8];
4e342025 81 u64 sdr1;
4e342025
AG		 82 u64 hior;
83 u64 msr_mask;
4e342025 84 u64 vsid_next;
8b6db3bc
AG		 85#ifdef CONFIG_PPC_BOOK3S_32
86 u32 vsid_pool[VSID_POOL_SIZE];
87#else
88 u64 vsid_first;
4e342025 89 u64 vsid_max;
8b6db3bc
AG		 90#endif
91 int context_id[SID_CONTEXTS];
c4befc58 92
a15bd354
AG		 93 bool hior_sregs; /* HIOR is set by SREGS, not PVR */
94
c4befc58
PM		 95 struct hlist_head hpte_hash_pte[HPTEG_HASH_NUM_PTE];
96 struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG];
97 struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE];
98 struct hlist_head hpte_hash_vpte_long[HPTEG_HASH_NUM_VPTE_LONG];
99 int hpte_cache_count;
100 spinlock_t mmu_lock;
4e342025
AG		 101};
102
103#define CONTEXT_HOST 0
104#define CONTEXT_GUEST 1
105#define CONTEXT_GUEST_END 2
106
f7bc74e1
AG		 107#define VSID_REAL 0x1fffffffffc00000ULL
108#define VSID_BAT 0x1fffffffffb00000ULL
109#define VSID_REAL_DR 0x2000000000000000ULL
110#define VSID_REAL_IR 0x4000000000000000ULL
5a1b419f 111#define VSID_PR 0x8000000000000000ULL
4e342025 112
af7b4d10 113extern void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong ea, ulong ea_mask);
4e342025 114extern void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 vp, u64 vp_mask);
af7b4d10 115extern void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, ulong pa_start, ulong pa_end);
4e342025 116extern void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 new_msr);
f05ed4d5 117extern void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr);
4e342025
AG		 118extern void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu);
119extern void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu);
de56a948 120extern void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu);
4e342025
AG		 121extern int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte);
122extern int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr);
123extern void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu);
fef093be
AG		 124
125extern void kvmppc_mmu_hpte_cache_map(struct kvm_vcpu *vcpu, struct hpte_cache *pte);
126extern struct hpte_cache *kvmppc_mmu_hpte_cache_next(struct kvm_vcpu *vcpu);
127extern void kvmppc_mmu_hpte_destroy(struct kvm_vcpu *vcpu);
128extern int kvmppc_mmu_hpte_init(struct kvm_vcpu *vcpu);
129extern void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte);
130extern int kvmppc_mmu_hpte_sysinit(void);
131extern void kvmppc_mmu_hpte_sysexit(void);
de56a948 132extern int kvmppc_mmu_hv_init(void);
fef093be 133
5467a97d
AG		 134extern int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, bool data);
135extern int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, bool data);
4e342025 136extern void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec);
de56a948 137extern void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags);
e15a1137
AG		 138extern void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat,
139 bool upper, u32 val);
aba3bd7f 140extern void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr);
831317b6 141extern int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu);
e8508940 142extern pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn);
4e342025 143
a22a2dac
AG		 144extern void kvmppc_handler_lowmem_trampoline(void);
145extern void kvmppc_handler_trampoline_enter(void);
021ec9c6 146extern void kvmppc_rmcall(ulong srr0, ulong srr1);
de56a948 147extern void kvmppc_hv_entry_trampoline(void);
d5e52813
AG		 148extern void kvmppc_load_up_fpu(void);
149extern void kvmppc_load_up_altivec(void);
150extern void kvmppc_load_up_vsx(void);
ca7f4203
AG		 151extern u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst);
152extern ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst);
4e342025
AG		 153
154static inline struct kvmppc_vcpu_book3s *to_book3s(struct kvm_vcpu *vcpu)
155{
156 return container_of(vcpu, struct kvmppc_vcpu_book3s, vcpu);
157}
158
de56a948
PM		 159extern void kvm_return_point(void);
160
161/* Also add subarch specific defines */
162
163#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
164#include <asm/kvm_book3s_32.h>
165#endif
166#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
167#include <asm/kvm_book3s_64.h>
168#endif
169
170#ifdef CONFIG_KVM_BOOK3S_PR
171
f05ed4d5
PM		 172static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
173{
174 return to_book3s(vcpu)->hior;
175}
176
177static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
178 unsigned long pending_now, unsigned long old_pending)
179{
180 if (pending_now)
181 vcpu->arch.shared->int_pending = 1;
182 else if (old_pending)
183 vcpu->arch.shared->int_pending = 0;
184}
185
c7f38f46
AG		 186static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
187{
188 if ( num < 14 ) {
189 to_svcpu(vcpu)->gpr[num] = val;
190 to_book3s(vcpu)->shadow_vcpu->gpr[num] = val;
191 } else
192 vcpu->arch.gpr[num] = val;
193}
194
195static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num)
196{
197 if ( num < 14 )
198 return to_svcpu(vcpu)->gpr[num];
199 else
200 return vcpu->arch.gpr[num];
201}
202
203static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val)
204{
205 to_svcpu(vcpu)->cr = val;
206 to_book3s(vcpu)->shadow_vcpu->cr = val;
207}
208
209static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
210{
211 return to_svcpu(vcpu)->cr;
212}
213
214static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val)
215{
216 to_svcpu(vcpu)->xer = val;
217 to_book3s(vcpu)->shadow_vcpu->xer = val;
218}
219
220static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu)
221{
222 return to_svcpu(vcpu)->xer;
223}
224
225static inline void kvmppc_set_ctr(struct kvm_vcpu *vcpu, ulong val)
226{
227 to_svcpu(vcpu)->ctr = val;
228}
229
230static inline ulong kvmppc_get_ctr(struct kvm_vcpu *vcpu)
231{
232 return to_svcpu(vcpu)->ctr;
233}
234
235static inline void kvmppc_set_lr(struct kvm_vcpu *vcpu, ulong val)
236{
237 to_svcpu(vcpu)->lr = val;
238}
239
240static inline ulong kvmppc_get_lr(struct kvm_vcpu *vcpu)
241{
242 return to_svcpu(vcpu)->lr;
243}
244
245static inline void kvmppc_set_pc(struct kvm_vcpu *vcpu, ulong val)
246{
247 to_svcpu(vcpu)->pc = val;
248}
249
250static inline ulong kvmppc_get_pc(struct kvm_vcpu *vcpu)
251{
252 return to_svcpu(vcpu)->pc;
253}
254
255static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu)
256{
257 ulong pc = kvmppc_get_pc(vcpu);
258 struct kvmppc_book3s_shadow_vcpu *svcpu = to_svcpu(vcpu);
259
260 /* Load the instruction manually if it failed to do so in the
261 * exit path */
262 if (svcpu->last_inst == KVM_INST_FETCH_FAILED)
263 kvmppc_ld(vcpu, &pc, sizeof(u32), &svcpu->last_inst, false);
264
265 return svcpu->last_inst;
266}
267
268static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
269{
270 return to_svcpu(vcpu)->fault_dar;
271}
4e342025 272
f05ed4d5
PM		 273static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
274{
275 ulong crit_raw = vcpu->arch.shared->critical;
276 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
277 bool crit;
278
279 /* Truncate crit indicators in 32 bit mode */
280 if (!(vcpu->arch.shared->msr & MSR_SF)) {
281 crit_raw &= 0xffffffff;
282 crit_r1 &= 0xffffffff;
283 }
284
285 /* Critical section when crit == r1 */
286 crit = (crit_raw == crit_r1);
287 /* ... and we're in supervisor mode */
288 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
289
290 return crit;
291}
de56a948
PM		 292#else /* CONFIG_KVM_BOOK3S_PR */
293
294static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
295{
296 return 0;
297}
298
299static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
300 unsigned long pending_now, unsigned long old_pending)
301{
de56a948
PM		 302}
303
304static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
305{
306 vcpu->arch.gpr[num] = val;
307}
308
309static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num)
310{
311 return vcpu->arch.gpr[num];
312}
313
314static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val)
315{
316 vcpu->arch.cr = val;
317}
318
319static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
320{
321 return vcpu->arch.cr;
322}
323
324static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val)
325{
326 vcpu->arch.xer = val;
327}
328
329static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu)
330{
331 return vcpu->arch.xer;
332}
333
334static inline void kvmppc_set_ctr(struct kvm_vcpu *vcpu, ulong val)
335{
336 vcpu->arch.ctr = val;
337}
338
339static inline ulong kvmppc_get_ctr(struct kvm_vcpu *vcpu)
340{
341 return vcpu->arch.ctr;
342}
343
344static inline void kvmppc_set_lr(struct kvm_vcpu *vcpu, ulong val)
345{
346 vcpu->arch.lr = val;
347}
348
349static inline ulong kvmppc_get_lr(struct kvm_vcpu *vcpu)
350{
351 return vcpu->arch.lr;
352}
353
354static inline void kvmppc_set_pc(struct kvm_vcpu *vcpu, ulong val)
355{
356 vcpu->arch.pc = val;
357}
358
359static inline ulong kvmppc_get_pc(struct kvm_vcpu *vcpu)
360{
361 return vcpu->arch.pc;
362}
363
364static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu)
365{
366 ulong pc = kvmppc_get_pc(vcpu);
367
368 /* Load the instruction manually if it failed to do so in the
369 * exit path */
370 if (vcpu->arch.last_inst == KVM_INST_FETCH_FAILED)
371 kvmppc_ld(vcpu, &pc, sizeof(u32), &vcpu->arch.last_inst, false);
372
373 return vcpu->arch.last_inst;
374}
375
376static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
377{
378 return vcpu->arch.fault_dar;
379}
380
381static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
382{
383 return false;
384}
385#endif
f05ed4d5 386
db507c30
AG		 387static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
388 unsigned long pte_index)
389{
390 unsigned long rb, va_low;
391
392 rb = (v & ~0x7fUL) << 16; /* AVA field */
393 va_low = pte_index >> 3;
394 if (v & HPTE_V_SECONDARY)
395 va_low = ~va_low;
396 /* xor vsid from AVA */
397 if (!(v & HPTE_V_1TB_SEG))
398 va_low ^= v >> 12;
399 else
400 va_low ^= v >> 24;
401 va_low &= 0x7ff;
402 if (v & HPTE_V_LARGE) {
403 rb |= 1; /* L field */
404 if (cpu_has_feature(CPU_FTR_ARCH_206) &&
405 (r & 0xff000)) {
406 /* non-16MB large page, must be 64k */
407 /* (masks depend on page size) */
408 rb |= 0x1000; /* page encoding in LP field */
409 rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
410 rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
411 }
412 } else {
413 /* 4kB page */
414 rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
415 }
416 rb |= (v >> 54) & 0x300; /* B field */
417 return rb;
418}
419
ad0a048b
AG		 420/* Magic register values loaded into r3 and r4 before the 'sc' assembly
421 * instruction for the OSI hypercalls */
422#define OSI_SC_MAGIC_R3 0x113724FA
423#define OSI_SC_MAGIC_R4 0x77810F9B
424
4e342025
AG		 425#define INS_DCBZ 0x7c0007ec
426
427#endif /* __ASM_KVM_BOOK3S_H__ */
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