[linux-2.6-block.git] / arch / powerpc / include / asm / exception-64s.h

#ifndef _ASM_POWERPC_EXCEPTION_H
#define _ASM_POWERPC_EXCEPTION_H
/*
 * Extracted from head_64.S
 *
 *  PowerPC version
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
 *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
 *  Adapted for Power Macintosh by Paul Mackerras.
 *  Low-level exception handlers and MMU support
 *  rewritten by Paul Mackerras.
 *    Copyright (C) 1996 Paul Mackerras.
 *
 *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
 *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
 *
 *  This file contains the low-level support and setup for the
 *  PowerPC-64 platform, including trap and interrupt dispatch.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */
/*
 * The following macros define the code that appears as
 * the prologue to each of the exception handlers.  They
 * are split into two parts to allow a single kernel binary
 * to be used for pSeries and iSeries.
 *
 * We make as much of the exception code common between native
 * exception handlers (including pSeries LPAR) and iSeries LPAR
 * implementations as possible.
 */

#define EX_R9		0
#define EX_R10		8
#define EX_R11		16
#define EX_R12		24
#define EX_R13		32
#define EX_SRR0		40
#define EX_DAR		48
#define EX_DSISR	56
#define EX_CCR		60
#define EX_R3		64
#define EX_LR		72
#define EX_CFAR		80

#ifdef CONFIG_RELOCATABLE
#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)			\
	ld	r12,PACAKBASE(r13);	/* get high part of &label */	\
	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
	LOAD_HANDLER(r12,label);					\
	mtlr	r12;							\
	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
	li	r10,MSR_RI;						\
	mtmsrd 	r10,1;			/* Set RI (EE=0) */		\
	blr;
#else
/* If not relocatable, we can jump directly -- and save messing with LR */
#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)			\
	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
	li	r10,MSR_RI;						\
	mtmsrd 	r10,1;			/* Set RI (EE=0) */		\
	b	label;
#endif

/*
 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
 * so no need to rfid.  Save lr in case we're CONFIG_RELOCATABLE, in which
 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
 */
#define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec)	\
	EXCEPTION_PROLOG_1(area, extra, vec);				\
	EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)

/*
 * We're short on space and time in the exception prolog, so we can't
 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
 * low halfword of the address, but for Kdump we need the whole low
 * word.
 */
#define LOAD_HANDLER(reg, label)					\
	/* Handlers must be within 64K of kbase, which must be 64k aligned */ \
	ori	reg,reg,(label)-_stext;	/* virt addr of handler ... */

/* Exception register prefixes */
#define EXC_HV	H
#define EXC_STD

#if defined(CONFIG_RELOCATABLE)
/*
 * If we support interrupts with relocation on AND we're a relocatable
 * kernel, we need to use LR to get to the 2nd level handler.  So, save/restore
 * it when required.
 */
#define SAVE_LR(reg, area)	mflr	reg ; 	std	reg,area+EX_LR(r13)
#define GET_LR(reg, area) 			ld	reg,area+EX_LR(r13)
#define RESTORE_LR(reg, area)	ld	reg,area+EX_LR(r13) ; mtlr reg
#else
/* ...else LR is unused and in register. */
#define SAVE_LR(reg, area)
#define GET_LR(reg, area) 	mflr	reg
#define RESTORE_LR(reg, area)
#endif

#define __EXCEPTION_PROLOG_1(area, extra, vec)				\
	GET_PACA(r13);							\
	std	r9,area+EX_R9(r13);	/* save r9 - r12 */		\
	std	r10,area+EX_R10(r13);					\
	BEGIN_FTR_SECTION_NESTED(66);					\
	mfspr	r10,SPRN_CFAR;						\
	std	r10,area+EX_CFAR(r13);					\
	END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66);		\
	SAVE_LR(r10, area);						\
	mfcr	r9;							\
	extra(vec);							\
	std	r11,area+EX_R11(r13);					\
	std	r12,area+EX_R12(r13);					\
	GET_SCRATCH0(r10);						\
	std	r10,area+EX_R13(r13)
#define EXCEPTION_PROLOG_1(area, extra, vec)				\
	__EXCEPTION_PROLOG_1(area, extra, vec)

#define __EXCEPTION_PROLOG_PSERIES_1(label, h)				\
	ld	r12,PACAKBASE(r13);	/* get high part of &label */	\
	ld	r10,PACAKMSR(r13);	/* get MSR value for kernel */	\
	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
	LOAD_HANDLER(r12,label)						\
	mtspr	SPRN_##h##SRR0,r12;					\
	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
	mtspr	SPRN_##h##SRR1,r10;					\
	h##rfid;							\
	b	.	/* prevent speculative execution */
#define EXCEPTION_PROLOG_PSERIES_1(label, h)				\
	__EXCEPTION_PROLOG_PSERIES_1(label, h)

#define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec)		\
	EXCEPTION_PROLOG_1(area, extra, vec);				\
	EXCEPTION_PROLOG_PSERIES_1(label, h);

#define __KVMTEST(n)							\
	lbz	r10,HSTATE_IN_GUEST(r13);			\
	cmpwi	r10,0;							\
	bne	do_kvm_##n

#define __KVM_HANDLER(area, h, n)					\
do_kvm_##n:								\
	ld	r10,area+EX_R10(r13);					\
	stw	r9,HSTATE_SCRATCH1(r13);			\
	ld	r9,area+EX_R9(r13);					\
	std	r12,HSTATE_SCRATCH0(r13);			\
	li	r12,n;							\
	b	kvmppc_interrupt

#define __KVM_HANDLER_SKIP(area, h, n)					\
do_kvm_##n:								\
	cmpwi	r10,KVM_GUEST_MODE_SKIP;				\
	ld	r10,area+EX_R10(r13);					\
	beq	89f;							\
	stw	r9,HSTATE_SCRATCH1(r13);			\
	ld	r9,area+EX_R9(r13);					\
	std	r12,HSTATE_SCRATCH0(r13);			\
	li	r12,n;							\
	b	kvmppc_interrupt;					\
89:	mtocrf	0x80,r9;						\
	ld	r9,area+EX_R9(r13);					\
	b	kvmppc_skip_##h##interrupt

#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
#define KVMTEST(n)			__KVMTEST(n)
#define KVM_HANDLER(area, h, n)		__KVM_HANDLER(area, h, n)
#define KVM_HANDLER_SKIP(area, h, n)	__KVM_HANDLER_SKIP(area, h, n)

#else
#define KVMTEST(n)
#define KVM_HANDLER(area, h, n)
#define KVM_HANDLER_SKIP(area, h, n)
#endif

#ifdef CONFIG_KVM_BOOK3S_PR
#define KVMTEST_PR(n)			__KVMTEST(n)
#define KVM_HANDLER_PR(area, h, n)	__KVM_HANDLER(area, h, n)
#define KVM_HANDLER_PR_SKIP(area, h, n)	__KVM_HANDLER_SKIP(area, h, n)

#else
#define KVMTEST_PR(n)
#define KVM_HANDLER_PR(area, h, n)
#define KVM_HANDLER_PR_SKIP(area, h, n)
#endif

#define NOTEST(n)

/*
 * The common exception prolog is used for all except a few exceptions
 * such as a segment miss on a kernel address.  We have to be prepared
 * to take another exception from the point where we first touch the
 * kernel stack onwards.
 *
 * On entry r13 points to the paca, r9-r13 are saved in the paca,
 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
 * SRR1, and relocation is on.
 */
#define EXCEPTION_PROLOG_COMMON(n, area)				   \
	andi.	r10,r12,MSR_PR;		/* See if coming from user	*/ \
	mr	r10,r1;			/* Save r1			*/ \
	subi	r1,r1,INT_FRAME_SIZE;	/* alloc frame on kernel stack	*/ \
	beq-	1f;							   \
	ld	r1,PACAKSAVE(r13);	/* kernel stack to use		*/ \
1:	cmpdi	cr1,r1,0;		/* check if r1 is in userspace	*/ \
	blt+	cr1,3f;			/* abort if it is		*/ \
	li	r1,(n);			/* will be reloaded later	*/ \
	sth	r1,PACA_TRAP_SAVE(r13);					   \
	std	r3,area+EX_R3(r13);					   \
	addi	r3,r13,area;		/* r3 -> where regs are saved*/	   \
	RESTORE_LR(r1, area);						   \
	b	bad_stack;						   \
3:	std	r9,_CCR(r1);		/* save CR in stackframe	*/ \
	std	r11,_NIP(r1);		/* save SRR0 in stackframe	*/ \
	std	r12,_MSR(r1);		/* save SRR1 in stackframe	*/ \
	std	r10,0(r1);		/* make stack chain pointer	*/ \
	std	r0,GPR0(r1);		/* save r0 in stackframe	*/ \
	std	r10,GPR1(r1);		/* save r1 in stackframe	*/ \
	beq	4f;			/* if from kernel mode		*/ \
	ACCOUNT_CPU_USER_ENTRY(r9, r10);				   \
4:	std	r2,GPR2(r1);		/* save r2 in stackframe	*/ \
	SAVE_4GPRS(3, r1);		/* save r3 - r6 in stackframe	*/ \
	SAVE_2GPRS(7, r1);		/* save r7, r8 in stackframe	*/ \
	ld	r9,area+EX_R9(r13);	/* move r9, r10 to stackframe	*/ \
	ld	r10,area+EX_R10(r13);					   \
	std	r9,GPR9(r1);						   \
	std	r10,GPR10(r1);						   \
	ld	r9,area+EX_R11(r13);	/* move r11 - r13 to stackframe	*/ \
	ld	r10,area+EX_R12(r13);					   \
	ld	r11,area+EX_R13(r13);					   \
	std	r9,GPR11(r1);						   \
	std	r10,GPR12(r1);						   \
	std	r11,GPR13(r1);						   \
	BEGIN_FTR_SECTION_NESTED(66);					   \
	ld	r10,area+EX_CFAR(r13);					   \
	std	r10,ORIG_GPR3(r1);					   \
	END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66);		   \
	GET_LR(r9,area);		/* Get LR, later save to stack	*/ \
	ld	r2,PACATOC(r13);	/* get kernel TOC into r2	*/ \
	std	r9,_LINK(r1);						   \
	mfctr	r10;			/* save CTR in stackframe	*/ \
	std	r10,_CTR(r1);						   \
	lbz	r10,PACASOFTIRQEN(r13);				   \
	mfspr	r11,SPRN_XER;		/* save XER in stackframe	*/ \
	std	r10,SOFTE(r1);						   \
	std	r11,_XER(r1);						   \
	li	r9,(n)+1;						   \
	std	r9,_TRAP(r1);		/* set trap number		*/ \
	li	r10,0;							   \
	ld	r11,exception_marker@toc(r2);				   \
	std	r10,RESULT(r1);		/* clear regs->result		*/ \
	std	r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame	*/ \
	ACCOUNT_STOLEN_TIME

/*
 * Exception vectors.
 */
#define STD_EXCEPTION_PSERIES(loc, vec, label)		\
	. = loc;					\
	.globl label##_pSeries;				\
label##_pSeries:					\
	HMT_MEDIUM;					\
	SET_SCRATCH0(r13);		/* save r13 */		\
	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common,	\
				 EXC_STD, KVMTEST_PR, vec)

#define STD_EXCEPTION_HV(loc, vec, label)		\
	. = loc;					\
	.globl label##_hv;				\
label##_hv:						\
	HMT_MEDIUM;					\
	SET_SCRATCH0(r13);	/* save r13 */			\
	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common,	\
				 EXC_HV, KVMTEST, vec)

#define STD_RELON_EXCEPTION_PSERIES(loc, vec, label)	\
	. = loc;					\
	.globl label##_relon_pSeries;			\
label##_relon_pSeries:					\
	HMT_MEDIUM;					\
	/* No guest interrupts come through here */	\
	SET_SCRATCH0(r13);		/* save r13 */	\
	EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
				       EXC_STD, KVMTEST_PR, vec)

#define STD_RELON_EXCEPTION_HV(loc, vec, label)		\
	. = loc;					\
	.globl label##_relon_hv;			\
label##_relon_hv:					\
	HMT_MEDIUM;					\
	/* No guest interrupts come through here */	\
	SET_SCRATCH0(r13);	/* save r13 */		\
	EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
				       EXC_HV, KVMTEST, vec)

/* This associate vector numbers with bits in paca->irq_happened */
#define SOFTEN_VALUE_0x500	PACA_IRQ_EE
#define SOFTEN_VALUE_0x502	PACA_IRQ_EE
#define SOFTEN_VALUE_0x900	PACA_IRQ_DEC
#define SOFTEN_VALUE_0x982	PACA_IRQ_DEC
#define SOFTEN_VALUE_0xa00	PACA_IRQ_DBELL
#define SOFTEN_VALUE_0xe80	PACA_IRQ_DBELL
#define SOFTEN_VALUE_0xe82	PACA_IRQ_DBELL

#define __SOFTEN_TEST(h, vec)						\
	lbz	r10,PACASOFTIRQEN(r13);					\
	cmpwi	r10,0;							\
	li	r10,SOFTEN_VALUE_##vec;					\
	beq	masked_##h##interrupt
#define _SOFTEN_TEST(h, vec)	__SOFTEN_TEST(h, vec)

#define SOFTEN_TEST_PR(vec)						\
	KVMTEST_PR(vec);						\
	_SOFTEN_TEST(EXC_STD, vec)

#define SOFTEN_TEST_HV(vec)						\
	KVMTEST(vec);							\
	_SOFTEN_TEST(EXC_HV, vec)

#define SOFTEN_TEST_HV_201(vec)						\
	KVMTEST(vec);							\
	_SOFTEN_TEST(EXC_STD, vec)

#define SOFTEN_NOTEST_PR(vec)		_SOFTEN_TEST(EXC_STD, vec)
#define SOFTEN_NOTEST_HV(vec)		_SOFTEN_TEST(EXC_HV, vec)

#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)		\
	HMT_MEDIUM;							\
	SET_SCRATCH0(r13);    /* save r13 */				\
	__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec);		\
	EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)		\
	__MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)

#define MASKABLE_EXCEPTION_PSERIES(loc, vec, label)			\
	. = loc;							\
	.globl label##_pSeries;						\
label##_pSeries:							\
	_MASKABLE_EXCEPTION_PSERIES(vec, label,				\
				    EXC_STD, SOFTEN_TEST_PR)

#define MASKABLE_EXCEPTION_HV(loc, vec, label)				\
	. = loc;							\
	.globl label##_hv;						\
label##_hv:								\
	_MASKABLE_EXCEPTION_PSERIES(vec, label,				\
				    EXC_HV, SOFTEN_TEST_HV)

#define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)	\
	HMT_MEDIUM;							\
	SET_SCRATCH0(r13);    /* save r13 */				\
	__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec);		\
	EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h);
#define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)	\
	__MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)

#define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label)		\
	. = loc;							\
	.globl label##_relon_pSeries;					\
label##_relon_pSeries:							\
	_MASKABLE_RELON_EXCEPTION_PSERIES(vec, label,			\
					  EXC_STD, SOFTEN_NOTEST_PR)

#define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label)			\
	. = loc;							\
	.globl label##_relon_hv;					\
label##_relon_hv:							\
	_MASKABLE_RELON_EXCEPTION_PSERIES(vec, label,			\
					  EXC_HV, SOFTEN_NOTEST_HV)

/*
 * Our exception common code can be passed various "additions"
 * to specify the behaviour of interrupts, whether to kick the
 * runlatch, etc...
 */

/* Exception addition: Hard disable interrupts */
#define DISABLE_INTS	SOFT_DISABLE_INTS(r10,r11)

#define ADD_NVGPRS				\
	bl	.save_nvgprs

#define RUNLATCH_ON				\
BEGIN_FTR_SECTION				\
	CURRENT_THREAD_INFO(r3, r1);		\
	ld	r4,TI_LOCAL_FLAGS(r3);		\
	andi.	r0,r4,_TLF_RUNLATCH;		\
	beql	ppc64_runlatch_on_trampoline;	\
END_FTR_SECTION_IFSET(CPU_FTR_CTRL)

#define EXCEPTION_COMMON(trap, label, hdlr, ret, additions)	\
	.align	7;						\
	.globl label##_common;					\
label##_common:							\
	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);		\
	additions;						\
	addi	r3,r1,STACK_FRAME_OVERHEAD;			\
	bl	hdlr;						\
	b	ret

#define STD_EXCEPTION_COMMON(trap, label, hdlr)			\
	EXCEPTION_COMMON(trap, label, hdlr, ret_from_except,	\
			 ADD_NVGPRS;DISABLE_INTS)

/*
 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
 * in the idle task and therefore need the special idle handling
 * (finish nap and runlatch)
 */
#define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr)		  \
	EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
			 FINISH_NAP;RUNLATCH_ON;DISABLE_INTS)

/*
 * When the idle code in power4_idle puts the CPU into NAP mode,
 * it has to do so in a loop, and relies on the external interrupt
 * and decrementer interrupt entry code to get it out of the loop.
 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
 * to signal that it is in the loop and needs help to get out.
 */
#ifdef CONFIG_PPC_970_NAP
#define FINISH_NAP				\
BEGIN_FTR_SECTION				\
	CURRENT_THREAD_INFO(r11, r1);		\
	ld	r9,TI_LOCAL_FLAGS(r11);		\
	andi.	r10,r9,_TLF_NAPPING;		\
	bnel	power4_fixup_nap;		\
END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
#else
#define FINISH_NAP
#endif

#endif	/* _ASM_POWERPC_EXCEPTION_H */
Commit	Line	Data
f9ff0f30 SR	1	#ifndef _ASM_POWERPC_EXCEPTION_H
	2	#define _ASM_POWERPC_EXCEPTION_H
	3	/*
	4	* Extracted from head_64.S
	5	*
	6	* PowerPC version
	7	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
	8	*
	9	* Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
	10	* Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
	11	* Adapted for Power Macintosh by Paul Mackerras.
	12	* Low-level exception handlers and MMU support
	13	* rewritten by Paul Mackerras.
	14	* Copyright (C) 1996 Paul Mackerras.
	15	*
	16	* Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
	17	* Mike Corrigan {engebret\|bergner\|mikejc}@us.ibm.com
	18	*
	19	* This file contains the low-level support and setup for the
	20	* PowerPC-64 platform, including trap and interrupt dispatch.
	21	*
	22	* This program is free software; you can redistribute it and/or
	23	* modify it under the terms of the GNU General Public License
	24	* as published by the Free Software Foundation; either version
	25	* 2 of the License, or (at your option) any later version.
	26	*/
	27	/*
	28	* The following macros define the code that appears as
	29	* the prologue to each of the exception handlers. They
	30	* are split into two parts to allow a single kernel binary
	31	* to be used for pSeries and iSeries.
	32	*
	33	* We make as much of the exception code common between native
	34	* exception handlers (including pSeries LPAR) and iSeries LPAR
	35	* implementations as possible.
	36	*/
	37
	38	#define EX_R9 0
	39	#define EX_R10 8
	40	#define EX_R11 16
	41	#define EX_R12 24
	42	#define EX_R13 32
	43	#define EX_SRR0 40
	44	#define EX_DAR 48
	45	#define EX_DSISR 56
	46	#define EX_CCR 60
	47	#define EX_R3 64
	48	#define EX_LR 72
48404f2e	49	#define EX_CFAR 80
f9ff0f30	50
4700dfaf MN	51	#ifdef CONFIG_RELOCATABLE
	52	#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
	53	ld r12,PACAKBASE(r13); /* get high part of &label */ \
	54	mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
	55	LOAD_HANDLER(r12,label); \
	56	mtlr r12; \
	57	mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
	58	li r10,MSR_RI; \
	59	mtmsrd r10,1; /* Set RI (EE=0) */ \
	60	blr;
	61	#else
	62	/* If not relocatable, we can jump directly -- and save messing with LR */
	63	#define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
	64	mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
	65	mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
	66	li r10,MSR_RI; \
	67	mtmsrd r10,1; /* Set RI (EE=0) */ \
	68	b label;
	69	#endif
	70
	71	/*
	72	* As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
	73	* so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which
	74	* case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
	75	*/
	76	#define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
	77	EXCEPTION_PROLOG_1(area, extra, vec); \
	78	EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
	79
f9ff0f30 SR	80	/*
	81	* We're short on space and time in the exception prolog, so we can't
	82	* use the normal SET_REG_IMMEDIATE macro. Normally we just need the
	83	* low halfword of the address, but for Kdump we need the whole low
	84	* word.
	85	*/
f9ff0f30	86	#define LOAD_HANDLER(reg, label) \
61e2390e MN	87	/* Handlers must be within 64K of kbase, which must be 64k aligned */ \
61e2390e MN	88	ori reg,reg,(label)-_stext; /* virt addr of handler ... */
f9ff0f30	89
a5d4f3ad BH	90	/* Exception register prefixes */
	91	#define EXC_HV H
	92	#define EXC_STD
	93
4700dfaf MN	94	#if defined(CONFIG_RELOCATABLE)
	95	/*
	96	* If we support interrupts with relocation on AND we're a relocatable
	97	* kernel, we need to use LR to get to the 2nd level handler. So, save/restore
	98	* it when required.
	99	*/
	100	#define SAVE_LR(reg, area) mflr reg ; std reg,area+EX_LR(r13)
	101	#define GET_LR(reg, area) ld reg,area+EX_LR(r13)
	102	#define RESTORE_LR(reg, area) ld reg,area+EX_LR(r13) ; mtlr reg
	103	#else
	104	/* ...else LR is unused and in register. */
	105	#define SAVE_LR(reg, area)
	106	#define GET_LR(reg, area) mflr reg
	107	#define RESTORE_LR(reg, area)
	108	#endif
	109
b01c8b54	110	#define __EXCEPTION_PROLOG_1(area, extra, vec) \
2dd60d79	111	GET_PACA(r13); \
7180e3e6 SR	112	std r9,area+EX_R9(r13); /* save r9 - r12 */ \
7180e3e6 SR	113	std r10,area+EX_R10(r13); \
48404f2e PM	114	BEGIN_FTR_SECTION_NESTED(66); \
	115	mfspr r10,SPRN_CFAR; \
	116	std r10,area+EX_CFAR(r13); \
	117	END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
c1fb6816	118	SAVE_LR(r10, area); \
b01c8b54 PM	119	mfcr r9; \
	120	extra(vec); \
	121	std r11,area+EX_R11(r13); \
	122	std r12,area+EX_R12(r13); \
	123	GET_SCRATCH0(r10); \
	124	std r10,area+EX_R13(r13)
	125	#define EXCEPTION_PROLOG_1(area, extra, vec) \
	126	__EXCEPTION_PROLOG_1(area, extra, vec)
7180e3e6	127
a5d4f3ad	128	#define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
1f6a93e4 PM	129	ld r12,PACAKBASE(r13); /* get high part of &label */ \
1f6a93e4 PM	130	ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
a5d4f3ad	131	mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
f9ff0f30	132	LOAD_HANDLER(r12,label) \
a5d4f3ad BH	133	mtspr SPRN_##h##SRR0,r12; \
	134	mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
	135	mtspr SPRN_##h##SRR1,r10; \
	136	h##rfid; \
f9ff0f30	137	b . /* prevent speculative execution */
b01c8b54	138	#define EXCEPTION_PROLOG_PSERIES_1(label, h) \
a5d4f3ad	139	__EXCEPTION_PROLOG_PSERIES_1(label, h)
f9ff0f30	140
b01c8b54 PM	141	#define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
b01c8b54 PM	142	EXCEPTION_PROLOG_1(area, extra, vec); \
a5d4f3ad	143	EXCEPTION_PROLOG_PSERIES_1(label, h);
c5a8c0c9	144
b01c8b54	145	#define __KVMTEST(n) \
3c42bf8a	146	lbz r10,HSTATE_IN_GUEST(r13); \
b01c8b54 PM	147	cmpwi r10,0; \
	148	bne do_kvm_##n
	149
	150	#define __KVM_HANDLER(area, h, n) \
	151	do_kvm_##n: \
	152	ld r10,area+EX_R10(r13); \
3c42bf8a	153	stw r9,HSTATE_SCRATCH1(r13); \
b01c8b54	154	ld r9,area+EX_R9(r13); \
3c42bf8a	155	std r12,HSTATE_SCRATCH0(r13); \
b01c8b54 PM	156	li r12,n; \
	157	b kvmppc_interrupt
	158
	159	#define __KVM_HANDLER_SKIP(area, h, n) \
	160	do_kvm_##n: \
	161	cmpwi r10,KVM_GUEST_MODE_SKIP; \
	162	ld r10,area+EX_R10(r13); \
	163	beq 89f; \
3c42bf8a	164	stw r9,HSTATE_SCRATCH1(r13); \
b01c8b54	165	ld r9,area+EX_R9(r13); \
3c42bf8a	166	std r12,HSTATE_SCRATCH0(r13); \
b01c8b54 PM	167	li r12,n; \
	168	b kvmppc_interrupt; \
	169	89: mtocrf 0x80,r9; \
	170	ld r9,area+EX_R9(r13); \
	171	b kvmppc_skip_##h##interrupt
	172
	173	#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
	174	#define KVMTEST(n) __KVMTEST(n)
	175	#define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
	176	#define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
	177
	178	#else
	179	#define KVMTEST(n)
	180	#define KVM_HANDLER(area, h, n)
	181	#define KVM_HANDLER_SKIP(area, h, n)
	182	#endif
	183
de56a948 PM	184	#ifdef CONFIG_KVM_BOOK3S_PR
	185	#define KVMTEST_PR(n) __KVMTEST(n)
	186	#define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n)
	187	#define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
	188
	189	#else
	190	#define KVMTEST_PR(n)
	191	#define KVM_HANDLER_PR(area, h, n)
	192	#define KVM_HANDLER_PR_SKIP(area, h, n)
	193	#endif
	194
b01c8b54 PM	195	#define NOTEST(n)
b01c8b54 PM	196
f9ff0f30 SR	197	/*
	198	* The common exception prolog is used for all except a few exceptions
	199	* such as a segment miss on a kernel address. We have to be prepared
	200	* to take another exception from the point where we first touch the
	201	* kernel stack onwards.
	202	*
	203	* On entry r13 points to the paca, r9-r13 are saved in the paca,
	204	* r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
	205	* SRR1, and relocation is on.
	206	*/
	207	#define EXCEPTION_PROLOG_COMMON(n, area) \
	208	andi. r10,r12,MSR_PR; /* See if coming from user */ \
	209	mr r10,r1; /* Save r1 */ \
	210	subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
	211	beq- 1f; \
	212	ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
	213	1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
1977b502 PM	214	blt+ cr1,3f; /* abort if it is */ \
1977b502 PM	215	li r1,(n); /* will be reloaded later */ \
f9ff0f30	216	sth r1,PACA_TRAP_SAVE(r13); \
1977b502 PM	217	std r3,area+EX_R3(r13); \
1977b502 PM	218	addi r3,r13,area; /* r3 -> where regs are saved*/ \
c1fb6816	219	RESTORE_LR(r1, area); \
f9ff0f30 SR	220	b bad_stack; \
	221	3: std r9,_CCR(r1); /* save CR in stackframe */ \
	222	std r11,_NIP(r1); /* save SRR0 in stackframe */ \
	223	std r12,_MSR(r1); /* save SRR1 in stackframe */ \
	224	std r10,0(r1); /* make stack chain pointer */ \
	225	std r0,GPR0(r1); /* save r0 in stackframe */ \
	226	std r10,GPR1(r1); /* save r1 in stackframe */ \
5d75b264	227	beq 4f; /* if from kernel mode */ \
f9ff0f30	228	ACCOUNT_CPU_USER_ENTRY(r9, r10); \
5d75b264	229	4: std r2,GPR2(r1); /* save r2 in stackframe */ \
f9ff0f30 SR	230	SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
	231	SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
	232	ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
	233	ld r10,area+EX_R10(r13); \
	234	std r9,GPR9(r1); \
	235	std r10,GPR10(r1); \
	236	ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
	237	ld r10,area+EX_R12(r13); \
	238	ld r11,area+EX_R13(r13); \
	239	std r9,GPR11(r1); \
	240	std r10,GPR12(r1); \
	241	std r11,GPR13(r1); \
48404f2e PM	242	BEGIN_FTR_SECTION_NESTED(66); \
	243	ld r10,area+EX_CFAR(r13); \
	244	std r10,ORIG_GPR3(r1); \
	245	END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
c1fb6816	246	GET_LR(r9,area); /* Get LR, later save to stack */ \
f9ff0f30	247	ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
f9ff0f30 SR	248	std r9,_LINK(r1); \
	249	mfctr r10; /* save CTR in stackframe */ \
	250	std r10,_CTR(r1); \
	251	lbz r10,PACASOFTIRQEN(r13); \
	252	mfspr r11,SPRN_XER; /* save XER in stackframe */ \
	253	std r10,SOFTE(r1); \
	254	std r11,_XER(r1); \
	255	li r9,(n)+1; \
	256	std r9,_TRAP(r1); /* set trap number */ \
	257	li r10,0; \
	258	ld r11,exception_marker@toc(r2); \
	259	std r10,RESULT(r1); /* clear regs->result */ \
cf9efce0 PM	260	std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
cf9efce0 PM	261	ACCOUNT_STOLEN_TIME
f9ff0f30 SR	262
	263	/*
	264	* Exception vectors.
	265	*/
b3e6b5df BH	266	#define STD_EXCEPTION_PSERIES(loc, vec, label) \
b3e6b5df BH	267	. = loc; \
f9ff0f30 SR	268	.globl label##_pSeries; \
	269	label##_pSeries: \
	270	HMT_MEDIUM; \
673b189a	271	SET_SCRATCH0(r13); /* save r13 */ \
b01c8b54	272	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
de56a948	273	EXC_STD, KVMTEST_PR, vec)
f9ff0f30	274
b3e6b5df BH	275	#define STD_EXCEPTION_HV(loc, vec, label) \
	276	. = loc; \
	277	.globl label##_hv; \
	278	label##_hv: \
f9ff0f30	279	HMT_MEDIUM; \
b01c8b54 PM	280	SET_SCRATCH0(r13); /* save r13 */ \
	281	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
	282	EXC_HV, KVMTEST, vec)
f9ff0f30	283
4700dfaf MN	284	#define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
	285	. = loc; \
	286	.globl label##_relon_pSeries; \
	287	label##_relon_pSeries: \
	288	HMT_MEDIUM; \
	289	/* No guest interrupts come through here */ \
	290	SET_SCRATCH0(r13); /* save r13 */ \
	291	EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
	292	EXC_STD, KVMTEST_PR, vec)
	293
	294	#define STD_RELON_EXCEPTION_HV(loc, vec, label) \
	295	. = loc; \
	296	.globl label##_relon_hv; \
	297	label##_relon_hv: \
	298	HMT_MEDIUM; \
	299	/* No guest interrupts come through here */ \
	300	SET_SCRATCH0(r13); /* save r13 */ \
	301	EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
	302	EXC_HV, KVMTEST, vec)
	303
7230c564 BH	304	/* This associate vector numbers with bits in paca->irq_happened */
	305	#define SOFTEN_VALUE_0x500 PACA_IRQ_EE
	306	#define SOFTEN_VALUE_0x502 PACA_IRQ_EE
	307	#define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
	308	#define SOFTEN_VALUE_0x982 PACA_IRQ_DEC
1dbdafec	309	#define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL
655bb3f4 IM	310	#define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
655bb3f4 IM	311	#define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL
7230c564 BH	312
7230c564 BH	313	#define __SOFTEN_TEST(h, vec) \
f9ff0f30	314	lbz r10,PACASOFTIRQEN(r13); \
f9ff0f30	315	cmpwi r10,0; \
7230c564	316	li r10,SOFTEN_VALUE_##vec; \
b01c8b54	317	beq masked_##h##interrupt
7230c564	318	#define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
b01c8b54	319
de56a948 PM	320	#define SOFTEN_TEST_PR(vec) \
de56a948 PM	321	KVMTEST_PR(vec); \
7230c564	322	_SOFTEN_TEST(EXC_STD, vec)
b01c8b54 PM	323
	324	#define SOFTEN_TEST_HV(vec) \
	325	KVMTEST(vec); \
7230c564	326	_SOFTEN_TEST(EXC_HV, vec)
b01c8b54	327
9e368f29 PM	328	#define SOFTEN_TEST_HV_201(vec) \
9e368f29 PM	329	KVMTEST(vec); \
7230c564	330	_SOFTEN_TEST(EXC_STD, vec)
9e368f29	331
4700dfaf MN	332	#define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec)
	333	#define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec)
	334
b01c8b54 PM	335	#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
	336	HMT_MEDIUM; \
	337	SET_SCRATCH0(r13); /* save r13 */ \
	338	__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
	339	EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
	340	#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
	341	__MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
b3e6b5df BH	342
	343	#define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
	344	. = loc; \
	345	.globl label##_pSeries; \
	346	label##_pSeries: \
b01c8b54	347	_MASKABLE_EXCEPTION_PSERIES(vec, label, \
de56a948	348	EXC_STD, SOFTEN_TEST_PR)
b3e6b5df BH	349
	350	#define MASKABLE_EXCEPTION_HV(loc, vec, label) \
	351	. = loc; \
	352	.globl label##_hv; \
	353	label##_hv: \
b01c8b54 PM	354	_MASKABLE_EXCEPTION_PSERIES(vec, label, \
b01c8b54 PM	355	EXC_HV, SOFTEN_TEST_HV)
f9ff0f30	356
4700dfaf MN	357	#define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
	358	HMT_MEDIUM; \
	359	SET_SCRATCH0(r13); /* save r13 */ \
	360	__EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
	361	EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h);
	362	#define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
	363	__MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)
	364
	365	#define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \
	366	. = loc; \
	367	.globl label##_relon_pSeries; \
	368	label##_relon_pSeries: \
	369	_MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
	370	EXC_STD, SOFTEN_NOTEST_PR)
	371
	372	#define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \
	373	. = loc; \
	374	.globl label##_relon_hv; \
	375	label##_relon_hv: \
	376	_MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
	377	EXC_HV, SOFTEN_NOTEST_HV)
	378
1b701179 BH	379	/*
	380	* Our exception common code can be passed various "additions"
	381	* to specify the behaviour of interrupts, whether to kick the
	382	* runlatch, etc...
	383	*/
	384
	385	/* Exception addition: Hard disable interrupts */
7230c564	386	#define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11)
f9ff0f30	387
fe1952fc BH	388	#define ADD_NVGPRS \
	389	bl .save_nvgprs
	390
	391	#define RUNLATCH_ON \
	392	BEGIN_FTR_SECTION \
9778b696	393	CURRENT_THREAD_INFO(r3, r1); \
fe1952fc BH	394	ld r4,TI_LOCAL_FLAGS(r3); \
	395	andi. r0,r4,_TLF_RUNLATCH; \
	396	beql ppc64_runlatch_on_trampoline; \
	397	END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
	398
	399	#define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \
	400	.align 7; \
	401	.globl label##_common; \
	402	label##_common: \
	403	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
	404	additions; \
	405	addi r3,r1,STACK_FRAME_OVERHEAD; \
	406	bl hdlr; \
	407	b ret
	408
	409	#define STD_EXCEPTION_COMMON(trap, label, hdlr) \
	410	EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \
	411	ADD_NVGPRS;DISABLE_INTS)
f9ff0f30 SR	412
	413	/*
	414	* Like STD_EXCEPTION_COMMON, but for exceptions that can occur
7450f6f0 BH	415	* in the idle task and therefore need the special idle handling
7450f6f0 BH	416	* (finish nap and runlatch)
f9ff0f30	417	*/
fe1952fc BH	418	#define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
	419	EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
	420	FINISH_NAP;RUNLATCH_ON;DISABLE_INTS)
f9ff0f30 SR	421
	422	/*
	423	* When the idle code in power4_idle puts the CPU into NAP mode,
	424	* it has to do so in a loop, and relies on the external interrupt
	425	* and decrementer interrupt entry code to get it out of the loop.
	426	* It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
	427	* to signal that it is in the loop and needs help to get out.
	428	*/
	429	#ifdef CONFIG_PPC_970_NAP
	430	#define FINISH_NAP \
	431	BEGIN_FTR_SECTION \
9778b696	432	CURRENT_THREAD_INFO(r11, r1); \
f9ff0f30 SR	433	ld r9,TI_LOCAL_FLAGS(r11); \
	434	andi. r10,r9,_TLF_NAPPING; \
	435	bnel power4_fixup_nap; \
	436	END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
	437	#else
	438	#define FINISH_NAP
	439	#endif
	440
	441	#endif /* _ASM_POWERPC_EXCEPTION_H */