[linux-2.6-block.git] / arch / powerpc / include / asm / exception-64s.h

#ifndef _ASM_POWERPC_EXCEPTION_H
#define _ASM_POWERPC_EXCEPTION_H
/*
 * Extracted from head_64.S
 *
 *  PowerPC version
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
 *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
 *  Adapted for Power Macintosh by Paul Mackerras.
 *  Low-level exception handlers and MMU support
 *  rewritten by Paul Mackerras.
 *    Copyright (C) 1996 Paul Mackerras.
 *
 *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
 *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
 *
 *  This file contains the low-level support and setup for the
 *  PowerPC-64 platform, including trap and interrupt dispatch.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */
/*
 * The following macros define the code that appears as
 * the prologue to each of the exception handlers.  They
 * are split into two parts to allow a single kernel binary
 * to be used for pSeries and iSeries.
 *
 * We make as much of the exception code common between native
 * exception handlers (including pSeries LPAR) and iSeries LPAR
 * implementations as possible.
 */

#define EX_R9		0
#define EX_R10		8
#define EX_R11		16
#define EX_R12		24
#define EX_R13		32
#define EX_SRR0		40
#define EX_DAR		48
#define EX_DSISR	56
#define EX_CCR		60
#define EX_R3		64
#define EX_LR		72

/*
 * We're short on space and time in the exception prolog, so we can't
 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
 * low halfword of the address, but for Kdump we need the whole low
 * word.
 */
#define LOAD_HANDLER(reg, label)					\
	addi	reg,reg,(label)-_stext;	/* virt addr of handler ... */

/* Exception register prefixes */
#define EXC_HV	H
#define EXC_STD

#define __EXCEPTION_PROLOG_1(area, h)					\
	GET_PACA(r13);							\
	std	r9,area+EX_R9(r13);	/* save r9 - r12 */		\
	std	r10,area+EX_R10(r13);					\
	std	r11,area+EX_R11(r13);					\
	std	r12,area+EX_R12(r13);					\
	mfspr	r9,SPRN_SPRG_##h##SCRATCH0;				\
	std	r9,area+EX_R13(r13);					\
	mfcr	r9
#define EXCEPTION_PROLOG_1(area, h) __EXCEPTION_PROLOG_1(area, h)

#define __EXCEPTION_PROLOG_PSERIES_1(label, h)				\
	ld	r12,PACAKBASE(r13);	/* get high part of &label */	\
	ld	r10,PACAKMSR(r13);	/* get MSR value for kernel */	\
	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
	LOAD_HANDLER(r12,label)						\
	mtspr	SPRN_##h##SRR0,r12;					\
	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
	mtspr	SPRN_##h##SRR1,r10;					\
	h##rfid;							\
	b	.	/* prevent speculative execution */
#define EXCEPTION_PROLOG_PSERIES_1(label, h) \
	__EXCEPTION_PROLOG_PSERIES_1(label, h)

#define EXCEPTION_PROLOG_PSERIES(area, label, h)			\
	EXCEPTION_PROLOG_1(area, h);					\
	EXCEPTION_PROLOG_PSERIES_1(label, h);

/*
 * The common exception prolog is used for all except a few exceptions
 * such as a segment miss on a kernel address.  We have to be prepared
 * to take another exception from the point where we first touch the
 * kernel stack onwards.
 *
 * On entry r13 points to the paca, r9-r13 are saved in the paca,
 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
 * SRR1, and relocation is on.
 */
#define EXCEPTION_PROLOG_COMMON(n, area)				   \
	andi.	r10,r12,MSR_PR;		/* See if coming from user	*/ \
	mr	r10,r1;			/* Save r1			*/ \
	subi	r1,r1,INT_FRAME_SIZE;	/* alloc frame on kernel stack	*/ \
	beq-	1f;							   \
	ld	r1,PACAKSAVE(r13);	/* kernel stack to use		*/ \
1:	cmpdi	cr1,r1,0;		/* check if r1 is in userspace	*/ \
	bge-	cr1,2f;			/* abort if it is		*/ \
	b	3f;							   \
2:	li	r1,(n);			/* will be reloaded later	*/ \
	sth	r1,PACA_TRAP_SAVE(r13);					   \
	b	bad_stack;						   \
3:	std	r9,_CCR(r1);		/* save CR in stackframe	*/ \
	std	r11,_NIP(r1);		/* save SRR0 in stackframe	*/ \
	std	r12,_MSR(r1);		/* save SRR1 in stackframe	*/ \
	std	r10,0(r1);		/* make stack chain pointer	*/ \
	std	r0,GPR0(r1);		/* save r0 in stackframe	*/ \
	std	r10,GPR1(r1);		/* save r1 in stackframe	*/ \
	ACCOUNT_CPU_USER_ENTRY(r9, r10);				   \
	std	r2,GPR2(r1);		/* save r2 in stackframe	*/ \
	SAVE_4GPRS(3, r1);		/* save r3 - r6 in stackframe	*/ \
	SAVE_2GPRS(7, r1);		/* save r7, r8 in stackframe	*/ \
	ld	r9,area+EX_R9(r13);	/* move r9, r10 to stackframe	*/ \
	ld	r10,area+EX_R10(r13);					   \
	std	r9,GPR9(r1);						   \
	std	r10,GPR10(r1);						   \
	ld	r9,area+EX_R11(r13);	/* move r11 - r13 to stackframe	*/ \
	ld	r10,area+EX_R12(r13);					   \
	ld	r11,area+EX_R13(r13);					   \
	std	r9,GPR11(r1);						   \
	std	r10,GPR12(r1);						   \
	std	r11,GPR13(r1);						   \
	ld	r2,PACATOC(r13);	/* get kernel TOC into r2	*/ \
	mflr	r9;			/* save LR in stackframe	*/ \
	std	r9,_LINK(r1);						   \
	mfctr	r10;			/* save CTR in stackframe	*/ \
	std	r10,_CTR(r1);						   \
	lbz	r10,PACASOFTIRQEN(r13);				   \
	mfspr	r11,SPRN_XER;		/* save XER in stackframe	*/ \
	std	r10,SOFTE(r1);						   \
	std	r11,_XER(r1);						   \
	li	r9,(n)+1;						   \
	std	r9,_TRAP(r1);		/* set trap number		*/ \
	li	r10,0;							   \
	ld	r11,exception_marker@toc(r2);				   \
	std	r10,RESULT(r1);		/* clear regs->result		*/ \
	std	r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame	*/ \
	ACCOUNT_STOLEN_TIME

/*
 * Exception vectors.
 */
#define STD_EXCEPTION_PSERIES(n, label)			\
	. = n;						\
	.globl label##_pSeries;				\
label##_pSeries:					\
	HMT_MEDIUM;					\
	DO_KVM	n;					\
	mtspr	SPRN_SPRG_SCRATCH0,r13;		/* save r13 */	\
	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_STD)

#define HSTD_EXCEPTION_PSERIES(n, label)		\
	. = n;						\
	.globl label##_pSeries;				\
label##_pSeries:					\
	HMT_MEDIUM;					\
	DO_KVM	n;					\
	mtspr	SPRN_SPRG_HSCRATCH0,r13;/* save r13 */	\
	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_HV)


#define __MASKABLE_EXCEPTION_PSERIES(n, label, h)			\
	HMT_MEDIUM;							\
	DO_KVM	n;							\
	mtspr	SPRN_SPRG_##h##SCRATCH0,r13;    /* save r13 */		\
	GET_PACA(r13);							\
	std	r9,PACA_EXGEN+EX_R9(r13);	/* save r9, r10 */	\
	std	r10,PACA_EXGEN+EX_R10(r13);				\
	lbz	r10,PACASOFTIRQEN(r13);					\
	mfcr	r9;							\
	cmpwi	r10,0;							\
	beq	masked_##h##interrupt;					\
	mfspr	r10,SPRN_SPRG_##h##SCRATCH0;				\
	std	r10,PACA_EXGEN+EX_R13(r13);				\
	std	r11,PACA_EXGEN+EX_R11(r13);				\
	std	r12,PACA_EXGEN+EX_R12(r13);				\
	ld	r12,PACAKBASE(r13);	/* get high part of &label */	\
	ld	r10,PACAKMSR(r13);	/* get MSR value for kernel */	\
	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
	LOAD_HANDLER(r12,label##_common)				\
	mtspr	SPRN_##h##SRR0,r12;					\
	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
	mtspr	SPRN_##h##SRR1,r10;					\
	h##rfid;							\
	b	.	/* prevent speculative execution */
#define MASKABLE_EXCEPTION_PSERIES(n, label, h)				\
	__MASKABLE_EXCEPTION_PSERIES(n, label, h)

#ifdef CONFIG_PPC_ISERIES
#define DISABLE_INTS				\
	li	r11,0;				\
	stb	r11,PACASOFTIRQEN(r13);		\
BEGIN_FW_FTR_SECTION;				\
	stb	r11,PACAHARDIRQEN(r13);		\
END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES);	\
	TRACE_DISABLE_INTS;			\
BEGIN_FW_FTR_SECTION;				\
	mfmsr	r10;				\
	ori	r10,r10,MSR_EE;			\
	mtmsrd	r10,1;				\
END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
#else
#define DISABLE_INTS				\
	li	r11,0;				\
	stb	r11,PACASOFTIRQEN(r13);		\
	stb	r11,PACAHARDIRQEN(r13);		\
	TRACE_DISABLE_INTS
#endif /* CONFIG_PPC_ISERIES */

#define ENABLE_INTS				\
	ld	r12,_MSR(r1);			\
	mfmsr	r11;				\
	rlwimi	r11,r12,0,MSR_EE;		\
	mtmsrd	r11,1

#define STD_EXCEPTION_COMMON(trap, label, hdlr)		\
	.align	7;					\
	.globl label##_common;				\
label##_common:						\
	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);	\
	DISABLE_INTS;					\
	bl	.save_nvgprs;				\
	addi	r3,r1,STACK_FRAME_OVERHEAD;		\
	bl	hdlr;					\
	b	.ret_from_except

/*
 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
 * in the idle task and therefore need the special idle handling.
 */
#define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr)	\
	.align	7;					\
	.globl label##_common;				\
label##_common:						\
	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);	\
	FINISH_NAP;					\
	DISABLE_INTS;					\
	bl	.save_nvgprs;				\
	addi	r3,r1,STACK_FRAME_OVERHEAD;		\
	bl	hdlr;					\
	b	.ret_from_except

#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr)	\
	.align	7;					\
	.globl label##_common;				\
label##_common:						\
	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);	\
	FINISH_NAP;					\
	DISABLE_INTS;					\
BEGIN_FTR_SECTION					\
	bl	.ppc64_runlatch_on;			\
END_FTR_SECTION_IFSET(CPU_FTR_CTRL)			\
	addi	r3,r1,STACK_FRAME_OVERHEAD;		\
	bl	hdlr;					\
	b	.ret_from_except_lite

/*
 * When the idle code in power4_idle puts the CPU into NAP mode,
 * it has to do so in a loop, and relies on the external interrupt
 * and decrementer interrupt entry code to get it out of the loop.
 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
 * to signal that it is in the loop and needs help to get out.
 */
#ifdef CONFIG_PPC_970_NAP
#define FINISH_NAP				\
BEGIN_FTR_SECTION				\
	clrrdi	r11,r1,THREAD_SHIFT;		\
	ld	r9,TI_LOCAL_FLAGS(r11);		\
	andi.	r10,r9,_TLF_NAPPING;		\
	bnel	power4_fixup_nap;		\
END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
#else
#define FINISH_NAP
#endif

#endif	/* _ASM_POWERPC_EXCEPTION_H */
Commit	Line	Data
f9ff0f30 SR	1	#ifndef _ASM_POWERPC_EXCEPTION_H
	2	#define _ASM_POWERPC_EXCEPTION_H
	3	/*
	4	* Extracted from head_64.S
	5	*
	6	* PowerPC version
	7	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
	8	*
	9	* Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
	10	* Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
	11	* Adapted for Power Macintosh by Paul Mackerras.
	12	* Low-level exception handlers and MMU support
	13	* rewritten by Paul Mackerras.
	14	* Copyright (C) 1996 Paul Mackerras.
	15	*
	16	* Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
	17	* Mike Corrigan {engebret\|bergner\|mikejc}@us.ibm.com
	18	*
	19	* This file contains the low-level support and setup for the
	20	* PowerPC-64 platform, including trap and interrupt dispatch.
	21	*
	22	* This program is free software; you can redistribute it and/or
	23	* modify it under the terms of the GNU General Public License
	24	* as published by the Free Software Foundation; either version
	25	* 2 of the License, or (at your option) any later version.
	26	*/
	27	/*
	28	* The following macros define the code that appears as
	29	* the prologue to each of the exception handlers. They
	30	* are split into two parts to allow a single kernel binary
	31	* to be used for pSeries and iSeries.
	32	*
	33	* We make as much of the exception code common between native
	34	* exception handlers (including pSeries LPAR) and iSeries LPAR
	35	* implementations as possible.
	36	*/
	37
	38	#define EX_R9 0
	39	#define EX_R10 8
	40	#define EX_R11 16
	41	#define EX_R12 24
	42	#define EX_R13 32
	43	#define EX_SRR0 40
	44	#define EX_DAR 48
	45	#define EX_DSISR 56
	46	#define EX_CCR 60
	47	#define EX_R3 64
	48	#define EX_LR 72
	49
	50	/*
	51	* We're short on space and time in the exception prolog, so we can't
	52	* use the normal SET_REG_IMMEDIATE macro. Normally we just need the
	53	* low halfword of the address, but for Kdump we need the whole low
	54	* word.
	55	*/
f9ff0f30	56	#define LOAD_HANDLER(reg, label) \
1f6a93e4	57	addi reg,reg,(label)-_stext; /* virt addr of handler ... */
f9ff0f30	58
a5d4f3ad BH	59	/* Exception register prefixes */
	60	#define EXC_HV H
	61	#define EXC_STD
	62
	63	#define __EXCEPTION_PROLOG_1(area, h) \
2dd60d79	64	GET_PACA(r13); \
7180e3e6 SR	65	std r9,area+EX_R9(r13); /* save r9 - r12 */ \
	66	std r10,area+EX_R10(r13); \
	67	std r11,area+EX_R11(r13); \
	68	std r12,area+EX_R12(r13); \
a5d4f3ad	69	mfspr r9,SPRN_SPRG_##h##SCRATCH0; \
7180e3e6 SR	70	std r9,area+EX_R13(r13); \
7180e3e6 SR	71	mfcr r9
a5d4f3ad	72	#define EXCEPTION_PROLOG_1(area, h) __EXCEPTION_PROLOG_1(area, h)
7180e3e6	73
a5d4f3ad	74	#define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
1f6a93e4 PM	75	ld r12,PACAKBASE(r13); /* get high part of &label */ \
1f6a93e4 PM	76	ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
a5d4f3ad	77	mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
f9ff0f30	78	LOAD_HANDLER(r12,label) \
a5d4f3ad BH	79	mtspr SPRN_##h##SRR0,r12; \
	80	mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
	81	mtspr SPRN_##h##SRR1,r10; \
	82	h##rfid; \
f9ff0f30	83	b . /* prevent speculative execution */
a5d4f3ad BH	84	#define EXCEPTION_PROLOG_PSERIES_1(label, h) \
a5d4f3ad BH	85	__EXCEPTION_PROLOG_PSERIES_1(label, h)
f9ff0f30	86
a5d4f3ad BH	87	#define EXCEPTION_PROLOG_PSERIES(area, label, h) \
	88	EXCEPTION_PROLOG_1(area, h); \
	89	EXCEPTION_PROLOG_PSERIES_1(label, h);
c5a8c0c9	90
f9ff0f30 SR	91	/*
	92	* The common exception prolog is used for all except a few exceptions
	93	* such as a segment miss on a kernel address. We have to be prepared
	94	* to take another exception from the point where we first touch the
	95	* kernel stack onwards.
	96	*
	97	* On entry r13 points to the paca, r9-r13 are saved in the paca,
	98	* r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
	99	* SRR1, and relocation is on.
	100	*/
	101	#define EXCEPTION_PROLOG_COMMON(n, area) \
	102	andi. r10,r12,MSR_PR; /* See if coming from user */ \
	103	mr r10,r1; /* Save r1 */ \
	104	subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
	105	beq- 1f; \
	106	ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
	107	1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
	108	bge- cr1,2f; /* abort if it is */ \
	109	b 3f; \
	110	2: li r1,(n); /* will be reloaded later */ \
	111	sth r1,PACA_TRAP_SAVE(r13); \
	112	b bad_stack; \
	113	3: std r9,_CCR(r1); /* save CR in stackframe */ \
	114	std r11,_NIP(r1); /* save SRR0 in stackframe */ \
	115	std r12,_MSR(r1); /* save SRR1 in stackframe */ \
	116	std r10,0(r1); /* make stack chain pointer */ \
	117	std r0,GPR0(r1); /* save r0 in stackframe */ \
	118	std r10,GPR1(r1); /* save r1 in stackframe */ \
	119	ACCOUNT_CPU_USER_ENTRY(r9, r10); \
	120	std r2,GPR2(r1); /* save r2 in stackframe */ \
	121	SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
	122	SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
	123	ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
	124	ld r10,area+EX_R10(r13); \
	125	std r9,GPR9(r1); \
	126	std r10,GPR10(r1); \
	127	ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
	128	ld r10,area+EX_R12(r13); \
	129	ld r11,area+EX_R13(r13); \
	130	std r9,GPR11(r1); \
	131	std r10,GPR12(r1); \
	132	std r11,GPR13(r1); \
	133	ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
	134	mflr r9; /* save LR in stackframe */ \
	135	std r9,_LINK(r1); \
	136	mfctr r10; /* save CTR in stackframe */ \
	137	std r10,_CTR(r1); \
	138	lbz r10,PACASOFTIRQEN(r13); \
	139	mfspr r11,SPRN_XER; /* save XER in stackframe */ \
	140	std r10,SOFTE(r1); \
	141	std r11,_XER(r1); \
	142	li r9,(n)+1; \
	143	std r9,_TRAP(r1); /* set trap number */ \
	144	li r10,0; \
	145	ld r11,exception_marker@toc(r2); \
	146	std r10,RESULT(r1); /* clear regs->result */ \
cf9efce0 PM	147	std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
cf9efce0 PM	148	ACCOUNT_STOLEN_TIME
f9ff0f30 SR	149
	150	/*
	151	* Exception vectors.
	152	*/
	153	#define STD_EXCEPTION_PSERIES(n, label) \
	154	. = n; \
	155	.globl label##_pSeries; \
	156	label##_pSeries: \
	157	HMT_MEDIUM; \
842f2fed	158	DO_KVM n; \
ee43eb78	159	mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \
a5d4f3ad	160	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_STD)
f9ff0f30 SR	161
	162	#define HSTD_EXCEPTION_PSERIES(n, label) \
	163	. = n; \
	164	.globl label##_pSeries; \
	165	label##_pSeries: \
	166	HMT_MEDIUM; \
a5d4f3ad BH	167	DO_KVM n; \
	168	mtspr SPRN_SPRG_HSCRATCH0,r13;/* save r13 */ \
	169	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_HV)
f9ff0f30 SR	170
f9ff0f30 SR	171
a5d4f3ad	172	#define __MASKABLE_EXCEPTION_PSERIES(n, label, h) \
f9ff0f30	173	HMT_MEDIUM; \
842f2fed	174	DO_KVM n; \
a5d4f3ad	175	mtspr SPRN_SPRG_##h##SCRATCH0,r13; /* save r13 */ \
2dd60d79	176	GET_PACA(r13); \
f9ff0f30 SR	177	std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \
	178	std r10,PACA_EXGEN+EX_R10(r13); \
	179	lbz r10,PACASOFTIRQEN(r13); \
	180	mfcr r9; \
	181	cmpwi r10,0; \
a5d4f3ad BH	182	beq masked_##h##interrupt; \
a5d4f3ad BH	183	mfspr r10,SPRN_SPRG_##h##SCRATCH0; \
f9ff0f30 SR	184	std r10,PACA_EXGEN+EX_R13(r13); \
	185	std r11,PACA_EXGEN+EX_R11(r13); \
	186	std r12,PACA_EXGEN+EX_R12(r13); \
1f6a93e4 PM	187	ld r12,PACAKBASE(r13); /* get high part of &label */ \
1f6a93e4 PM	188	ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
a5d4f3ad	189	mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
f9ff0f30	190	LOAD_HANDLER(r12,label##_common) \
a5d4f3ad BH	191	mtspr SPRN_##h##SRR0,r12; \
	192	mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
	193	mtspr SPRN_##h##SRR1,r10; \
	194	h##rfid; \
f9ff0f30	195	b . /* prevent speculative execution */
a5d4f3ad BH	196	#define MASKABLE_EXCEPTION_PSERIES(n, label, h) \
a5d4f3ad BH	197	__MASKABLE_EXCEPTION_PSERIES(n, label, h)
f9ff0f30	198
f9ff0f30 SR	199	#ifdef CONFIG_PPC_ISERIES
	200	#define DISABLE_INTS \
	201	li r11,0; \
	202	stb r11,PACASOFTIRQEN(r13); \
	203	BEGIN_FW_FTR_SECTION; \
	204	stb r11,PACAHARDIRQEN(r13); \
	205	END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \
945feb17	206	TRACE_DISABLE_INTS; \
f9ff0f30 SR	207	BEGIN_FW_FTR_SECTION; \
	208	mfmsr r10; \
	209	ori r10,r10,MSR_EE; \
	210	mtmsrd r10,1; \
	211	END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
f9ff0f30 SR	212	#else
	213	#define DISABLE_INTS \
	214	li r11,0; \
	215	stb r11,PACASOFTIRQEN(r13); \
945feb17 BH	216	stb r11,PACAHARDIRQEN(r13); \
945feb17 BH	217	TRACE_DISABLE_INTS
f9ff0f30 SR	218	#endif /* CONFIG_PPC_ISERIES */
	219
	220	#define ENABLE_INTS \
	221	ld r12,_MSR(r1); \
	222	mfmsr r11; \
	223	rlwimi r11,r12,0,MSR_EE; \
	224	mtmsrd r11,1
	225
	226	#define STD_EXCEPTION_COMMON(trap, label, hdlr) \
	227	.align 7; \
	228	.globl label##_common; \
	229	label##_common: \
	230	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
	231	DISABLE_INTS; \
	232	bl .save_nvgprs; \
	233	addi r3,r1,STACK_FRAME_OVERHEAD; \
	234	bl hdlr; \
	235	b .ret_from_except
	236
	237	/*
	238	* Like STD_EXCEPTION_COMMON, but for exceptions that can occur
	239	* in the idle task and therefore need the special idle handling.
	240	*/
	241	#define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr) \
	242	.align 7; \
	243	.globl label##_common; \
	244	label##_common: \
	245	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
	246	FINISH_NAP; \
	247	DISABLE_INTS; \
	248	bl .save_nvgprs; \
	249	addi r3,r1,STACK_FRAME_OVERHEAD; \
	250	bl hdlr; \
	251	b .ret_from_except
	252
	253	#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \
	254	.align 7; \
	255	.globl label##_common; \
	256	label##_common: \
	257	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
	258	FINISH_NAP; \
	259	DISABLE_INTS; \
a416561b	260	BEGIN_FTR_SECTION \
f9ff0f30	261	bl .ppc64_runlatch_on; \
a416561b	262	END_FTR_SECTION_IFSET(CPU_FTR_CTRL) \
f9ff0f30 SR	263	addi r3,r1,STACK_FRAME_OVERHEAD; \
	264	bl hdlr; \
	265	b .ret_from_except_lite
	266
	267	/*
	268	* When the idle code in power4_idle puts the CPU into NAP mode,
	269	* it has to do so in a loop, and relies on the external interrupt
	270	* and decrementer interrupt entry code to get it out of the loop.
	271	* It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
	272	* to signal that it is in the loop and needs help to get out.
	273	*/
	274	#ifdef CONFIG_PPC_970_NAP
	275	#define FINISH_NAP \
	276	BEGIN_FTR_SECTION \
	277	clrrdi r11,r1,THREAD_SHIFT; \
	278	ld r9,TI_LOCAL_FLAGS(r11); \
	279	andi. r10,r9,_TLF_NAPPING; \
	280	bnel power4_fixup_nap; \
	281	END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
	282	#else
	283	#define FINISH_NAP
	284	#endif
	285
	286	#endif /* _ASM_POWERPC_EXCEPTION_H */