[linux-2.6-block.git] / arch / powerpc / include / asm / exception-64s.h

#ifndef _ASM_POWERPC_EXCEPTION_H
#define _ASM_POWERPC_EXCEPTION_H
/*
 * Extracted from head_64.S
 *
 *  PowerPC version
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
 *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
 *  Adapted for Power Macintosh by Paul Mackerras.
 *  Low-level exception handlers and MMU support
 *  rewritten by Paul Mackerras.
 *    Copyright (C) 1996 Paul Mackerras.
 *
 *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
 *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
 *
 *  This file contains the low-level support and setup for the
 *  PowerPC-64 platform, including trap and interrupt dispatch.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */
/*
 * The following macros define the code that appears as
 * the prologue to each of the exception handlers.  They
 * are split into two parts to allow a single kernel binary
 * to be used for pSeries and iSeries.
 *
 * We make as much of the exception code common between native
 * exception handlers (including pSeries LPAR) and iSeries LPAR
 * implementations as possible.
 */

#define EX_R9		0
#define EX_R10		8
#define EX_R11		16
#define EX_R12		24
#define EX_R13		32
#define EX_SRR0		40
#define EX_DAR		48
#define EX_DSISR	56
#define EX_CCR		60
#define EX_R3		64
#define EX_LR		72

/*
 * We're short on space and time in the exception prolog, so we can't
 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
 * low halfword of the address, but for Kdump we need the whole low
 * word.
 */
#define LOAD_HANDLER(reg, label)					\
	addi	reg,reg,(label)-_stext;	/* virt addr of handler ... */

/* Exception register prefixes */
#define EXC_HV	H
#define EXC_STD

#define EXCEPTION_PROLOG_1(area)					\
	GET_PACA(r13);							\
	std	r9,area+EX_R9(r13);	/* save r9 - r12 */		\
	std	r10,area+EX_R10(r13);					\
	std	r11,area+EX_R11(r13);					\
	std	r12,area+EX_R12(r13);					\
	GET_SCRATCH0(r9);						\
	std	r9,area+EX_R13(r13);					\
	mfcr	r9

#define __EXCEPTION_PROLOG_PSERIES_1(label, h)				\
	ld	r12,PACAKBASE(r13);	/* get high part of &label */	\
	ld	r10,PACAKMSR(r13);	/* get MSR value for kernel */	\
	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
	LOAD_HANDLER(r12,label)						\
	mtspr	SPRN_##h##SRR0,r12;					\
	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
	mtspr	SPRN_##h##SRR1,r10;					\
	h##rfid;							\
	b	.	/* prevent speculative execution */
#define EXCEPTION_PROLOG_PSERIES_1(label, h) \
	__EXCEPTION_PROLOG_PSERIES_1(label, h)

#define EXCEPTION_PROLOG_PSERIES(area, label, h)			\
	EXCEPTION_PROLOG_1(area);					\
	EXCEPTION_PROLOG_PSERIES_1(label, h);

/*
 * The common exception prolog is used for all except a few exceptions
 * such as a segment miss on a kernel address.  We have to be prepared
 * to take another exception from the point where we first touch the
 * kernel stack onwards.
 *
 * On entry r13 points to the paca, r9-r13 are saved in the paca,
 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
 * SRR1, and relocation is on.
 */
#define EXCEPTION_PROLOG_COMMON(n, area)				   \
	andi.	r10,r12,MSR_PR;		/* See if coming from user	*/ \
	mr	r10,r1;			/* Save r1			*/ \
	subi	r1,r1,INT_FRAME_SIZE;	/* alloc frame on kernel stack	*/ \
	beq-	1f;							   \
	ld	r1,PACAKSAVE(r13);	/* kernel stack to use		*/ \
1:	cmpdi	cr1,r1,0;		/* check if r1 is in userspace	*/ \
	bge-	cr1,2f;			/* abort if it is		*/ \
	b	3f;							   \
2:	li	r1,(n);			/* will be reloaded later	*/ \
	sth	r1,PACA_TRAP_SAVE(r13);					   \
	b	bad_stack;						   \
3:	std	r9,_CCR(r1);		/* save CR in stackframe	*/ \
	std	r11,_NIP(r1);		/* save SRR0 in stackframe	*/ \
	std	r12,_MSR(r1);		/* save SRR1 in stackframe	*/ \
	std	r10,0(r1);		/* make stack chain pointer	*/ \
	std	r0,GPR0(r1);		/* save r0 in stackframe	*/ \
	std	r10,GPR1(r1);		/* save r1 in stackframe	*/ \
	ACCOUNT_CPU_USER_ENTRY(r9, r10);				   \
	std	r2,GPR2(r1);		/* save r2 in stackframe	*/ \
	SAVE_4GPRS(3, r1);		/* save r3 - r6 in stackframe	*/ \
	SAVE_2GPRS(7, r1);		/* save r7, r8 in stackframe	*/ \
	ld	r9,area+EX_R9(r13);	/* move r9, r10 to stackframe	*/ \
	ld	r10,area+EX_R10(r13);					   \
	std	r9,GPR9(r1);						   \
	std	r10,GPR10(r1);						   \
	ld	r9,area+EX_R11(r13);	/* move r11 - r13 to stackframe	*/ \
	ld	r10,area+EX_R12(r13);					   \
	ld	r11,area+EX_R13(r13);					   \
	std	r9,GPR11(r1);						   \
	std	r10,GPR12(r1);						   \
	std	r11,GPR13(r1);						   \
	ld	r2,PACATOC(r13);	/* get kernel TOC into r2	*/ \
	mflr	r9;			/* save LR in stackframe	*/ \
	std	r9,_LINK(r1);						   \
	mfctr	r10;			/* save CTR in stackframe	*/ \
	std	r10,_CTR(r1);						   \
	lbz	r10,PACASOFTIRQEN(r13);				   \
	mfspr	r11,SPRN_XER;		/* save XER in stackframe	*/ \
	std	r10,SOFTE(r1);						   \
	std	r11,_XER(r1);						   \
	li	r9,(n)+1;						   \
	std	r9,_TRAP(r1);		/* set trap number		*/ \
	li	r10,0;							   \
	ld	r11,exception_marker@toc(r2);				   \
	std	r10,RESULT(r1);		/* clear regs->result		*/ \
	std	r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame	*/ \
	ACCOUNT_STOLEN_TIME

/*
 * Exception vectors.
 */
#define STD_EXCEPTION_PSERIES(loc, vec, label)		\
	. = loc;					\
	.globl label##_pSeries;				\
label##_pSeries:					\
	HMT_MEDIUM;					\
	DO_KVM	vec;					\
	SET_SCRATCH0(r13);		/* save r13 */		\
	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_STD)

#define STD_EXCEPTION_HV(loc, vec, label)		\
	. = loc;					\
	.globl label##_hv;				\
label##_hv:						\
	HMT_MEDIUM;					\
	DO_KVM	vec;					\
	SET_SCRATCH0(r13);	/* save r13 */		\
	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_HV)

#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h)			\
	HMT_MEDIUM;							\
	DO_KVM	vec;							\
	SET_SCRATCH0(r13);    /* save r13 */				\
	GET_PACA(r13);							\
	std	r9,PACA_EXGEN+EX_R9(r13);	/* save r9, r10 */	\
	std	r10,PACA_EXGEN+EX_R10(r13);				\
	lbz	r10,PACASOFTIRQEN(r13);					\
	mfcr	r9;							\
	cmpwi	r10,0;							\
	beq	masked_##h##interrupt;					\
	GET_SCRATCH0(r10);						\
	std	r10,PACA_EXGEN+EX_R13(r13);				\
	std	r11,PACA_EXGEN+EX_R11(r13);				\
	std	r12,PACA_EXGEN+EX_R12(r13);				\
	ld	r12,PACAKBASE(r13);	/* get high part of &label */	\
	ld	r10,PACAKMSR(r13);	/* get MSR value for kernel */	\
	mfspr	r11,SPRN_##h##SRR0;	/* save SRR0 */			\
	LOAD_HANDLER(r12,label##_common)				\
	mtspr	SPRN_##h##SRR0,r12;					\
	mfspr	r12,SPRN_##h##SRR1;	/* and SRR1 */			\
	mtspr	SPRN_##h##SRR1,r10;					\
	h##rfid;							\
	b	.	/* prevent speculative execution */
#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h)			\
	__MASKABLE_EXCEPTION_PSERIES(vec, label, h)

#define MASKABLE_EXCEPTION_PSERIES(loc, vec, label)			\
	. = loc;							\
	.globl label##_pSeries;						\
label##_pSeries:							\
	_MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_STD)

#define MASKABLE_EXCEPTION_HV(loc, vec, label)				\
	. = loc;							\
	.globl label##_hv;						\
label##_hv:								\
	_MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_HV)

#ifdef CONFIG_PPC_ISERIES
#define DISABLE_INTS				\
	li	r11,0;				\
	stb	r11,PACASOFTIRQEN(r13);		\
BEGIN_FW_FTR_SECTION;				\
	stb	r11,PACAHARDIRQEN(r13);		\
END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES);	\
	TRACE_DISABLE_INTS;			\
BEGIN_FW_FTR_SECTION;				\
	mfmsr	r10;				\
	ori	r10,r10,MSR_EE;			\
	mtmsrd	r10,1;				\
END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
#else
#define DISABLE_INTS				\
	li	r11,0;				\
	stb	r11,PACASOFTIRQEN(r13);		\
	stb	r11,PACAHARDIRQEN(r13);		\
	TRACE_DISABLE_INTS
#endif /* CONFIG_PPC_ISERIES */

#define ENABLE_INTS				\
	ld	r12,_MSR(r1);			\
	mfmsr	r11;				\
	rlwimi	r11,r12,0,MSR_EE;		\
	mtmsrd	r11,1

#define STD_EXCEPTION_COMMON(trap, label, hdlr)		\
	.align	7;					\
	.globl label##_common;				\
label##_common:						\
	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);	\
	DISABLE_INTS;					\
	bl	.save_nvgprs;				\
	addi	r3,r1,STACK_FRAME_OVERHEAD;		\
	bl	hdlr;					\
	b	.ret_from_except

/*
 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
 * in the idle task and therefore need the special idle handling.
 */
#define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr)	\
	.align	7;					\
	.globl label##_common;				\
label##_common:						\
	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);	\
	FINISH_NAP;					\
	DISABLE_INTS;					\
	bl	.save_nvgprs;				\
	addi	r3,r1,STACK_FRAME_OVERHEAD;		\
	bl	hdlr;					\
	b	.ret_from_except

#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr)	\
	.align	7;					\
	.globl label##_common;				\
label##_common:						\
	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN);	\
	FINISH_NAP;					\
	DISABLE_INTS;					\
BEGIN_FTR_SECTION					\
	bl	.ppc64_runlatch_on;			\
END_FTR_SECTION_IFSET(CPU_FTR_CTRL)			\
	addi	r3,r1,STACK_FRAME_OVERHEAD;		\
	bl	hdlr;					\
	b	.ret_from_except_lite

/*
 * When the idle code in power4_idle puts the CPU into NAP mode,
 * it has to do so in a loop, and relies on the external interrupt
 * and decrementer interrupt entry code to get it out of the loop.
 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
 * to signal that it is in the loop and needs help to get out.
 */
#ifdef CONFIG_PPC_970_NAP
#define FINISH_NAP				\
BEGIN_FTR_SECTION				\
	clrrdi	r11,r1,THREAD_SHIFT;		\
	ld	r9,TI_LOCAL_FLAGS(r11);		\
	andi.	r10,r9,_TLF_NAPPING;		\
	bnel	power4_fixup_nap;		\
END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
#else
#define FINISH_NAP
#endif

#endif	/* _ASM_POWERPC_EXCEPTION_H */
Commit	Line	Data
f9ff0f30 SR	1	#ifndef _ASM_POWERPC_EXCEPTION_H
	2	#define _ASM_POWERPC_EXCEPTION_H
	3	/*
	4	* Extracted from head_64.S
	5	*
	6	* PowerPC version
	7	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
	8	*
	9	* Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
	10	* Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
	11	* Adapted for Power Macintosh by Paul Mackerras.
	12	* Low-level exception handlers and MMU support
	13	* rewritten by Paul Mackerras.
	14	* Copyright (C) 1996 Paul Mackerras.
	15	*
	16	* Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
	17	* Mike Corrigan {engebret\|bergner\|mikejc}@us.ibm.com
	18	*
	19	* This file contains the low-level support and setup for the
	20	* PowerPC-64 platform, including trap and interrupt dispatch.
	21	*
	22	* This program is free software; you can redistribute it and/or
	23	* modify it under the terms of the GNU General Public License
	24	* as published by the Free Software Foundation; either version
	25	* 2 of the License, or (at your option) any later version.
	26	*/
	27	/*
	28	* The following macros define the code that appears as
	29	* the prologue to each of the exception handlers. They
	30	* are split into two parts to allow a single kernel binary
	31	* to be used for pSeries and iSeries.
	32	*
	33	* We make as much of the exception code common between native
	34	* exception handlers (including pSeries LPAR) and iSeries LPAR
	35	* implementations as possible.
	36	*/
	37
	38	#define EX_R9 0
	39	#define EX_R10 8
	40	#define EX_R11 16
	41	#define EX_R12 24
	42	#define EX_R13 32
	43	#define EX_SRR0 40
	44	#define EX_DAR 48
	45	#define EX_DSISR 56
	46	#define EX_CCR 60
	47	#define EX_R3 64
	48	#define EX_LR 72
	49
	50	/*
	51	* We're short on space and time in the exception prolog, so we can't
	52	* use the normal SET_REG_IMMEDIATE macro. Normally we just need the
	53	* low halfword of the address, but for Kdump we need the whole low
	54	* word.
	55	*/
f9ff0f30	56	#define LOAD_HANDLER(reg, label) \
1f6a93e4	57	addi reg,reg,(label)-_stext; /* virt addr of handler ... */
f9ff0f30	58
a5d4f3ad BH	59	/* Exception register prefixes */
	60	#define EXC_HV H
	61	#define EXC_STD
	62
673b189a	63	#define EXCEPTION_PROLOG_1(area) \
2dd60d79	64	GET_PACA(r13); \
7180e3e6 SR	65	std r9,area+EX_R9(r13); /* save r9 - r12 */ \
	66	std r10,area+EX_R10(r13); \
	67	std r11,area+EX_R11(r13); \
	68	std r12,area+EX_R12(r13); \
673b189a	69	GET_SCRATCH0(r9); \
7180e3e6 SR	70	std r9,area+EX_R13(r13); \
	71	mfcr r9
	72
a5d4f3ad	73	#define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
1f6a93e4 PM	74	ld r12,PACAKBASE(r13); /* get high part of &label */ \
1f6a93e4 PM	75	ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
a5d4f3ad	76	mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
f9ff0f30	77	LOAD_HANDLER(r12,label) \
a5d4f3ad BH	78	mtspr SPRN_##h##SRR0,r12; \
	79	mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
	80	mtspr SPRN_##h##SRR1,r10; \
	81	h##rfid; \
f9ff0f30	82	b . /* prevent speculative execution */
a5d4f3ad BH	83	#define EXCEPTION_PROLOG_PSERIES_1(label, h) \
a5d4f3ad BH	84	__EXCEPTION_PROLOG_PSERIES_1(label, h)
f9ff0f30	85
a5d4f3ad	86	#define EXCEPTION_PROLOG_PSERIES(area, label, h) \
673b189a	87	EXCEPTION_PROLOG_1(area); \
a5d4f3ad	88	EXCEPTION_PROLOG_PSERIES_1(label, h);
c5a8c0c9	89
f9ff0f30 SR	90	/*
	91	* The common exception prolog is used for all except a few exceptions
	92	* such as a segment miss on a kernel address. We have to be prepared
	93	* to take another exception from the point where we first touch the
	94	* kernel stack onwards.
	95	*
	96	* On entry r13 points to the paca, r9-r13 are saved in the paca,
	97	* r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
	98	* SRR1, and relocation is on.
	99	*/
	100	#define EXCEPTION_PROLOG_COMMON(n, area) \
	101	andi. r10,r12,MSR_PR; /* See if coming from user */ \
	102	mr r10,r1; /* Save r1 */ \
	103	subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
	104	beq- 1f; \
	105	ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
	106	1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
	107	bge- cr1,2f; /* abort if it is */ \
	108	b 3f; \
	109	2: li r1,(n); /* will be reloaded later */ \
	110	sth r1,PACA_TRAP_SAVE(r13); \
	111	b bad_stack; \
	112	3: std r9,_CCR(r1); /* save CR in stackframe */ \
	113	std r11,_NIP(r1); /* save SRR0 in stackframe */ \
	114	std r12,_MSR(r1); /* save SRR1 in stackframe */ \
	115	std r10,0(r1); /* make stack chain pointer */ \
	116	std r0,GPR0(r1); /* save r0 in stackframe */ \
	117	std r10,GPR1(r1); /* save r1 in stackframe */ \
	118	ACCOUNT_CPU_USER_ENTRY(r9, r10); \
	119	std r2,GPR2(r1); /* save r2 in stackframe */ \
	120	SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
	121	SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
	122	ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
	123	ld r10,area+EX_R10(r13); \
	124	std r9,GPR9(r1); \
	125	std r10,GPR10(r1); \
	126	ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
	127	ld r10,area+EX_R12(r13); \
	128	ld r11,area+EX_R13(r13); \
	129	std r9,GPR11(r1); \
	130	std r10,GPR12(r1); \
	131	std r11,GPR13(r1); \
	132	ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
	133	mflr r9; /* save LR in stackframe */ \
	134	std r9,_LINK(r1); \
	135	mfctr r10; /* save CTR in stackframe */ \
	136	std r10,_CTR(r1); \
	137	lbz r10,PACASOFTIRQEN(r13); \
	138	mfspr r11,SPRN_XER; /* save XER in stackframe */ \
	139	std r10,SOFTE(r1); \
	140	std r11,_XER(r1); \
	141	li r9,(n)+1; \
	142	std r9,_TRAP(r1); /* set trap number */ \
	143	li r10,0; \
	144	ld r11,exception_marker@toc(r2); \
	145	std r10,RESULT(r1); /* clear regs->result */ \
cf9efce0 PM	146	std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
cf9efce0 PM	147	ACCOUNT_STOLEN_TIME
f9ff0f30 SR	148
	149	/*
	150	* Exception vectors.
	151	*/
b3e6b5df BH	152	#define STD_EXCEPTION_PSERIES(loc, vec, label) \
b3e6b5df BH	153	. = loc; \
f9ff0f30 SR	154	.globl label##_pSeries; \
	155	label##_pSeries: \
	156	HMT_MEDIUM; \
b3e6b5df	157	DO_KVM vec; \
673b189a	158	SET_SCRATCH0(r13); /* save r13 */ \
a5d4f3ad	159	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_STD)
f9ff0f30	160
b3e6b5df BH	161	#define STD_EXCEPTION_HV(loc, vec, label) \
	162	. = loc; \
	163	.globl label##_hv; \
	164	label##_hv: \
f9ff0f30	165	HMT_MEDIUM; \
b3e6b5df	166	DO_KVM vec; \
673b189a	167	SET_SCRATCH0(r13); /* save r13 */ \
a5d4f3ad	168	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_HV)
f9ff0f30	169
b3e6b5df	170	#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h) \
f9ff0f30	171	HMT_MEDIUM; \
b3e6b5df	172	DO_KVM vec; \
673b189a	173	SET_SCRATCH0(r13); /* save r13 */ \
2dd60d79	174	GET_PACA(r13); \
f9ff0f30 SR	175	std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \
	176	std r10,PACA_EXGEN+EX_R10(r13); \
	177	lbz r10,PACASOFTIRQEN(r13); \
	178	mfcr r9; \
	179	cmpwi r10,0; \
a5d4f3ad	180	beq masked_##h##interrupt; \
673b189a	181	GET_SCRATCH0(r10); \
f9ff0f30 SR	182	std r10,PACA_EXGEN+EX_R13(r13); \
	183	std r11,PACA_EXGEN+EX_R11(r13); \
	184	std r12,PACA_EXGEN+EX_R12(r13); \
1f6a93e4 PM	185	ld r12,PACAKBASE(r13); /* get high part of &label */ \
1f6a93e4 PM	186	ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
a5d4f3ad	187	mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
f9ff0f30	188	LOAD_HANDLER(r12,label##_common) \
a5d4f3ad BH	189	mtspr SPRN_##h##SRR0,r12; \
	190	mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
	191	mtspr SPRN_##h##SRR1,r10; \
	192	h##rfid; \
f9ff0f30	193	b . /* prevent speculative execution */
b3e6b5df BH	194	#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h) \
	195	__MASKABLE_EXCEPTION_PSERIES(vec, label, h)
	196
	197	#define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
	198	. = loc; \
	199	.globl label##_pSeries; \
	200	label##_pSeries: \
	201	_MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_STD)
	202
	203	#define MASKABLE_EXCEPTION_HV(loc, vec, label) \
	204	. = loc; \
	205	.globl label##_hv; \
	206	label##_hv: \
	207	_MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_HV)
f9ff0f30	208
f9ff0f30 SR	209	#ifdef CONFIG_PPC_ISERIES
	210	#define DISABLE_INTS \
	211	li r11,0; \
	212	stb r11,PACASOFTIRQEN(r13); \
	213	BEGIN_FW_FTR_SECTION; \
	214	stb r11,PACAHARDIRQEN(r13); \
	215	END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \
945feb17	216	TRACE_DISABLE_INTS; \
f9ff0f30 SR	217	BEGIN_FW_FTR_SECTION; \
	218	mfmsr r10; \
	219	ori r10,r10,MSR_EE; \
	220	mtmsrd r10,1; \
	221	END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
f9ff0f30 SR	222	#else
	223	#define DISABLE_INTS \
	224	li r11,0; \
	225	stb r11,PACASOFTIRQEN(r13); \
945feb17 BH	226	stb r11,PACAHARDIRQEN(r13); \
945feb17 BH	227	TRACE_DISABLE_INTS
f9ff0f30 SR	228	#endif /* CONFIG_PPC_ISERIES */
	229
	230	#define ENABLE_INTS \
	231	ld r12,_MSR(r1); \
	232	mfmsr r11; \
	233	rlwimi r11,r12,0,MSR_EE; \
	234	mtmsrd r11,1
	235
	236	#define STD_EXCEPTION_COMMON(trap, label, hdlr) \
	237	.align 7; \
	238	.globl label##_common; \
	239	label##_common: \
	240	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
	241	DISABLE_INTS; \
	242	bl .save_nvgprs; \
	243	addi r3,r1,STACK_FRAME_OVERHEAD; \
	244	bl hdlr; \
	245	b .ret_from_except
	246
	247	/*
	248	* Like STD_EXCEPTION_COMMON, but for exceptions that can occur
	249	* in the idle task and therefore need the special idle handling.
	250	*/
	251	#define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr) \
	252	.align 7; \
	253	.globl label##_common; \
	254	label##_common: \
	255	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
	256	FINISH_NAP; \
	257	DISABLE_INTS; \
	258	bl .save_nvgprs; \
	259	addi r3,r1,STACK_FRAME_OVERHEAD; \
	260	bl hdlr; \
	261	b .ret_from_except
	262
	263	#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \
	264	.align 7; \
	265	.globl label##_common; \
	266	label##_common: \
	267	EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
	268	FINISH_NAP; \
	269	DISABLE_INTS; \
a416561b	270	BEGIN_FTR_SECTION \
f9ff0f30	271	bl .ppc64_runlatch_on; \
a416561b	272	END_FTR_SECTION_IFSET(CPU_FTR_CTRL) \
f9ff0f30 SR	273	addi r3,r1,STACK_FRAME_OVERHEAD; \
	274	bl hdlr; \
	275	b .ret_from_except_lite
	276
	277	/*
	278	* When the idle code in power4_idle puts the CPU into NAP mode,
	279	* it has to do so in a loop, and relies on the external interrupt
	280	* and decrementer interrupt entry code to get it out of the loop.
	281	* It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
	282	* to signal that it is in the loop and needs help to get out.
	283	*/
	284	#ifdef CONFIG_PPC_970_NAP
	285	#define FINISH_NAP \
	286	BEGIN_FTR_SECTION \
	287	clrrdi r11,r1,THREAD_SHIFT; \
	288	ld r9,TI_LOCAL_FLAGS(r11); \
	289	andi. r10,r9,_TLF_NAPPING; \
	290	bnel power4_fixup_nap; \
	291	END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
	292	#else
	293	#define FINISH_NAP
	294	#endif
	295
	296	#endif /* _ASM_POWERPC_EXCEPTION_H */