[linux-2.6-block.git] / arch / powerpc / include / asm / elf.h

/*
 * ELF register definitions..
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
#ifndef _ASM_POWERPC_ELF_H
#define _ASM_POWERPC_ELF_H

#include <linux/sched.h>	/* for task_struct */
#include <asm/page.h>
#include <asm/string.h>
#include <uapi/asm/elf.h>

/*
 * This is used to ensure we don't load something for the wrong architecture.
 */
#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
#define compat_elf_check_arch(x)	((x)->e_machine == EM_PPC)

#define CORE_DUMP_USE_REGSET
#define ELF_EXEC_PAGESIZE	PAGE_SIZE

/*
 * This is the base location for PIE (ET_DYN with INTERP) loads. On
 * 64-bit, this is raised to 4GB to leave the entire 32-bit address
 * space open for things that want to use the area for 32-bit pointers.
 */
#define ELF_ET_DYN_BASE		(is_32bit_task() ? 0x000400000UL : \
						   0x100000000UL)

#define ELF_CORE_EFLAGS (is_elf2_task() ? 2 : 0)

/*
 * Our registers are always unsigned longs, whether we're a 32 bit
 * process or 64 bit, on either a 64 bit or 32 bit kernel.
 *
 * This macro relies on elf_regs[i] having the right type to truncate to,
 * either u32 or u64.  It defines the body of the elf_core_copy_regs
 * function, either the native one with elf_gregset_t elf_regs or
 * the 32-bit one with elf_gregset_t32 elf_regs.
 */
#define PPC_ELF_CORE_COPY_REGS(elf_regs, regs) \
	int i, nregs = min(sizeof(*regs) / sizeof(unsigned long), \
			   (size_t)ELF_NGREG);			  \
	for (i = 0; i < nregs; i++) \
		elf_regs[i] = ((unsigned long *) regs)[i]; \
	memset(&elf_regs[i], 0, (ELF_NGREG - i) * sizeof(elf_regs[0]))

/* Common routine for both 32-bit and 64-bit native processes */
static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
					  struct pt_regs *regs)
{
	PPC_ELF_CORE_COPY_REGS(elf_regs, regs);
}
#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);

typedef elf_vrregset_t elf_fpxregset_t;

/* ELF_HWCAP yields a mask that user programs can use to figure out what
   instruction set this cpu supports.  This could be done in userspace,
   but it's not easy, and we've already done it here.  */
# define ELF_HWCAP	(cur_cpu_spec->cpu_user_features)
# define ELF_HWCAP2	(cur_cpu_spec->cpu_user_features2)

/* This yields a string that ld.so will use to load implementation
   specific libraries for optimization.  This is more specific in
   intent than poking at uname or /proc/cpuinfo.  */

#define ELF_PLATFORM	(cur_cpu_spec->platform)

/* While ELF_PLATFORM indicates the ISA supported by the platform, it
 * may not accurately reflect the underlying behavior of the hardware
 * (as in the case of running in Power5+ compatibility mode on a
 * Power6 machine).  ELF_BASE_PLATFORM allows ld.so to load libraries
 * that are tuned for the real hardware.
 */
#define ELF_BASE_PLATFORM (powerpc_base_platform)

#ifdef __powerpc64__
# define ELF_PLAT_INIT(_r, load_addr)	do {	\
	_r->gpr[2] = load_addr; 		\
} while (0)
#endif /* __powerpc64__ */

#ifdef __powerpc64__
# define SET_PERSONALITY(ex)					\
do {								\
	if (((ex).e_flags & 0x3) == 2)				\
		set_thread_flag(TIF_ELF2ABI);			\
	else							\
		clear_thread_flag(TIF_ELF2ABI);			\
	if ((ex).e_ident[EI_CLASS] == ELFCLASS32)		\
		set_thread_flag(TIF_32BIT);			\
	else							\
		clear_thread_flag(TIF_32BIT);			\
	if (personality(current->personality) != PER_LINUX32)	\
		set_personality(PER_LINUX |			\
			(current->personality & (~PER_MASK)));	\
} while (0)
/*
 * An executable for which elf_read_implies_exec() returns TRUE will
 * have the READ_IMPLIES_EXEC personality flag set automatically. This
 * is only required to work around bugs in old 32bit toolchains. Since
 * the 64bit ABI has never had these issues dont enable the workaround
 * even if we have an executable stack.
 */
# define elf_read_implies_exec(ex, exec_stk) (is_32bit_task() ? \
		(exec_stk == EXSTACK_DEFAULT) : 0)
#else 
# define elf_read_implies_exec(ex, exec_stk) (exec_stk == EXSTACK_DEFAULT)
#endif /* __powerpc64__ */

extern int dcache_bsize;
extern int icache_bsize;
extern int ucache_bsize;

/* vDSO has arch_setup_additional_pages */
#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
struct linux_binprm;
extern int arch_setup_additional_pages(struct linux_binprm *bprm,
				       int uses_interp);
#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b)

/* 1GB for 64bit, 8MB for 32bit */
#define STACK_RND_MASK (is_32bit_task() ? \
	(0x7ff >> (PAGE_SHIFT - 12)) : \
	(0x3ffff >> (PAGE_SHIFT - 12)))

#ifdef CONFIG_SPU_BASE
/* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */
#define NT_SPU		1

#define ARCH_HAVE_EXTRA_ELF_NOTES

#endif /* CONFIG_SPU_BASE */

#ifdef CONFIG_PPC64

#define get_cache_geometry(level) \
	(ppc64_caches.level.assoc << 16 | ppc64_caches.level.line_size)

#define ARCH_DLINFO_CACHE_GEOMETRY					\
	NEW_AUX_ENT(AT_L1I_CACHESIZE, ppc64_caches.l1i.size);		\
	NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY, get_cache_geometry(l1i));	\
	NEW_AUX_ENT(AT_L1D_CACHESIZE, ppc64_caches.l1d.size);		\
	NEW_AUX_ENT(AT_L1D_CACHEGEOMETRY, get_cache_geometry(l1d));	\
	NEW_AUX_ENT(AT_L2_CACHESIZE, ppc64_caches.l2.size);		\
	NEW_AUX_ENT(AT_L2_CACHEGEOMETRY, get_cache_geometry(l2));	\
	NEW_AUX_ENT(AT_L3_CACHESIZE, ppc64_caches.l3.size);		\
	NEW_AUX_ENT(AT_L3_CACHEGEOMETRY, get_cache_geometry(l3))

#else
#define ARCH_DLINFO_CACHE_GEOMETRY
#endif

/*
 * The requirements here are:
 * - keep the final alignment of sp (sp & 0xf)
 * - make sure the 32-bit value at the first 16 byte aligned position of
 *   AUXV is greater than 16 for glibc compatibility.
 *   AT_IGNOREPPC is used for that.
 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
 *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
 * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
 */
#define ARCH_DLINFO							\
do {									\
	/* Handle glibc compatibility. */				\
	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);			\
	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);			\
	/* Cache size items */						\
	NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);			\
	NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);			\
	NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);			\
	VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base);	\
	ARCH_DLINFO_CACHE_GEOMETRY;					\
} while (0)

#endif /* _ASM_POWERPC_ELF_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* ELF register definitions..
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation; either version
	7	* 2 of the License, or (at your option) any later version.
	8	*/
c3617f72 DH	9	#ifndef _ASM_POWERPC_ELF_H
c3617f72 DH	10	#define _ASM_POWERPC_ELF_H
1da177e4	11
c3617f72 DH	12	#include <linux/sched.h> /* for task_struct */
	13	#include <asm/page.h>
	14	#include <asm/string.h>
	15	#include <uapi/asm/elf.h>
1da177e4 LT	16
	17	/*
	18	* This is used to ensure we don't load something for the wrong architecture.
	19	*/
	20	#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
01e31dba	21	#define compat_elf_check_arch(x) ((x)->e_machine == EM_PPC)
1da177e4	22
81970387	23	#define CORE_DUMP_USE_REGSET
637a6ff6	24	#define ELF_EXEC_PAGESIZE PAGE_SIZE
1da177e4	25
47ebb09d KC	26	/*
	27	* This is the base location for PIE (ET_DYN with INTERP) loads. On
	28	* 64-bit, this is raised to 4GB to leave the entire 32-bit address
	29	* space open for things that want to use the area for 32-bit pointers.
	30	*/
	31	#define ELF_ET_DYN_BASE (is_32bit_task() ? 0x000400000UL : \
	32	0x100000000UL)
1da177e4	33
918d0355 RR	34	#define ELF_CORE_EFLAGS (is_elf2_task() ? 2 : 0)
918d0355 RR	35
5f149cf0 RM	36	/*
	37	* Our registers are always unsigned longs, whether we're a 32 bit
	38	* process or 64 bit, on either a 64 bit or 32 bit kernel.
	39	*
	40	* This macro relies on elf_regs[i] having the right type to truncate to,
	41	* either u32 or u64. It defines the body of the elf_core_copy_regs
	42	* function, either the native one with elf_gregset_t elf_regs or
	43	* the 32-bit one with elf_gregset_t32 elf_regs.
	44	*/
	45	#define PPC_ELF_CORE_COPY_REGS(elf_regs, regs) \
	46	int i, nregs = min(sizeof(*regs) / sizeof(unsigned long), \
	47	(size_t)ELF_NGREG); \
	48	for (i = 0; i < nregs; i++) \
	49	elf_regs[i] = ((unsigned long *) regs)[i]; \
	50	memset(&elf_regs[i], 0, (ELF_NGREG - i) * sizeof(elf_regs[0]))
	51
	52	/* Common routine for both 32-bit and 64-bit native processes */
a99eb2ef	53	static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
5f149cf0	54	struct pt_regs *regs)
1da177e4	55	{
5f149cf0	56	PPC_ELF_CORE_COPY_REGS(elf_regs, regs);
1da177e4	57	}
a99eb2ef	58	#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
1da177e4	59
1f7d6668 MN	60	typedef elf_vrregset_t elf_fpxregset_t;
1f7d6668 MN	61
a99eb2ef	62	/* ELF_HWCAP yields a mask that user programs can use to figure out what
1da177e4 LT	63	instruction set this cpu supports. This could be done in userspace,
1da177e4 LT	64	but it's not easy, and we've already done it here. */
a99eb2ef	65	# define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
2171364d	66	# define ELF_HWCAP2 (cur_cpu_spec->cpu_user_features2)
1da177e4 LT	67
	68	/* This yields a string that ld.so will use to load implementation
	69	specific libraries for optimization. This is more specific in
80f15dc7	70	intent than poking at uname or /proc/cpuinfo. */
1da177e4	71
80f15dc7	72	#define ELF_PLATFORM (cur_cpu_spec->platform)
9115d134 NL	73
	74	/* While ELF_PLATFORM indicates the ISA supported by the platform, it
	75	* may not accurately reflect the underlying behavior of the hardware
	76	* (as in the case of running in Power5+ compatibility mode on a
	77	* Power6 machine). ELF_BASE_PLATFORM allows ld.so to load libraries
	78	* that are tuned for the real hardware.
	79	*/
	80	#define ELF_BASE_PLATFORM (powerpc_base_platform)
1da177e4	81
80f15dc7 PM	82	#ifdef __powerpc64__
	83	# define ELF_PLAT_INIT(_r, load_addr) do { \
	84	_r->gpr[2] = load_addr; \
	85	} while (0)
	86	#endif /* __powerpc64__ */
1da177e4	87
a99eb2ef	88	#ifdef __powerpc64__
0b592682	89	# define SET_PERSONALITY(ex) \
1da177e4	90	do { \
373c76d6 RR	91	if (((ex).e_flags & 0x3) == 2) \
373c76d6 RR	92	set_thread_flag(TIF_ELF2ABI); \
1efc5638 JB	93	else \
1efc5638 JB	94	clear_thread_flag(TIF_ELF2ABI); \
1da177e4	95	if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
94f28da8	96	set_thread_flag(TIF_32BIT); \
1da177e4	97	else \
94f28da8	98	clear_thread_flag(TIF_32BIT); \
ce10d979	99	if (personality(current->personality) != PER_LINUX32) \
a91a03ee EM	100	set_personality(PER_LINUX \| \
a91a03ee EM	101	(current->personality & (~PER_MASK))); \
1da177e4	102	} while (0)
1da177e4 LT	103	/*
1da177e4 LT	104	* An executable for which elf_read_implies_exec() returns TRUE will
a2f95a5a AB	105	* have the READ_IMPLIES_EXEC personality flag set automatically. This
	106	* is only required to work around bugs in old 32bit toolchains. Since
	107	* the 64bit ABI has never had these issues dont enable the workaround
	108	* even if we have an executable stack.
1da177e4	109	*/
cab175f9	110	# define elf_read_implies_exec(ex, exec_stk) (is_32bit_task() ? \
d89ebca2	111	(exec_stk == EXSTACK_DEFAULT) : 0)
a99eb2ef	112	#else
d89ebca2	113	# define elf_read_implies_exec(ex, exec_stk) (exec_stk == EXSTACK_DEFAULT)
a99eb2ef	114	#endif /* __powerpc64__ */
1da177e4	115
1da177e4 LT	116	extern int dcache_bsize;
	117	extern int icache_bsize;
	118	extern int ucache_bsize;
	119
a7f290da BH	120	/* vDSO has arch_setup_additional_pages */
a7f290da BH	121	#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
1da177e4	122	struct linux_binprm;
a7f290da	123	extern int arch_setup_additional_pages(struct linux_binprm *bprm,
fc5243d9	124	int uses_interp);
497888cf	125	#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b)
1da177e4	126
2dadb987 AB	127	/* 1GB for 64bit, 8MB for 32bit */
	128	#define STACK_RND_MASK (is_32bit_task() ? \
	129	(0x7ff >> (PAGE_SHIFT - 12)) : \
	130	(0x3ffff >> (PAGE_SHIFT - 12)))
	131
e055595d	132	#ifdef CONFIG_SPU_BASE
bf1ab978 DGM	133	/* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */
	134	#define NT_SPU 1
	135
bf1ab978	136	#define ARCH_HAVE_EXTRA_ELF_NOTES
e5501492 ME	137
e5501492 ME	138	#endif /* CONFIG_SPU_BASE */
bf1ab978	139
98a5f361 BH	140	#ifdef CONFIG_PPC64
	141
	142	#define get_cache_geometry(level) \
	143	(ppc64_caches.level.assoc << 16 \| ppc64_caches.level.line_size)
	144
	145	#define ARCH_DLINFO_CACHE_GEOMETRY \
	146	NEW_AUX_ENT(AT_L1I_CACHESIZE, ppc64_caches.l1i.size); \
	147	NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY, get_cache_geometry(l1i)); \
9c7a0086 ME	148	NEW_AUX_ENT(AT_L1D_CACHESIZE, ppc64_caches.l1d.size); \
9c7a0086 ME	149	NEW_AUX_ENT(AT_L1D_CACHEGEOMETRY, get_cache_geometry(l1d)); \
98a5f361 BH	150	NEW_AUX_ENT(AT_L2_CACHESIZE, ppc64_caches.l2.size); \
	151	NEW_AUX_ENT(AT_L2_CACHEGEOMETRY, get_cache_geometry(l2)); \
	152	NEW_AUX_ENT(AT_L3_CACHESIZE, ppc64_caches.l3.size); \
	153	NEW_AUX_ENT(AT_L3_CACHEGEOMETRY, get_cache_geometry(l3))
	154
	155	#else
	156	#define ARCH_DLINFO_CACHE_GEOMETRY
	157	#endif
	158
2a196e24 BH	159	/*
	160	* The requirements here are:
	161	* - keep the final alignment of sp (sp & 0xf)
	162	* - make sure the 32-bit value at the first 16 byte aligned position of
	163	* AUXV is greater than 16 for glibc compatibility.
	164	* AT_IGNOREPPC is used for that.
	165	* - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
	166	* even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
	167	* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
	168	*/
	169	#define ARCH_DLINFO \
	170	do { \
	171	/* Handle glibc compatibility. */ \
	172	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
	173	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
	174	/* Cache size items */ \
	175	NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
	176	NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
	177	NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
	178	VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base); \
98a5f361	179	ARCH_DLINFO_CACHE_GEOMETRY; \
2a196e24 BH	180	} while (0)
2a196e24 BH	181
a99eb2ef	182	#endif /* _ASM_POWERPC_ELF_H */