Commit | Line | Data |
---|---|---|
c6dbaef2 BH |
1 | /* |
2 | * Arch specific extensions to struct device | |
3 | * | |
4 | * This file is released under the GPLv2 | |
5 | */ | |
12d04eef BH |
6 | #ifndef _ASM_POWERPC_DEVICE_H |
7 | #define _ASM_POWERPC_DEVICE_H | |
c6dbaef2 | 8 | |
12d04eef | 9 | struct device_node; |
cca87d30 GS |
10 | #ifdef CONFIG_PPC64 |
11 | struct pci_dn; | |
2db4928b | 12 | struct iommu_table; |
cca87d30 | 13 | #endif |
12d04eef | 14 | |
f6aedd86 NA |
15 | /* |
16 | * Arch extensions to struct device. | |
17 | * | |
18 | * When adding fields, consider macio_add_one_device in | |
19 | * drivers/macintosh/macio_asic.c | |
20 | */ | |
12d04eef | 21 | struct dev_archdata { |
8617a5c5 CH |
22 | /* |
23 | * Set to %true if the dma_iommu_ops are requested to use a direct | |
24 | * window instead of dynamically mapping memory. | |
25 | */ | |
26 | bool iommu_bypass : 1; | |
738ef42e | 27 | /* |
2db4928b BH |
28 | * These two used to be a union. However, with the hybrid ops we need |
29 | * both so here we store both a DMA offset for direct mappings and | |
30 | * an iommu_table for remapped DMA. | |
738ef42e | 31 | */ |
2db4928b BH |
32 | dma_addr_t dma_offset; |
33 | ||
34 | #ifdef CONFIG_PPC64 | |
35 | struct iommu_table *iommu_table_base; | |
36 | #endif | |
738ef42e | 37 | |
bb917505 VS |
38 | #ifdef CONFIG_IOMMU_API |
39 | void *iommu_domain; | |
40 | #endif | |
cca87d30 GS |
41 | #ifdef CONFIG_PPC64 |
42 | struct pci_dn *pci_data; | |
43 | #endif | |
eb740b5f GS |
44 | #ifdef CONFIG_EEH |
45 | struct eeh_dev *edev; | |
46 | #endif | |
d6b9a81b AB |
47 | #ifdef CONFIG_FAIL_IOMMU |
48 | int fail_iommu; | |
49 | #endif | |
f46580a5 MN |
50 | #ifdef CONFIG_CXL_BASE |
51 | struct cxl_context *cxl_ctx; | |
52 | #endif | |
12d04eef BH |
53 | }; |
54 | ||
d7aacadd | 55 | struct pdev_archdata { |
cb6dc512 | 56 | u64 dma_mask; |
d7aacadd MD |
57 | }; |
58 | ||
12d04eef | 59 | #endif /* _ASM_POWERPC_DEVICE_H */ |