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aaddd3ea ME |
1 | #ifndef _ASM_POWERPC_CODE_PATCHING_H |
2 | #define _ASM_POWERPC_CODE_PATCHING_H | |
3 | ||
4 | /* | |
5 | * Copyright 2008, Michael Ellerman, IBM Corporation. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
07630a37 | 13 | #include <asm/types.h> |
16c57b36 | 14 | #include <asm/ppc-opcode.h> |
b7bcda63 | 15 | |
aaddd3ea ME |
16 | /* Flags for create_branch: |
17 | * "b" == create_branch(addr, target, 0); | |
18 | * "ba" == create_branch(addr, target, BRANCH_ABSOLUTE); | |
19 | * "bl" == create_branch(addr, target, BRANCH_SET_LINK); | |
20 | * "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK); | |
21 | */ | |
22 | #define BRANCH_SET_LINK 0x1 | |
23 | #define BRANCH_ABSOLUTE 0x2 | |
24 | ||
e7a57273 ME |
25 | unsigned int create_branch(const unsigned int *addr, |
26 | unsigned long target, int flags); | |
411781a2 ME |
27 | unsigned int create_cond_branch(const unsigned int *addr, |
28 | unsigned long target, int flags); | |
b6e37968 SR |
29 | int patch_branch(unsigned int *addr, unsigned long target, int flags); |
30 | int patch_instruction(unsigned int *addr, unsigned int instr); | |
aaddd3ea | 31 | |
411781a2 ME |
32 | int instr_is_relative_branch(unsigned int instr); |
33 | int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr); | |
34 | unsigned long branch_target(const unsigned int *instr); | |
35 | unsigned int translate_branch(const unsigned int *dest, | |
36 | const unsigned int *src); | |
1e8341ae KH |
37 | #ifdef CONFIG_PPC_BOOK3E_64 |
38 | void __patch_exception(int exc, unsigned long addr); | |
39 | #define patch_exception(exc, name) do { \ | |
40 | extern unsigned int name; \ | |
41 | __patch_exception((exc), (unsigned long)&name); \ | |
42 | } while (0) | |
43 | #endif | |
411781a2 | 44 | |
c71b7eff AB |
45 | #define OP_RT_RA_MASK 0xffff0000UL |
46 | #define LIS_R2 0x3c020000UL | |
47 | #define ADDIS_R2_R12 0x3c4c0000UL | |
48 | #define ADDI_R2_R2 0x38420000UL | |
49 | ||
07630a37 ME |
50 | static inline unsigned long ppc_function_entry(void *func) |
51 | { | |
f55d9665 | 52 | #ifdef PPC64_ELF_ABI_v2 |
c71b7eff AB |
53 | u32 *insn = func; |
54 | ||
55 | /* | |
56 | * A PPC64 ABIv2 function may have a local and a global entry | |
57 | * point. We need to use the local entry point when patching | |
58 | * functions, so identify and step over the global entry point | |
59 | * sequence. | |
60 | * | |
61 | * The global entry point sequence is always of the form: | |
62 | * | |
63 | * addis r2,r12,XXXX | |
64 | * addi r2,r2,XXXX | |
65 | * | |
66 | * A linker optimisation may convert the addis to lis: | |
67 | * | |
68 | * lis r2,XXXX | |
69 | * addi r2,r2,XXXX | |
70 | */ | |
71 | if ((((*insn & OP_RT_RA_MASK) == ADDIS_R2_R12) || | |
72 | ((*insn & OP_RT_RA_MASK) == LIS_R2)) && | |
73 | ((*(insn+1) & OP_RT_RA_MASK) == ADDI_R2_R2)) | |
74 | return (unsigned long)(insn + 2); | |
75 | else | |
76 | return (unsigned long)func; | |
f55d9665 | 77 | #elif defined(PPC64_ELF_ABI_v1) |
07630a37 | 78 | /* |
c71b7eff AB |
79 | * On PPC64 ABIv1 the function pointer actually points to the |
80 | * function's descriptor. The first entry in the descriptor is the | |
81 | * address of the function text. | |
07630a37 ME |
82 | */ |
83 | return ((func_descr_t *)func)->entry; | |
84 | #else | |
85 | return (unsigned long)func; | |
86 | #endif | |
87 | } | |
88 | ||
d997c00c ME |
89 | static inline unsigned long ppc_global_function_entry(void *func) |
90 | { | |
f55d9665 | 91 | #ifdef PPC64_ELF_ABI_v2 |
d997c00c ME |
92 | /* PPC64 ABIv2 the global entry point is at the address */ |
93 | return (unsigned long)func; | |
94 | #else | |
95 | /* All other cases there is no change vs ppc_function_entry() */ | |
96 | return ppc_function_entry(func); | |
97 | #endif | |
98 | } | |
99 | ||
15308664 TD |
100 | #ifdef CONFIG_PPC64 |
101 | /* | |
102 | * Some instruction encodings commonly used in dynamic ftracing | |
103 | * and function live patching. | |
104 | */ | |
105 | ||
106 | /* This must match the definition of STK_GOT in <asm/ppc_asm.h> */ | |
f55d9665 | 107 | #ifdef PPC64_ELF_ABI_v2 |
15308664 TD |
108 | #define R2_STACK_OFFSET 24 |
109 | #else | |
110 | #define R2_STACK_OFFSET 40 | |
111 | #endif | |
112 | ||
113 | #define PPC_INST_LD_TOC (PPC_INST_LD | ___PPC_RT(__REG_R2) | \ | |
114 | ___PPC_RA(__REG_R1) | R2_STACK_OFFSET) | |
115 | ||
116 | /* usually preceded by a mflr r0 */ | |
117 | #define PPC_INST_STD_LR (PPC_INST_STD | ___PPC_RS(__REG_R0) | \ | |
118 | ___PPC_RA(__REG_R1) | PPC_LR_STKOFF) | |
119 | #endif /* CONFIG_PPC64 */ | |
120 | ||
aaddd3ea | 121 | #endif /* _ASM_POWERPC_CODE_PATCHING_H */ |