[linux-2.6-block.git] / arch / powerpc / include / asm / book3s / 64 / pgtable.h

#ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
#define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
/*
 * This file contains the functions and defines necessary to modify and use
 * the ppc64 hashed page table.
 */

#include <asm/book3s/64/hash.h>
#include <asm/barrier.h>

/*
 * The second half of the kernel virtual space is used for IO mappings,
 * it's itself carved into the PIO region (ISA and PHB IO space) and
 * the ioremap space
 *
 *  ISA_IO_BASE = KERN_IO_START, 64K reserved area
 *  PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
 */
#define KERN_IO_START	(KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
#define FULL_IO_SIZE	0x80000000ul
#define  ISA_IO_BASE	(KERN_IO_START)
#define  ISA_IO_END	(KERN_IO_START + 0x10000ul)
#define  PHB_IO_BASE	(ISA_IO_END)
#define  PHB_IO_END	(KERN_IO_START + FULL_IO_SIZE)
#define IOREMAP_BASE	(PHB_IO_END)
#define IOREMAP_END	(KERN_VIRT_START + KERN_VIRT_SIZE)

#define vmemmap			((struct page *)VMEMMAP_BASE)

/* Advertise special mapping type for AGP */
#define HAVE_PAGE_AGP

/* Advertise support for _PAGE_SPECIAL */
#define __HAVE_ARCH_PTE_SPECIAL

#ifndef __ASSEMBLY__

/*
 * This is the default implementation of various PTE accessors, it's
 * used in all cases except Book3S with 64K pages where we have a
 * concept of sub-pages
 */
#ifndef __real_pte

#ifdef CONFIG_STRICT_MM_TYPECHECKS
#define __real_pte(e,p)		((real_pte_t){(e)})
#define __rpte_to_pte(r)	((r).pte)
#else
#define __real_pte(e,p)		(e)
#define __rpte_to_pte(r)	(__pte(r))
#endif
#define __rpte_to_hidx(r,index)	(pte_val(__rpte_to_pte(r)) >> 12)

#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift)       \
	do {							         \
		index = 0;					         \
		shift = mmu_psize_defs[psize].shift;		         \

#define pte_iterate_hashed_end() } while(0)

/*
 * We expect this to be called only for user addresses or kernel virtual
 * addresses other than the linear mapping.
 */
#define pte_pagesize_index(mm, addr, pte)	MMU_PAGE_4K

#endif /* __real_pte */

static inline void pmd_set(pmd_t *pmdp, unsigned long val)
{
	*pmdp = __pmd(val);
}

static inline void pmd_clear(pmd_t *pmdp)
{
	*pmdp = __pmd(0);
}

#define pmd_none(pmd)		(!pmd_val(pmd))
#define	pmd_present(pmd)	(!pmd_none(pmd))

static inline void pud_set(pud_t *pudp, unsigned long val)
{
	*pudp = __pud(val);
}

static inline void pud_clear(pud_t *pudp)
{
	*pudp = __pud(0);
}

#define pud_none(pud)		(!pud_val(pud))
#define pud_present(pud)	(pud_val(pud) != 0)

extern struct page *pud_page(pud_t pud);
extern struct page *pmd_page(pmd_t pmd);
static inline pte_t pud_pte(pud_t pud)
{
	return __pte(pud_val(pud));
}

static inline pud_t pte_pud(pte_t pte)
{
	return __pud(pte_val(pte));
}
#define pud_write(pud)		pte_write(pud_pte(pud))
#define pgd_write(pgd)		pte_write(pgd_pte(pgd))
static inline void pgd_set(pgd_t *pgdp, unsigned long val)
{
	*pgdp = __pgd(val);
}

/*
 * Find an entry in a page-table-directory.  We combine the address region
 * (the high order N bits) and the pgd portion of the address.
 */

#define pgd_offset(mm, address)	 ((mm)->pgd + pgd_index(address))

#define pmd_offset(pudp,addr) \
	(((pmd_t *) pud_page_vaddr(*(pudp))) + pmd_index(addr))

#define pte_offset_kernel(dir,addr) \
	(((pte_t *) pmd_page_vaddr(*(dir))) + pte_index(addr))

#define pte_offset_map(dir,addr)	pte_offset_kernel((dir), (addr))
#define pte_unmap(pte)			do { } while(0)

/* to find an entry in a kernel page-table-directory */
/* This now only contains the vmalloc pages */
#define pgd_offset_k(address) pgd_offset(&init_mm, address)

#define pte_ERROR(e) \
	pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
#define pmd_ERROR(e) \
	pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
#define pgd_ERROR(e) \
	pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))

/* Encode and de-code a swap entry */
#define MAX_SWAPFILES_CHECK() do { \
	BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
	/*							\
	 * Don't have overlapping bits with _PAGE_HPTEFLAGS	\
	 * We filter HPTEFLAGS on set_pte.			\
	 */							\
	BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \
	} while (0)
/*
 * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT;
 */
#define SWP_TYPE_BITS 5
#define __swp_type(x)		(((x).val >> _PAGE_BIT_SWAP_TYPE) \
				& ((1UL << SWP_TYPE_BITS) - 1))
#define __swp_offset(x)		((x).val >> PTE_RPN_SHIFT)
#define __swp_entry(type, offset)	((swp_entry_t) { \
					((type) << _PAGE_BIT_SWAP_TYPE) \
					| ((offset) << PTE_RPN_SHIFT) })

#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val((pte)) })
#define __swp_entry_to_pte(x)		__pte((x).val)

void pgtable_cache_add(unsigned shift, void (*ctor)(void *));
void pgtable_cache_init(void);

struct page *realmode_pfn_to_page(unsigned long pfn);

#ifdef CONFIG_TRANSPARENT_HUGEPAGE
extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot);
extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
		       pmd_t *pmdp, pmd_t pmd);
extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
				 pmd_t *pmd);
extern int has_transparent_hugepage(void);
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */


static inline pte_t pmd_pte(pmd_t pmd)
{
	return __pte(pmd_val(pmd));
}

static inline pmd_t pte_pmd(pte_t pte)
{
	return __pmd(pte_val(pte));
}

static inline pte_t *pmdp_ptep(pmd_t *pmd)
{
	return (pte_t *)pmd;
}

#define pmd_pfn(pmd)		pte_pfn(pmd_pte(pmd))
#define pmd_dirty(pmd)		pte_dirty(pmd_pte(pmd))
#define pmd_young(pmd)		pte_young(pmd_pte(pmd))
#define pmd_mkold(pmd)		pte_pmd(pte_mkold(pmd_pte(pmd)))
#define pmd_wrprotect(pmd)	pte_pmd(pte_wrprotect(pmd_pte(pmd)))
#define pmd_mkdirty(pmd)	pte_pmd(pte_mkdirty(pmd_pte(pmd)))
#define pmd_mkyoung(pmd)	pte_pmd(pte_mkyoung(pmd_pte(pmd)))
#define pmd_mkwrite(pmd)	pte_pmd(pte_mkwrite(pmd_pte(pmd)))
#ifdef CONFIG_NUMA_BALANCING
static inline int pmd_protnone(pmd_t pmd)
{
	return pte_protnone(pmd_pte(pmd));
}
#endif /* CONFIG_NUMA_BALANCING */

#define __HAVE_ARCH_PMD_WRITE
#define pmd_write(pmd)		pte_write(pmd_pte(pmd))

static inline pmd_t pmd_mkhuge(pmd_t pmd)
{
	/* Do nothing, mk_pmd() does this part.  */
	return pmd;
}

#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
extern int pmdp_set_access_flags(struct vm_area_struct *vma,
				 unsigned long address, pmd_t *pmdp,
				 pmd_t entry, int dirty);

#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
				     unsigned long address, pmd_t *pmdp);
#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
				  unsigned long address, pmd_t *pmdp);

#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
extern pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
				     unsigned long addr, pmd_t *pmdp);

#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
extern void pmdp_splitting_flush(struct vm_area_struct *vma,
				 unsigned long address, pmd_t *pmdp);

extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
				 unsigned long address, pmd_t *pmdp);
#define pmdp_collapse_flush pmdp_collapse_flush

#define __HAVE_ARCH_PGTABLE_DEPOSIT
extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
				       pgtable_t pgtable);
#define __HAVE_ARCH_PGTABLE_WITHDRAW
extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);

#define __HAVE_ARCH_PMDP_INVALIDATE
extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
			    pmd_t *pmdp);

#define pmd_move_must_withdraw pmd_move_must_withdraw
struct spinlock;
static inline int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
					 struct spinlock *old_pmd_ptl)
{
	/*
	 * Archs like ppc64 use pgtable to store per pmd
	 * specific information. So when we switch the pmd,
	 * we should also withdraw and deposit the pgtable
	 */
	return true;
}
#endif /* __ASSEMBLY__ */
#endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */
Commit	Line	Data
3dfcb315 AK	1	#ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
	2	#define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
	3	/*
	4	* This file contains the functions and defines necessary to modify and use
	5	* the ppc64 hashed page table.
	6	*/
	7
ab537dca	8	#include <asm/book3s/64/hash.h>
3dfcb315 AK	9	#include <asm/barrier.h>
3dfcb315 AK	10
3dfcb315 AK	11	/*
	12	* The second half of the kernel virtual space is used for IO mappings,
	13	* it's itself carved into the PIO region (ISA and PHB IO space) and
	14	* the ioremap space
	15	*
	16	* ISA_IO_BASE = KERN_IO_START, 64K reserved area
	17	* PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
	18	* IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
	19	*/
	20	#define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
	21	#define FULL_IO_SIZE 0x80000000ul
	22	#define ISA_IO_BASE (KERN_IO_START)
	23	#define ISA_IO_END (KERN_IO_START + 0x10000ul)
	24	#define PHB_IO_BASE (ISA_IO_END)
	25	#define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
	26	#define IOREMAP_BASE (PHB_IO_END)
	27	#define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE)
	28
3dfcb315 AK	29	#define vmemmap ((struct page *)VMEMMAP_BASE)
3dfcb315 AK	30
b0412ea9	31	/* Advertise special mapping type for AGP */
b0412ea9 AK	32	#define HAVE_PAGE_AGP
	33
	34	/* Advertise support for _PAGE_SPECIAL */
	35	#define __HAVE_ARCH_PTE_SPECIAL
	36
3dfcb315 AK	37	#ifndef __ASSEMBLY__
	38
	39	/*
	40	* This is the default implementation of various PTE accessors, it's
	41	* used in all cases except Book3S with 64K pages where we have a
	42	* concept of sub-pages
	43	*/
	44	#ifndef __real_pte
	45
	46	#ifdef CONFIG_STRICT_MM_TYPECHECKS
	47	#define __real_pte(e,p) ((real_pte_t){(e)})
	48	#define __rpte_to_pte(r) ((r).pte)
	49	#else
	50	#define __real_pte(e,p) (e)
	51	#define __rpte_to_pte(r) (__pte(r))
	52	#endif
	53	#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12)
	54
	55	#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
	56	do { \
	57	index = 0; \
	58	shift = mmu_psize_defs[psize].shift; \
	59
	60	#define pte_iterate_hashed_end() } while(0)
	61
	62	/*
	63	* We expect this to be called only for user addresses or kernel virtual
	64	* addresses other than the linear mapping.
	65	*/
	66	#define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
	67
	68	#endif /* __real_pte */
	69
f281b5d5 AK	70	static inline void pmd_set(pmd_t *pmdp, unsigned long val)
	71	{
	72	*pmdp = __pmd(val);
	73	}
	74
	75	static inline void pmd_clear(pmd_t *pmdp)
	76	{
	77	*pmdp = __pmd(0);
	78	}
	79
3dfcb315	80	#define pmd_none(pmd) (!pmd_val(pmd))
3dfcb315	81	#define pmd_present(pmd) (!pmd_none(pmd))
3dfcb315	82
f281b5d5 AK	83	static inline void pud_set(pud_t *pudp, unsigned long val)
	84	{
	85	*pudp = __pud(val);
	86	}
	87
	88	static inline void pud_clear(pud_t *pudp)
	89	{
	90	*pudp = __pud(0);
	91	}
	92
3dfcb315	93	#define pud_none(pud) (!pud_val(pud))
3dfcb315	94	#define pud_present(pud) (pud_val(pud) != 0)
3dfcb315 AK	95
3dfcb315 AK	96	extern struct page *pud_page(pud_t pud);
371352ca	97	extern struct page *pmd_page(pmd_t pmd);
3dfcb315 AK	98	static inline pte_t pud_pte(pud_t pud)
	99	{
	100	return __pte(pud_val(pud));
	101	}
	102
	103	static inline pud_t pte_pud(pte_t pte)
	104	{
	105	return __pud(pte_val(pte));
	106	}
	107	#define pud_write(pud) pte_write(pud_pte(pud))
3dfcb315	108	#define pgd_write(pgd) pte_write(pgd_pte(pgd))
f281b5d5 AK	109	static inline void pgd_set(pgd_t *pgdp, unsigned long val)
	110	{
	111	*pgdp = __pgd(val);
	112	}
3dfcb315 AK	113
	114	/*
	115	* Find an entry in a page-table-directory. We combine the address region
	116	* (the high order N bits) and the pgd portion of the address.
	117	*/
3dfcb315 AK	118
	119	#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
	120
	121	#define pmd_offset(pudp,addr) \
371352ca	122	(((pmd_t ) pud_page_vaddr((pudp))) + pmd_index(addr))
3dfcb315 AK	123
3dfcb315 AK	124	#define pte_offset_kernel(dir,addr) \
371352ca	125	(((pte_t ) pmd_page_vaddr((dir))) + pte_index(addr))
3dfcb315 AK	126
	127	#define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
	128	#define pte_unmap(pte) do { } while(0)
	129
	130	/* to find an entry in a kernel page-table-directory */
	131	/* This now only contains the vmalloc pages */
	132	#define pgd_offset_k(address) pgd_offset(&init_mm, address)
3dfcb315 AK	133
	134	#define pte_ERROR(e) \
	135	pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
	136	#define pmd_ERROR(e) \
	137	pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
	138	#define pgd_ERROR(e) \
	139	pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
	140
	141	/* Encode and de-code a swap entry */
	142	#define MAX_SWAPFILES_CHECK() do { \
	143	BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
	144	/* \
	145	* Don't have overlapping bits with _PAGE_HPTEFLAGS \
	146	* We filter HPTEFLAGS on set_pte. \
	147	*/ \
	148	BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \
	149	} while (0)
	150	/*
	151	* on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT;
	152	*/
	153	#define SWP_TYPE_BITS 5
	154	#define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \
	155	& ((1UL << SWP_TYPE_BITS) - 1))
	156	#define __swp_offset(x) ((x).val >> PTE_RPN_SHIFT)
	157	#define __swp_entry(type, offset) ((swp_entry_t) { \
	158	((type) << _PAGE_BIT_SWAP_TYPE) \
	159	\| ((offset) << PTE_RPN_SHIFT) })
	160
	161	#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) })
	162	#define __swp_entry_to_pte(x) __pte((x).val)
	163
	164	void pgtable_cache_add(unsigned shift, void (ctor)(void ));
	165	void pgtable_cache_init(void);
3dfcb315	166
3dfcb315 AK	167	struct page *realmode_pfn_to_page(unsigned long pfn);
3dfcb315 AK	168
3dfcb315	169	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
3dfcb315 AK	170	extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
	171	extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot);
	172	extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
	173	extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
	174	pmd_t *pmdp, pmd_t pmd);
	175	extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
	176	pmd_t *pmd);
3dfcb315	177	extern int has_transparent_hugepage(void);
3dfcb315 AK	178	#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
3dfcb315 AK	179
3dfcb315 AK	180
	181	static inline pte_t pmd_pte(pmd_t pmd)
	182	{
	183	return __pte(pmd_val(pmd));
	184	}
	185
	186	static inline pmd_t pte_pmd(pte_t pte)
	187	{
	188	return __pmd(pte_val(pte));
	189	}
	190
	191	static inline pte_t pmdp_ptep(pmd_t pmd)
	192	{
	193	return (pte_t *)pmd;
	194	}
	195
	196	#define pmd_pfn(pmd) pte_pfn(pmd_pte(pmd))
	197	#define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
	198	#define pmd_young(pmd) pte_young(pmd_pte(pmd))
	199	#define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
	200	#define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
	201	#define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
	202	#define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
	203	#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
1ca72129 AK	204	#ifdef CONFIG_NUMA_BALANCING
	205	static inline int pmd_protnone(pmd_t pmd)
	206	{
	207	return pte_protnone(pmd_pte(pmd));
	208	}
	209	#endif /* CONFIG_NUMA_BALANCING */
3dfcb315 AK	210
	211	#define __HAVE_ARCH_PMD_WRITE
	212	#define pmd_write(pmd) pte_write(pmd_pte(pmd))
	213
	214	static inline pmd_t pmd_mkhuge(pmd_t pmd)
	215	{
	216	/* Do nothing, mk_pmd() does this part. */
	217	return pmd;
	218	}
	219
3dfcb315 AK	220	#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
	221	extern int pmdp_set_access_flags(struct vm_area_struct *vma,
	222	unsigned long address, pmd_t *pmdp,
	223	pmd_t entry, int dirty);
	224
3dfcb315 AK	225	#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
	226	extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
	227	unsigned long address, pmd_t *pmdp);
	228	#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
	229	extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
	230	unsigned long address, pmd_t *pmdp);
	231
	232	#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
	233	extern pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
	234	unsigned long addr, pmd_t *pmdp);
	235
3dfcb315 AK	236	#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
	237	extern void pmdp_splitting_flush(struct vm_area_struct *vma,
	238	unsigned long address, pmd_t *pmdp);
	239
	240	extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
	241	unsigned long address, pmd_t *pmdp);
	242	#define pmdp_collapse_flush pmdp_collapse_flush
	243
	244	#define __HAVE_ARCH_PGTABLE_DEPOSIT
	245	extern void pgtable_trans_huge_deposit(struct mm_struct mm, pmd_t pmdp,
	246	pgtable_t pgtable);
	247	#define __HAVE_ARCH_PGTABLE_WITHDRAW
	248	extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct mm, pmd_t pmdp);
	249
	250	#define __HAVE_ARCH_PMDP_INVALIDATE
	251	extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
	252	pmd_t *pmdp);
	253
	254	#define pmd_move_must_withdraw pmd_move_must_withdraw
	255	struct spinlock;
	256	static inline int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
	257	struct spinlock *old_pmd_ptl)
	258	{
	259	/*
	260	* Archs like ppc64 use pgtable to store per pmd
	261	* specific information. So when we switch the pmd,
	262	* we should also withdraw and deposit the pgtable
	263	*/
	264	return true;
	265	}
	266	#endif /* __ASSEMBLY__ */
	267	#endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */