[linux-2.6-block.git] / arch / powerpc / include / asm / book3s / 64 / pgtable.h

#ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
#define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_

/*
 * Common bits between hash and Radix page table
 */
#define _PAGE_BIT_SWAP_TYPE	0

#define _PAGE_EXEC		0x00001 /* execute permission */
#define _PAGE_WRITE		0x00002 /* write access allowed */
#define _PAGE_READ		0x00004	/* read access allowed */
#define _PAGE_RW		(_PAGE_READ | _PAGE_WRITE)
#define _PAGE_RWX		(_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)
#define _PAGE_PRIVILEGED	0x00008 /* kernel access only */
#define _PAGE_SAO		0x00010 /* Strong access order */
#define _PAGE_NON_IDEMPOTENT	0x00020 /* non idempotent memory */
#define _PAGE_TOLERANT		0x00030 /* tolerant memory, cache inhibited */
#define _PAGE_DIRTY		0x00080 /* C: page changed */
#define _PAGE_ACCESSED		0x00100 /* R: page referenced */
/*
 * Software bits
 */
#ifdef CONFIG_MEM_SOFT_DIRTY
#define _PAGE_SOFT_DIRTY	0x00200 /* software: software dirty tracking */
#else
#define _PAGE_SOFT_DIRTY	0x00000
#endif
#define _PAGE_SPECIAL		0x00400 /* software: special page */


#define _PAGE_PTE		(1ul << 62)	/* distinguishes PTEs from pointers */
#define _PAGE_PRESENT		(1ul << 63)	/* pte contains a translation */
/*
 * Drivers request for cache inhibited pte mapping using _PAGE_NO_CACHE
 * Instead of fixing all of them, add an alternate define which
 * maps CI pte mapping.
 */
#define _PAGE_NO_CACHE		_PAGE_TOLERANT
/*
 * We support 57 bit real address in pte. Clear everything above 57, and
 * every thing below PAGE_SHIFT;
 */
#define PTE_RPN_MASK	(((1UL << 57) - 1) & (PAGE_MASK))
/*
 * set of bits not changed in pmd_modify. Even though we have hash specific bits
 * in here, on radix we expect them to be zero.
 */
#define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
			 _PAGE_ACCESSED | H_PAGE_THP_HUGE | _PAGE_PTE | \
			 _PAGE_SOFT_DIRTY)
/*
 * user access blocked by key
 */
#define _PAGE_KERNEL_RW		(_PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY)
#define _PAGE_KERNEL_RO		 (_PAGE_PRIVILEGED | _PAGE_READ)
#define _PAGE_KERNEL_RWX	(_PAGE_PRIVILEGED | _PAGE_DIRTY |	\
				 _PAGE_RW | _PAGE_EXEC)
/*
 * No page size encoding in the linux PTE
 */
#define _PAGE_PSIZE		0
/*
 * _PAGE_CHG_MASK masks of bits that are to be preserved across
 * pgprot changes
 */
#define _PAGE_CHG_MASK	(PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
			 _PAGE_ACCESSED | _PAGE_SPECIAL | _PAGE_PTE |	\
			 _PAGE_SOFT_DIRTY)
/*
 * Mask of bits returned by pte_pgprot()
 */
#define PAGE_PROT_BITS  (_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT | \
			 H_PAGE_4K_PFN | _PAGE_PRIVILEGED | _PAGE_ACCESSED | \
			 _PAGE_READ | _PAGE_WRITE |  _PAGE_DIRTY | _PAGE_EXEC | \
			 _PAGE_SOFT_DIRTY)
/*
 * We define 2 sets of base prot bits, one for basic pages (ie,
 * cacheable kernel and user pages) and one for non cacheable
 * pages. We always set _PAGE_COHERENT when SMP is enabled or
 * the processor might need it for DMA coherency.
 */
#define _PAGE_BASE_NC	(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
#define _PAGE_BASE	(_PAGE_BASE_NC)

/* Permission masks used to generate the __P and __S table,
 *
 * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
 *
 * Write permissions imply read permissions for now (we could make write-only
 * pages on BookE but we don't bother for now). Execute permission control is
 * possible on platforms that define _PAGE_EXEC
 *
 * Note due to the way vm flags are laid out, the bits are XWR
 */
#define PAGE_NONE	__pgprot(_PAGE_BASE | _PAGE_PRIVILEGED)
#define PAGE_SHARED	__pgprot(_PAGE_BASE | _PAGE_RW)
#define PAGE_SHARED_X	__pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_EXEC)
#define PAGE_COPY	__pgprot(_PAGE_BASE | _PAGE_READ)
#define PAGE_COPY_X	__pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
#define PAGE_READONLY	__pgprot(_PAGE_BASE | _PAGE_READ)
#define PAGE_READONLY_X	__pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)

#define __P000	PAGE_NONE
#define __P001	PAGE_READONLY
#define __P010	PAGE_COPY
#define __P011	PAGE_COPY
#define __P100	PAGE_READONLY_X
#define __P101	PAGE_READONLY_X
#define __P110	PAGE_COPY_X
#define __P111	PAGE_COPY_X

#define __S000	PAGE_NONE
#define __S001	PAGE_READONLY
#define __S010	PAGE_SHARED
#define __S011	PAGE_SHARED
#define __S100	PAGE_READONLY_X
#define __S101	PAGE_READONLY_X
#define __S110	PAGE_SHARED_X
#define __S111	PAGE_SHARED_X

/* Permission masks used for kernel mappings */
#define PAGE_KERNEL	__pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
#define PAGE_KERNEL_NC	__pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
				 _PAGE_TOLERANT)
#define PAGE_KERNEL_NCG	__pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
				 _PAGE_NON_IDEMPOTENT)
#define PAGE_KERNEL_X	__pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
#define PAGE_KERNEL_RO	__pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
#define PAGE_KERNEL_ROX	__pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)

/*
 * Protection used for kernel text. We want the debuggers to be able to
 * set breakpoints anywhere, so don't write protect the kernel text
 * on platforms where such control is possible.
 */
#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) || \
	defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
#define PAGE_KERNEL_TEXT	PAGE_KERNEL_X
#else
#define PAGE_KERNEL_TEXT	PAGE_KERNEL_ROX
#endif

/* Make modules code happy. We don't set RO yet */
#define PAGE_KERNEL_EXEC	PAGE_KERNEL_X
#define PAGE_AGP		(PAGE_KERNEL_NC)

#include <asm/book3s/64/hash.h>
#include <asm/barrier.h>

/*
 * The second half of the kernel virtual space is used for IO mappings,
 * it's itself carved into the PIO region (ISA and PHB IO space) and
 * the ioremap space
 *
 *  ISA_IO_BASE = KERN_IO_START, 64K reserved area
 *  PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
 */
#define KERN_IO_START	(KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
#define FULL_IO_SIZE	0x80000000ul
#define  ISA_IO_BASE	(KERN_IO_START)
#define  ISA_IO_END	(KERN_IO_START + 0x10000ul)
#define  PHB_IO_BASE	(ISA_IO_END)
#define  PHB_IO_END	(KERN_IO_START + FULL_IO_SIZE)
#define IOREMAP_BASE	(PHB_IO_END)
#define IOREMAP_END	(KERN_VIRT_START + KERN_VIRT_SIZE)

#define vmemmap			((struct page *)VMEMMAP_BASE)

/* Advertise special mapping type for AGP */
#define HAVE_PAGE_AGP

/* Advertise support for _PAGE_SPECIAL */
#define __HAVE_ARCH_PTE_SPECIAL

#ifndef __ASSEMBLY__

/*
 * This is the default implementation of various PTE accessors, it's
 * used in all cases except Book3S with 64K pages where we have a
 * concept of sub-pages
 */
#ifndef __real_pte

#define __real_pte(e,p)		((real_pte_t){(e)})
#define __rpte_to_pte(r)	((r).pte)
#define __rpte_to_hidx(r,index)	(pte_val(__rpte_to_pte(r)) >> H_PAGE_F_GIX_SHIFT)

#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift)       \
	do {							         \
		index = 0;					         \
		shift = mmu_psize_defs[psize].shift;		         \

#define pte_iterate_hashed_end() } while(0)

/*
 * We expect this to be called only for user addresses or kernel virtual
 * addresses other than the linear mapping.
 */
#define pte_pagesize_index(mm, addr, pte)	MMU_PAGE_4K

#endif /* __real_pte */

static inline void pmd_set(pmd_t *pmdp, unsigned long val)
{
	*pmdp = __pmd(val);
}

static inline void pmd_clear(pmd_t *pmdp)
{
	*pmdp = __pmd(0);
}

#define pmd_none(pmd)		(!pmd_val(pmd))
#define	pmd_present(pmd)	(!pmd_none(pmd))

static inline void pud_set(pud_t *pudp, unsigned long val)
{
	*pudp = __pud(val);
}

static inline void pud_clear(pud_t *pudp)
{
	*pudp = __pud(0);
}

#define pud_none(pud)		(!pud_val(pud))
#define pud_present(pud)	(pud_val(pud) != 0)

extern struct page *pud_page(pud_t pud);
extern struct page *pmd_page(pmd_t pmd);
static inline pte_t pud_pte(pud_t pud)
{
	return __pte(pud_val(pud));
}

static inline pud_t pte_pud(pte_t pte)
{
	return __pud(pte_val(pte));
}
#define pud_write(pud)		pte_write(pud_pte(pud))
#define pgd_write(pgd)		pte_write(pgd_pte(pgd))
static inline void pgd_set(pgd_t *pgdp, unsigned long val)
{
	*pgdp = __pgd(val);
}

static inline void pgd_clear(pgd_t *pgdp)
{
	*pgdp = __pgd(0);
}

#define pgd_none(pgd)		(!pgd_val(pgd))
#define pgd_present(pgd)	(!pgd_none(pgd))

static inline pte_t pgd_pte(pgd_t pgd)
{
	return __pte(pgd_val(pgd));
}

static inline pgd_t pte_pgd(pte_t pte)
{
	return __pgd(pte_val(pte));
}

extern struct page *pgd_page(pgd_t pgd);

/*
 * Find an entry in a page-table-directory.  We combine the address region
 * (the high order N bits) and the pgd portion of the address.
 */

#define pgd_offset(mm, address)	 ((mm)->pgd + pgd_index(address))

#define pud_offset(pgdp, addr)	\
	(((pud_t *) pgd_page_vaddr(*(pgdp))) + pud_index(addr))
#define pmd_offset(pudp,addr) \
	(((pmd_t *) pud_page_vaddr(*(pudp))) + pmd_index(addr))
#define pte_offset_kernel(dir,addr) \
	(((pte_t *) pmd_page_vaddr(*(dir))) + pte_index(addr))

#define pte_offset_map(dir,addr)	pte_offset_kernel((dir), (addr))
#define pte_unmap(pte)			do { } while(0)

/* to find an entry in a kernel page-table-directory */
/* This now only contains the vmalloc pages */
#define pgd_offset_k(address) pgd_offset(&init_mm, address)

#define pte_ERROR(e) \
	pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
#define pmd_ERROR(e) \
	pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
#define pud_ERROR(e) \
	pr_err("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
#define pgd_ERROR(e) \
	pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))

/* Encode and de-code a swap entry */
#define MAX_SWAPFILES_CHECK() do { \
	BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
	/*							\
	 * Don't have overlapping bits with _PAGE_HPTEFLAGS	\
	 * We filter HPTEFLAGS on set_pte.			\
	 */							\
	BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \
	BUILD_BUG_ON(_PAGE_HPTEFLAGS & _PAGE_SWP_SOFT_DIRTY);	\
	} while (0)
/*
 * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT;
 */
#define SWP_TYPE_BITS 5
#define __swp_type(x)		(((x).val >> _PAGE_BIT_SWAP_TYPE) \
				& ((1UL << SWP_TYPE_BITS) - 1))
#define __swp_offset(x)		(((x).val & PTE_RPN_MASK) >> PAGE_SHIFT)
#define __swp_entry(type, offset)	((swp_entry_t) { \
				((type) << _PAGE_BIT_SWAP_TYPE) \
				| (((offset) << PAGE_SHIFT) & PTE_RPN_MASK)})
/*
 * swp_entry_t must be independent of pte bits. We build a swp_entry_t from
 * swap type and offset we get from swap and convert that to pte to find a
 * matching pte in linux page table.
 * Clear bits not found in swap entries here.
 */
#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val((pte)) & ~_PAGE_PTE })
#define __swp_entry_to_pte(x)	__pte((x).val | _PAGE_PTE)

static inline bool pte_user(pte_t pte)
{
	return !(pte_val(pte) & _PAGE_PRIVILEGED);
}

#ifdef CONFIG_MEM_SOFT_DIRTY
#define _PAGE_SWP_SOFT_DIRTY   (1UL << (SWP_TYPE_BITS + _PAGE_BIT_SWAP_TYPE))
#else
#define _PAGE_SWP_SOFT_DIRTY	0UL
#endif /* CONFIG_MEM_SOFT_DIRTY */

#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
{
	return __pte(pte_val(pte) | _PAGE_SWP_SOFT_DIRTY);
}
static inline bool pte_swp_soft_dirty(pte_t pte)
{
	return !!(pte_val(pte) & _PAGE_SWP_SOFT_DIRTY);
}
static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
{
	return __pte(pte_val(pte) & ~_PAGE_SWP_SOFT_DIRTY);
}
#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */

static inline bool check_pte_access(unsigned long access, unsigned long ptev)
{
	/*
	 * This check for _PAGE_RWX and _PAGE_PRESENT bits
	 */
	if (access & ~ptev)
		return false;
	/*
	 * This check for access to privilege space
	 */
	if ((access & _PAGE_PRIVILEGED) != (ptev & _PAGE_PRIVILEGED))
		return false;

	return true;
}

void pgtable_cache_add(unsigned shift, void (*ctor)(void *));
void pgtable_cache_init(void);

struct page *realmode_pfn_to_page(unsigned long pfn);

#ifdef CONFIG_TRANSPARENT_HUGEPAGE
extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot);
extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
		       pmd_t *pmdp, pmd_t pmd);
extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
				 pmd_t *pmd);
extern int has_transparent_hugepage(void);
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */


static inline pte_t pmd_pte(pmd_t pmd)
{
	return __pte(pmd_val(pmd));
}

static inline pmd_t pte_pmd(pte_t pte)
{
	return __pmd(pte_val(pte));
}

static inline pte_t *pmdp_ptep(pmd_t *pmd)
{
	return (pte_t *)pmd;
}

#define pmd_pfn(pmd)		pte_pfn(pmd_pte(pmd))
#define pmd_dirty(pmd)		pte_dirty(pmd_pte(pmd))
#define pmd_young(pmd)		pte_young(pmd_pte(pmd))
#define pmd_mkold(pmd)		pte_pmd(pte_mkold(pmd_pte(pmd)))
#define pmd_wrprotect(pmd)	pte_pmd(pte_wrprotect(pmd_pte(pmd)))
#define pmd_mkdirty(pmd)	pte_pmd(pte_mkdirty(pmd_pte(pmd)))
#define pmd_mkclean(pmd)	pte_pmd(pte_mkclean(pmd_pte(pmd)))
#define pmd_mkyoung(pmd)	pte_pmd(pte_mkyoung(pmd_pte(pmd)))
#define pmd_mkwrite(pmd)	pte_pmd(pte_mkwrite(pmd_pte(pmd)))

#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
#define pmd_soft_dirty(pmd)    pte_soft_dirty(pmd_pte(pmd))
#define pmd_mksoft_dirty(pmd)  pte_pmd(pte_mksoft_dirty(pmd_pte(pmd)))
#define pmd_clear_soft_dirty(pmd) pte_pmd(pte_clear_soft_dirty(pmd_pte(pmd)))
#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */

#ifdef CONFIG_NUMA_BALANCING
static inline int pmd_protnone(pmd_t pmd)
{
	return pte_protnone(pmd_pte(pmd));
}
#endif /* CONFIG_NUMA_BALANCING */

#define __HAVE_ARCH_PMD_WRITE
#define pmd_write(pmd)		pte_write(pmd_pte(pmd))

static inline pmd_t pmd_mkhuge(pmd_t pmd)
{
	return __pmd(pmd_val(pmd) | (_PAGE_PTE | H_PAGE_THP_HUGE));
}

#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
extern int pmdp_set_access_flags(struct vm_area_struct *vma,
				 unsigned long address, pmd_t *pmdp,
				 pmd_t entry, int dirty);

#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
				     unsigned long address, pmd_t *pmdp);

#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
extern pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
				     unsigned long addr, pmd_t *pmdp);

extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
				 unsigned long address, pmd_t *pmdp);
#define pmdp_collapse_flush pmdp_collapse_flush

#define __HAVE_ARCH_PGTABLE_DEPOSIT
extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
				       pgtable_t pgtable);
#define __HAVE_ARCH_PGTABLE_WITHDRAW
extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);

#define __HAVE_ARCH_PMDP_INVALIDATE
extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
			    pmd_t *pmdp);

#define __HAVE_ARCH_PMDP_HUGE_SPLIT_PREPARE
extern void pmdp_huge_split_prepare(struct vm_area_struct *vma,
				    unsigned long address, pmd_t *pmdp);

#define pmd_move_must_withdraw pmd_move_must_withdraw
struct spinlock;
static inline int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
					 struct spinlock *old_pmd_ptl)
{
	/*
	 * Archs like ppc64 use pgtable to store per pmd
	 * specific information. So when we switch the pmd,
	 * we should also withdraw and deposit the pgtable
	 */
	return true;
}
#endif /* __ASSEMBLY__ */
#endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */
Commit	Line	Data
3dfcb315 AK	1	#ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
3dfcb315 AK	2	#define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
2e873519 AK	3
	4	/*
	5	* Common bits between hash and Radix page table
	6	*/
	7	#define _PAGE_BIT_SWAP_TYPE 0
	8
	9	#define _PAGE_EXEC 0x00001 /* execute permission */
	10	#define _PAGE_WRITE 0x00002 /* write access allowed */
	11	#define _PAGE_READ 0x00004 /* read access allowed */
	12	#define _PAGE_RW (_PAGE_READ \| _PAGE_WRITE)
	13	#define _PAGE_RWX (_PAGE_READ \| _PAGE_WRITE \| _PAGE_EXEC)
	14	#define _PAGE_PRIVILEGED 0x00008 /* kernel access only */
	15	#define _PAGE_SAO 0x00010 /* Strong access order */
	16	#define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */
	17	#define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
	18	#define _PAGE_DIRTY 0x00080 /* C: page changed */
	19	#define _PAGE_ACCESSED 0x00100 /* R: page referenced */
	20	/*
	21	* Software bits
	22	*/
	23	#ifdef CONFIG_MEM_SOFT_DIRTY
	24	#define _PAGE_SOFT_DIRTY 0x00200 /* software: software dirty tracking */
	25	#else
	26	#define _PAGE_SOFT_DIRTY 0x00000
	27	#endif
	28	#define _PAGE_SPECIAL 0x00400 /* software: special page */
	29
	30
	31	#define _PAGE_PTE (1ul << 62) /* distinguishes PTEs from pointers */
	32	#define _PAGE_PRESENT (1ul << 63) /* pte contains a translation */
	33	/*
	34	* Drivers request for cache inhibited pte mapping using _PAGE_NO_CACHE
	35	* Instead of fixing all of them, add an alternate define which
	36	* maps CI pte mapping.
	37	*/
	38	#define _PAGE_NO_CACHE _PAGE_TOLERANT
	39	/*
	40	* We support 57 bit real address in pte. Clear everything above 57, and
	41	* every thing below PAGE_SHIFT;
	42	*/
	43	#define PTE_RPN_MASK (((1UL << 57) - 1) & (PAGE_MASK))
	44	/*
	45	* set of bits not changed in pmd_modify. Even though we have hash specific bits
	46	* in here, on radix we expect them to be zero.
	47	*/
	48	#define _HPAGE_CHG_MASK (PTE_RPN_MASK \| _PAGE_HPTEFLAGS \| _PAGE_DIRTY \| \
	49	_PAGE_ACCESSED \| H_PAGE_THP_HUGE \| _PAGE_PTE \| \
	50	_PAGE_SOFT_DIRTY)
	51	/*
	52	* user access blocked by key
	53	*/
	54	#define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED \| _PAGE_RW \| _PAGE_DIRTY)
	55	#define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED \| _PAGE_READ)
	56	#define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED \| _PAGE_DIRTY \| \
	57	_PAGE_RW \| _PAGE_EXEC)
	58	/*
	59	* No page size encoding in the linux PTE
	60	*/
	61	#define _PAGE_PSIZE 0
	62	/*
	63	* _PAGE_CHG_MASK masks of bits that are to be preserved across
	64	* pgprot changes
	65	*/
	66	#define _PAGE_CHG_MASK (PTE_RPN_MASK \| _PAGE_HPTEFLAGS \| _PAGE_DIRTY \| \
67	_PAGE_ACCESSED \| _PAGE_SPECIAL \| _PAGE_PTE \| \
68	_PAGE_SOFT_DIRTY)
69	/*
70	* Mask of bits returned by pte_pgprot()
71	*/
72	#define PAGE_PROT_BITS (_PAGE_SAO \| _PAGE_NON_IDEMPOTENT \| _PAGE_TOLERANT \| \
73	H_PAGE_4K_PFN \| _PAGE_PRIVILEGED \| _PAGE_ACCESSED \| \
74	_PAGE_READ \| _PAGE_WRITE \| _PAGE_DIRTY \| _PAGE_EXEC \| \
75	_PAGE_SOFT_DIRTY)
3dfcb315	76	/*
2e873519 AK	77	* We define 2 sets of base prot bits, one for basic pages (ie,
	78	* cacheable kernel and user pages) and one for non cacheable
	79	* pages. We always set _PAGE_COHERENT when SMP is enabled or
	80	* the processor might need it for DMA coherency.
3dfcb315	81	*/
2e873519 AK	82	#define _PAGE_BASE_NC (_PAGE_PRESENT \| _PAGE_ACCESSED \| _PAGE_PSIZE)
	83	#define _PAGE_BASE (_PAGE_BASE_NC)
	84
	85	/* Permission masks used to generate the __P and __S table,
	86	*
	87	* Note:__pgprot is defined in arch/powerpc/include/asm/page.h
	88	*
	89	* Write permissions imply read permissions for now (we could make write-only
	90	* pages on BookE but we don't bother for now). Execute permission control is
	91	* possible on platforms that define _PAGE_EXEC
	92	*
	93	* Note due to the way vm flags are laid out, the bits are XWR
	94	*/
	95	#define PAGE_NONE __pgprot(_PAGE_BASE \| _PAGE_PRIVILEGED)
	96	#define PAGE_SHARED __pgprot(_PAGE_BASE \| _PAGE_RW)
	97	#define PAGE_SHARED_X __pgprot(_PAGE_BASE \| _PAGE_RW \| _PAGE_EXEC)
	98	#define PAGE_COPY __pgprot(_PAGE_BASE \| _PAGE_READ)
	99	#define PAGE_COPY_X __pgprot(_PAGE_BASE \| _PAGE_READ \| _PAGE_EXEC)
	100	#define PAGE_READONLY __pgprot(_PAGE_BASE \| _PAGE_READ)
	101	#define PAGE_READONLY_X __pgprot(_PAGE_BASE \| _PAGE_READ \| _PAGE_EXEC)
	102
	103	#define __P000 PAGE_NONE
	104	#define __P001 PAGE_READONLY
	105	#define __P010 PAGE_COPY
	106	#define __P011 PAGE_COPY
	107	#define __P100 PAGE_READONLY_X
	108	#define __P101 PAGE_READONLY_X
	109	#define __P110 PAGE_COPY_X
	110	#define __P111 PAGE_COPY_X
	111
	112	#define __S000 PAGE_NONE
	113	#define __S001 PAGE_READONLY
	114	#define __S010 PAGE_SHARED
	115	#define __S011 PAGE_SHARED
	116	#define __S100 PAGE_READONLY_X
	117	#define __S101 PAGE_READONLY_X
	118	#define __S110 PAGE_SHARED_X
	119	#define __S111 PAGE_SHARED_X
	120
	121	/* Permission masks used for kernel mappings */
	122	#define PAGE_KERNEL __pgprot(_PAGE_BASE \| _PAGE_KERNEL_RW)
	123	#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC \| _PAGE_KERNEL_RW \| \
	124	_PAGE_TOLERANT)
	125	#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC \| _PAGE_KERNEL_RW \| \
	126	_PAGE_NON_IDEMPOTENT)
	127	#define PAGE_KERNEL_X __pgprot(_PAGE_BASE \| _PAGE_KERNEL_RWX)
	128	#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE \| _PAGE_KERNEL_RO)
	129	#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE \| _PAGE_KERNEL_ROX)
	130
	131	/*
	132	* Protection used for kernel text. We want the debuggers to be able to
	133	* set breakpoints anywhere, so don't write protect the kernel text
	134	* on platforms where such control is possible.
	135	*/
	136	#if defined(CONFIG_KGDB) \|\| defined(CONFIG_XMON) \|\| defined(CONFIG_BDI_SWITCH) \|\| \
	137	defined(CONFIG_KPROBES) \|\| defined(CONFIG_DYNAMIC_FTRACE)
	138	#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
	139	#else
	140	#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
	141	#endif
	142
	143	/* Make modules code happy. We don't set RO yet */
	144	#define PAGE_KERNEL_EXEC PAGE_KERNEL_X
	145	#define PAGE_AGP (PAGE_KERNEL_NC)
3dfcb315	146
ab537dca	147	#include <asm/book3s/64/hash.h>
3dfcb315 AK	148	#include <asm/barrier.h>
3dfcb315 AK	149
3dfcb315 AK	150	/*
	151	* The second half of the kernel virtual space is used for IO mappings,
	152	* it's itself carved into the PIO region (ISA and PHB IO space) and
	153	* the ioremap space
	154	*
	155	* ISA_IO_BASE = KERN_IO_START, 64K reserved area
	156	* PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
	157	* IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
	158	*/
	159	#define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
	160	#define FULL_IO_SIZE 0x80000000ul
	161	#define ISA_IO_BASE (KERN_IO_START)
	162	#define ISA_IO_END (KERN_IO_START + 0x10000ul)
	163	#define PHB_IO_BASE (ISA_IO_END)
	164	#define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
	165	#define IOREMAP_BASE (PHB_IO_END)
	166	#define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE)
	167
3dfcb315 AK	168	#define vmemmap ((struct page *)VMEMMAP_BASE)
3dfcb315 AK	169
b0412ea9	170	/* Advertise special mapping type for AGP */
b0412ea9 AK	171	#define HAVE_PAGE_AGP
	172
	173	/* Advertise support for _PAGE_SPECIAL */
	174	#define __HAVE_ARCH_PTE_SPECIAL
	175
3dfcb315 AK	176	#ifndef __ASSEMBLY__
	177
	178	/*
	179	* This is the default implementation of various PTE accessors, it's
	180	* used in all cases except Book3S with 64K pages where we have a
	181	* concept of sub-pages
	182	*/
	183	#ifndef __real_pte
	184
3dfcb315 AK	185	#define __real_pte(e,p) ((real_pte_t){(e)})
3dfcb315 AK	186	#define __rpte_to_pte(r) ((r).pte)
945537df	187	#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> H_PAGE_F_GIX_SHIFT)
3dfcb315 AK	188
	189	#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
	190	do { \
	191	index = 0; \
	192	shift = mmu_psize_defs[psize].shift; \
	193
	194	#define pte_iterate_hashed_end() } while(0)
	195
	196	/*
	197	* We expect this to be called only for user addresses or kernel virtual
	198	* addresses other than the linear mapping.
	199	*/
	200	#define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
	201
	202	#endif /* __real_pte */
	203
f281b5d5 AK	204	static inline void pmd_set(pmd_t *pmdp, unsigned long val)
	205	{
	206	*pmdp = __pmd(val);
	207	}
	208
	209	static inline void pmd_clear(pmd_t *pmdp)
	210	{
	211	*pmdp = __pmd(0);
	212	}
	213
3dfcb315	214	#define pmd_none(pmd) (!pmd_val(pmd))
3dfcb315	215	#define pmd_present(pmd) (!pmd_none(pmd))
3dfcb315	216
f281b5d5 AK	217	static inline void pud_set(pud_t *pudp, unsigned long val)
	218	{
	219	*pudp = __pud(val);
	220	}
	221
	222	static inline void pud_clear(pud_t *pudp)
	223	{
	224	*pudp = __pud(0);
	225	}
	226
3dfcb315	227	#define pud_none(pud) (!pud_val(pud))
3dfcb315	228	#define pud_present(pud) (pud_val(pud) != 0)
3dfcb315 AK	229
3dfcb315 AK	230	extern struct page *pud_page(pud_t pud);
371352ca	231	extern struct page *pmd_page(pmd_t pmd);
3dfcb315 AK	232	static inline pte_t pud_pte(pud_t pud)
	233	{
	234	return __pte(pud_val(pud));
	235	}
	236
	237	static inline pud_t pte_pud(pte_t pte)
	238	{
	239	return __pud(pte_val(pte));
	240	}
	241	#define pud_write(pud) pte_write(pud_pte(pud))
3dfcb315	242	#define pgd_write(pgd) pte_write(pgd_pte(pgd))
f281b5d5 AK	243	static inline void pgd_set(pgd_t *pgdp, unsigned long val)
	244	{
	245	*pgdp = __pgd(val);
	246	}
3dfcb315	247
368ced78 AK	248	static inline void pgd_clear(pgd_t *pgdp)
	249	{
	250	*pgdp = __pgd(0);
	251	}
	252
	253	#define pgd_none(pgd) (!pgd_val(pgd))
	254	#define pgd_present(pgd) (!pgd_none(pgd))
	255
	256	static inline pte_t pgd_pte(pgd_t pgd)
	257	{
	258	return __pte(pgd_val(pgd));
	259	}
	260
	261	static inline pgd_t pte_pgd(pte_t pte)
	262	{
	263	return __pgd(pte_val(pte));
	264	}
	265
	266	extern struct page *pgd_page(pgd_t pgd);
	267
3dfcb315 AK	268	/*
	269	* Find an entry in a page-table-directory. We combine the address region
	270	* (the high order N bits) and the pgd portion of the address.
	271	*/
3dfcb315 AK	272
	273	#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
	274
368ced78 AK	275	#define pud_offset(pgdp, addr) \
368ced78 AK	276	(((pud_t ) pgd_page_vaddr((pgdp))) + pud_index(addr))
3dfcb315	277	#define pmd_offset(pudp,addr) \
371352ca	278	(((pmd_t ) pud_page_vaddr((pudp))) + pmd_index(addr))
3dfcb315	279	#define pte_offset_kernel(dir,addr) \
371352ca	280	(((pte_t ) pmd_page_vaddr((dir))) + pte_index(addr))
3dfcb315 AK	281
	282	#define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
	283	#define pte_unmap(pte) do { } while(0)
	284
	285	/* to find an entry in a kernel page-table-directory */
	286	/* This now only contains the vmalloc pages */
	287	#define pgd_offset_k(address) pgd_offset(&init_mm, address)
3dfcb315 AK	288
	289	#define pte_ERROR(e) \
	290	pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
	291	#define pmd_ERROR(e) \
	292	pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
368ced78 AK	293	#define pud_ERROR(e) \
368ced78 AK	294	pr_err("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
3dfcb315 AK	295	#define pgd_ERROR(e) \
	296	pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
	297
	298	/* Encode and de-code a swap entry */
	299	#define MAX_SWAPFILES_CHECK() do { \
	300	BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
	301	/* \
	302	* Don't have overlapping bits with _PAGE_HPTEFLAGS \
	303	* We filter HPTEFLAGS on set_pte. \
	304	*/ \
	305	BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \
7207f436	306	BUILD_BUG_ON(_PAGE_HPTEFLAGS & _PAGE_SWP_SOFT_DIRTY); \
3dfcb315 AK	307	} while (0)
	308	/*
	309	* on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT;
	310	*/
	311	#define SWP_TYPE_BITS 5
	312	#define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \
	313	& ((1UL << SWP_TYPE_BITS) - 1))
96270b1f	314	#define __swp_offset(x) (((x).val & PTE_RPN_MASK) >> PAGE_SHIFT)
3dfcb315	315	#define __swp_entry(type, offset) ((swp_entry_t) { \
f1a9ae03	316	((type) << _PAGE_BIT_SWAP_TYPE) \
96270b1f	317	\| (((offset) << PAGE_SHIFT) & PTE_RPN_MASK)})
44734f23 AK	318	/*
	319	* swp_entry_t must be independent of pte bits. We build a swp_entry_t from
	320	* swap type and offset we get from swap and convert that to pte to find a
	321	* matching pte in linux page table.
	322	* Clear bits not found in swap entries here.
	323	*/
	324	#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) & ~_PAGE_PTE })
	325	#define __swp_entry_to_pte(x) __pte((x).val \| _PAGE_PTE)
3dfcb315	326
e7bfc462 AK	327	static inline bool pte_user(pte_t pte)
e7bfc462 AK	328	{
ac29c640	329	return !(pte_val(pte) & _PAGE_PRIVILEGED);
e7bfc462 AK	330	}
e7bfc462 AK	331
2f10f1a7	332	#ifdef CONFIG_MEM_SOFT_DIRTY
7207f436	333	#define _PAGE_SWP_SOFT_DIRTY (1UL << (SWP_TYPE_BITS + _PAGE_BIT_SWAP_TYPE))
2f10f1a7 HD	334	#else
	335	#define _PAGE_SWP_SOFT_DIRTY 0UL
	336	#endif /* CONFIG_MEM_SOFT_DIRTY */
	337
	338	#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
7207f436 LD	339	static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
	340	{
	341	return __pte(pte_val(pte) \| _PAGE_SWP_SOFT_DIRTY);
	342	}
	343	static inline bool pte_swp_soft_dirty(pte_t pte)
	344	{
	345	return !!(pte_val(pte) & _PAGE_SWP_SOFT_DIRTY);
	346	}
	347	static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
	348	{
	349	return __pte(pte_val(pte) & ~_PAGE_SWP_SOFT_DIRTY);
	350	}
7207f436 LD	351	#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
7207f436 LD	352
ac29c640 AK	353	static inline bool check_pte_access(unsigned long access, unsigned long ptev)
	354	{
	355	/*
	356	* This check for _PAGE_RWX and _PAGE_PRESENT bits
	357	*/
	358	if (access & ~ptev)
	359	return false;
	360	/*
	361	* This check for access to privilege space
	362	*/
	363	if ((access & _PAGE_PRIVILEGED) != (ptev & _PAGE_PRIVILEGED))
	364	return false;
	365
	366	return true;
	367	}
	368
3dfcb315 AK	369	void pgtable_cache_add(unsigned shift, void (ctor)(void ));
3dfcb315 AK	370	void pgtable_cache_init(void);
3dfcb315	371
3dfcb315 AK	372	struct page *realmode_pfn_to_page(unsigned long pfn);
3dfcb315 AK	373
3dfcb315	374	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
3dfcb315 AK	375	extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
	376	extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot);
	377	extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
	378	extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
	379	pmd_t *pmdp, pmd_t pmd);
	380	extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
	381	pmd_t *pmd);
3dfcb315	382	extern int has_transparent_hugepage(void);
3dfcb315 AK	383	#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
3dfcb315 AK	384
3dfcb315 AK	385
	386	static inline pte_t pmd_pte(pmd_t pmd)
	387	{
	388	return __pte(pmd_val(pmd));
	389	}
	390
	391	static inline pmd_t pte_pmd(pte_t pte)
	392	{
	393	return __pmd(pte_val(pte));
	394	}
	395
	396	static inline pte_t pmdp_ptep(pmd_t pmd)
	397	{
	398	return (pte_t *)pmd;
	399	}
	400
	401	#define pmd_pfn(pmd) pte_pfn(pmd_pte(pmd))
	402	#define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
	403	#define pmd_young(pmd) pte_young(pmd_pte(pmd))
	404	#define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
	405	#define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
	406	#define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
d5d6a443	407	#define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
3dfcb315 AK	408	#define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
3dfcb315 AK	409	#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
7207f436 LD	410
	411	#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
	412	#define pmd_soft_dirty(pmd) pte_soft_dirty(pmd_pte(pmd))
	413	#define pmd_mksoft_dirty(pmd) pte_pmd(pte_mksoft_dirty(pmd_pte(pmd)))
	414	#define pmd_clear_soft_dirty(pmd) pte_pmd(pte_clear_soft_dirty(pmd_pte(pmd)))
	415	#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
	416
1ca72129 AK	417	#ifdef CONFIG_NUMA_BALANCING
	418	static inline int pmd_protnone(pmd_t pmd)
	419	{
	420	return pte_protnone(pmd_pte(pmd));
	421	}
	422	#endif /* CONFIG_NUMA_BALANCING */
3dfcb315 AK	423
	424	#define __HAVE_ARCH_PMD_WRITE
	425	#define pmd_write(pmd) pte_write(pmd_pte(pmd))
	426
	427	static inline pmd_t pmd_mkhuge(pmd_t pmd)
	428	{
945537df	429	return __pmd(pmd_val(pmd) \| (_PAGE_PTE \| H_PAGE_THP_HUGE));
3dfcb315 AK	430	}
3dfcb315 AK	431
3dfcb315 AK	432	#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
	433	extern int pmdp_set_access_flags(struct vm_area_struct *vma,
	434	unsigned long address, pmd_t *pmdp,
	435	pmd_t entry, int dirty);
	436
3dfcb315 AK	437	#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
	438	extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
	439	unsigned long address, pmd_t *pmdp);
3dfcb315 AK	440
	441	#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
	442	extern pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
	443	unsigned long addr, pmd_t *pmdp);
	444
3dfcb315 AK	445	extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
	446	unsigned long address, pmd_t *pmdp);
	447	#define pmdp_collapse_flush pmdp_collapse_flush
	448
	449	#define __HAVE_ARCH_PGTABLE_DEPOSIT
	450	extern void pgtable_trans_huge_deposit(struct mm_struct mm, pmd_t pmdp,
	451	pgtable_t pgtable);
	452	#define __HAVE_ARCH_PGTABLE_WITHDRAW
	453	extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct mm, pmd_t pmdp);
	454
	455	#define __HAVE_ARCH_PMDP_INVALIDATE
	456	extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
	457	pmd_t *pmdp);
	458
c777e2a8 AK	459	#define __HAVE_ARCH_PMDP_HUGE_SPLIT_PREPARE
	460	extern void pmdp_huge_split_prepare(struct vm_area_struct *vma,
	461	unsigned long address, pmd_t *pmdp);
	462
3dfcb315 AK	463	#define pmd_move_must_withdraw pmd_move_must_withdraw
	464	struct spinlock;
	465	static inline int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
	466	struct spinlock *old_pmd_ptl)
	467	{
	468	/*
	469	* Archs like ppc64 use pgtable to store per pmd
	470	* specific information. So when we switch the pmd,
	471	* we should also withdraw and deposit the pgtable
	472	*/
	473	return true;
	474	}
	475	#endif /* __ASSEMBLY__ */
	476	#endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */