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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
ab537dca AK |
2 | #ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H |
3 | #define _ASM_POWERPC_BOOK3S_64_HASH_4K_H | |
4 | /* | |
5 | * Entries per page directory level. The PTE level must use a 64b record | |
6 | * for each page table entry. The PMD and PGD level use a 32b record for | |
7 | * each entry by assuming that each entry is page aligned. | |
8 | */ | |
dd1842a2 AK |
9 | #define H_PTE_INDEX_SIZE 9 |
10 | #define H_PMD_INDEX_SIZE 7 | |
11 | #define H_PUD_INDEX_SIZE 9 | |
92d9dfda | 12 | #define H_PGD_INDEX_SIZE 9 |
ab537dca AK |
13 | |
14 | #ifndef __ASSEMBLY__ | |
dd1842a2 AK |
15 | #define H_PTE_TABLE_SIZE (sizeof(pte_t) << H_PTE_INDEX_SIZE) |
16 | #define H_PMD_TABLE_SIZE (sizeof(pmd_t) << H_PMD_INDEX_SIZE) | |
17 | #define H_PUD_TABLE_SIZE (sizeof(pud_t) << H_PUD_INDEX_SIZE) | |
18 | #define H_PGD_TABLE_SIZE (sizeof(pgd_t) << H_PGD_INDEX_SIZE) | |
ab537dca | 19 | |
273b4936 RP |
20 | #define H_PAGE_F_GIX_SHIFT 53 |
21 | #define H_PAGE_F_SECOND _RPAGE_RPN44 /* HPTE is in 2ndary HPTEG */ | |
22 | #define H_PAGE_F_GIX (_RPAGE_RPN43 | _RPAGE_RPN42 | _RPAGE_RPN41) | |
9d2edb18 | 23 | #define H_PAGE_BUSY _RPAGE_RSV1 /* software: PTE & hash are busy */ |
273b4936 | 24 | #define H_PAGE_HASHPTE _RPAGE_RSV2 /* software: PTE & hash are busy */ |
9d2edb18 | 25 | |
c605782b | 26 | /* PTE flags to conserve for HPTE identification */ |
945537df AK |
27 | #define _PAGE_HPTEFLAGS (H_PAGE_BUSY | H_PAGE_HASHPTE | \ |
28 | H_PAGE_F_SECOND | H_PAGE_F_GIX) | |
29 | /* | |
30 | * Not supported by 4k linux page size | |
31 | */ | |
32 | #define H_PAGE_4K_PFN 0x0 | |
33 | #define H_PAGE_THP_HUGE 0x0 | |
34 | #define H_PAGE_COMBO 0x0 | |
5ed7ecd0 AK |
35 | #define H_PTE_FRAG_NR 0 |
36 | #define H_PTE_FRAG_SIZE_SHIFT 0 | |
1a2f7789 AK |
37 | |
38 | /* memory key bits, only 8 keys supported */ | |
39 | #define H_PTE_PKEY_BIT0 0 | |
40 | #define H_PTE_PKEY_BIT1 0 | |
41 | #define H_PTE_PKEY_BIT2 _RPAGE_RSV3 | |
42 | #define H_PTE_PKEY_BIT3 _RPAGE_RSV4 | |
43 | #define H_PTE_PKEY_BIT4 _RPAGE_RSV5 | |
44 | ||
ab537dca | 45 | /* |
368ced78 | 46 | * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range() |
ab537dca | 47 | */ |
ab537dca AK |
48 | #define remap_4k_pfn(vma, addr, pfn, prot) \ |
49 | remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot)) | |
50 | ||
26a344ae | 51 | #ifdef CONFIG_HUGETLB_PAGE |
c0a6c719 | 52 | static inline int hash__hugepd_ok(hugepd_t hpd) |
26a344ae | 53 | { |
20717e1f | 54 | unsigned long hpdval = hpd_val(hpd); |
26a344ae | 55 | /* |
6a119eae AK |
56 | * if it is not a pte and have hugepd shift mask |
57 | * set, then it is a hugepd directory pointer | |
26a344ae | 58 | */ |
20717e1f AK |
59 | if (!(hpdval & _PAGE_PTE) && |
60 | ((hpdval & HUGEPD_SHIFT_MASK) != 0)) | |
6a119eae AK |
61 | return true; |
62 | return false; | |
26a344ae | 63 | } |
26a344ae AK |
64 | #endif |
65 | ||
59aa31fd RP |
66 | /* |
67 | * 4K PTE format is different from 64K PTE format. Saving the hash_slot is just | |
68 | * a matter of returning the PTE bits that need to be modified. On 64K PTE, | |
69 | * things are a little more involved and hence needs many more parameters to | |
70 | * accomplish the same. However we want to abstract this out from the caller by | |
71 | * keeping the prototype consistent across the two formats. | |
72 | */ | |
73 | static inline unsigned long pte_set_hidx(pte_t *ptep, real_pte_t rpte, | |
ff31e105 AK |
74 | unsigned int subpg_index, unsigned long hidx, |
75 | int offset) | |
59aa31fd RP |
76 | { |
77 | return (hidx << H_PAGE_F_GIX_SHIFT) & | |
78 | (H_PAGE_F_SECOND | H_PAGE_F_GIX); | |
79 | } | |
80 | ||
ab624762 AK |
81 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
82 | ||
83 | static inline char *get_hpte_slot_array(pmd_t *pmdp) | |
84 | { | |
85 | BUG(); | |
86 | return NULL; | |
87 | } | |
88 | ||
89 | static inline unsigned int hpte_valid(unsigned char *hpte_slot_array, int index) | |
90 | { | |
91 | BUG(); | |
92 | return 0; | |
93 | } | |
94 | ||
95 | static inline unsigned int hpte_hash_index(unsigned char *hpte_slot_array, | |
96 | int index) | |
97 | { | |
98 | BUG(); | |
99 | return 0; | |
100 | } | |
101 | ||
102 | static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array, | |
103 | unsigned int index, unsigned int hidx) | |
104 | { | |
105 | BUG(); | |
106 | } | |
107 | ||
108 | static inline int hash__pmd_trans_huge(pmd_t pmd) | |
109 | { | |
110 | return 0; | |
111 | } | |
112 | ||
113 | static inline int hash__pmd_same(pmd_t pmd_a, pmd_t pmd_b) | |
114 | { | |
115 | BUG(); | |
116 | return 0; | |
117 | } | |
118 | ||
119 | static inline pmd_t hash__pmd_mkhuge(pmd_t pmd) | |
120 | { | |
121 | BUG(); | |
122 | return pmd; | |
123 | } | |
124 | ||
125 | extern unsigned long hash__pmd_hugepage_update(struct mm_struct *mm, | |
126 | unsigned long addr, pmd_t *pmdp, | |
127 | unsigned long clr, unsigned long set); | |
128 | extern pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *vma, | |
129 | unsigned long address, pmd_t *pmdp); | |
130 | extern void hash__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, | |
131 | pgtable_t pgtable); | |
132 | extern pgtable_t hash__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); | |
ab624762 AK |
133 | extern pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm, |
134 | unsigned long addr, pmd_t *pmdp); | |
135 | extern int hash__has_transparent_hugepage(void); | |
136 | #endif | |
137 | ||
ab537dca AK |
138 | #endif /* !__ASSEMBLY__ */ |
139 | ||
140 | #endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */ |