Commit | Line | Data |
---|---|---|
77e03a22 KG |
1 | /* |
2 | * STX GP3 - 8560 ADS Device Tree Source | |
3 | * | |
4 | * Copyright 2008 Freescale Semiconductor Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
10 | */ | |
11 | ||
12 | /dts-v1/; | |
13 | ||
14 | / { | |
15 | model = "stx,gp3"; | |
16 | compatible = "stx,gp3-8560", "stx,gp3"; | |
17 | #address-cells = <1>; | |
18 | #size-cells = <1>; | |
19 | ||
20 | aliases { | |
21 | ethernet0 = &enet0; | |
22 | ethernet1 = &enet1; | |
23 | serial0 = &serial0; | |
24 | pci0 = &pci0; | |
25 | }; | |
26 | ||
27 | cpus { | |
28 | #address-cells = <1>; | |
29 | #size-cells = <0>; | |
30 | ||
31 | PowerPC,8560@0 { | |
32 | device_type = "cpu"; | |
33 | reg = <0>; | |
34 | d-cache-line-size = <32>; | |
35 | i-cache-line-size = <32>; | |
36 | d-cache-size = <32768>; | |
37 | i-cache-size = <32768>; | |
38 | timebase-frequency = <0>; | |
39 | bus-frequency = <0>; | |
40 | clock-frequency = <0>; | |
c054065b | 41 | next-level-cache = <&L2>; |
77e03a22 KG |
42 | }; |
43 | }; | |
44 | ||
45 | memory { | |
46 | device_type = "memory"; | |
47 | reg = <0x00000000 0x10000000>; | |
48 | }; | |
49 | ||
f67be814 | 50 | soc@fdf00000 { |
77e03a22 KG |
51 | #address-cells = <1>; |
52 | #size-cells = <1>; | |
53 | device_type = "soc"; | |
54 | ranges = <0 0xfdf00000 0x100000>; | |
55 | reg = <0xfdf00000 0x1000>; | |
56 | bus-frequency = <0>; | |
57 | compatible = "fsl,mpc8560-immr", "simple-bus"; | |
58 | ||
59 | memory-controller@2000 { | |
60 | compatible = "fsl,8540-memory-controller"; | |
61 | reg = <0x2000 0x1000>; | |
62 | interrupt-parent = <&mpic>; | |
63 | interrupts = <18 2>; | |
64 | }; | |
65 | ||
c054065b | 66 | L2: l2-cache-controller@20000 { |
77e03a22 KG |
67 | compatible = "fsl,8540-l2-cache-controller"; |
68 | reg = <0x20000 0x1000>; | |
69 | cache-line-size = <32>; | |
70 | cache-size = <0x40000>; // L2, 256K | |
71 | interrupt-parent = <&mpic>; | |
72 | interrupts = <16 2>; | |
73 | }; | |
74 | ||
75 | i2c@3000 { | |
76 | #address-cells = <1>; | |
77 | #size-cells = <0>; | |
78 | cell-index = <0>; | |
79 | compatible = "fsl-i2c"; | |
80 | reg = <0x3000 0x100>; | |
81 | interrupts = <43 2>; | |
82 | interrupt-parent = <&mpic>; | |
83 | dfsrr; | |
84 | }; | |
85 | ||
dee80553 KG |
86 | dma@21300 { |
87 | #address-cells = <1>; | |
88 | #size-cells = <1>; | |
89 | compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; | |
90 | reg = <0x21300 0x4>; | |
91 | ranges = <0x0 0x21100 0x200>; | |
92 | cell-index = <0>; | |
93 | dma-channel@0 { | |
94 | compatible = "fsl,mpc8560-dma-channel", | |
95 | "fsl,eloplus-dma-channel"; | |
96 | reg = <0x0 0x80>; | |
97 | cell-index = <0>; | |
98 | interrupt-parent = <&mpic>; | |
99 | interrupts = <20 2>; | |
100 | }; | |
101 | dma-channel@80 { | |
102 | compatible = "fsl,mpc8560-dma-channel", | |
103 | "fsl,eloplus-dma-channel"; | |
104 | reg = <0x80 0x80>; | |
105 | cell-index = <1>; | |
106 | interrupt-parent = <&mpic>; | |
107 | interrupts = <21 2>; | |
108 | }; | |
109 | dma-channel@100 { | |
110 | compatible = "fsl,mpc8560-dma-channel", | |
111 | "fsl,eloplus-dma-channel"; | |
112 | reg = <0x100 0x80>; | |
113 | cell-index = <2>; | |
114 | interrupt-parent = <&mpic>; | |
115 | interrupts = <22 2>; | |
116 | }; | |
117 | dma-channel@180 { | |
118 | compatible = "fsl,mpc8560-dma-channel", | |
119 | "fsl,eloplus-dma-channel"; | |
120 | reg = <0x180 0x80>; | |
121 | cell-index = <3>; | |
122 | interrupt-parent = <&mpic>; | |
123 | interrupts = <23 2>; | |
124 | }; | |
125 | }; | |
126 | ||
77e03a22 | 127 | enet0: ethernet@24000 { |
84ba4a58 AV |
128 | #address-cells = <1>; |
129 | #size-cells = <1>; | |
77e03a22 KG |
130 | cell-index = <0>; |
131 | device_type = "network"; | |
132 | model = "TSEC"; | |
133 | compatible = "gianfar"; | |
134 | reg = <0x24000 0x1000>; | |
84ba4a58 | 135 | ranges = <0x0 0x24000 0x1000>; |
77e03a22 KG |
136 | local-mac-address = [ 00 00 00 00 00 00 ]; |
137 | interrupts = <29 2 30 2 34 2>; | |
138 | interrupt-parent = <&mpic>; | |
b31a1d8b | 139 | tbi-handle = <&tbi0>; |
77e03a22 | 140 | phy-handle = <&phy2>; |
84ba4a58 AV |
141 | |
142 | mdio@520 { | |
143 | #address-cells = <1>; | |
144 | #size-cells = <0>; | |
145 | compatible = "fsl,gianfar-mdio"; | |
146 | reg = <0x520 0x20>; | |
147 | ||
148 | phy2: ethernet-phy@2 { | |
149 | interrupt-parent = <&mpic>; | |
150 | interrupts = <5 4>; | |
151 | reg = <2>; | |
152 | device_type = "ethernet-phy"; | |
153 | }; | |
154 | phy4: ethernet-phy@4 { | |
155 | interrupt-parent = <&mpic>; | |
156 | interrupts = <5 4>; | |
157 | reg = <4>; | |
158 | device_type = "ethernet-phy"; | |
159 | }; | |
160 | tbi0: tbi-phy@11 { | |
161 | reg = <0x11>; | |
162 | device_type = "tbi-phy"; | |
163 | }; | |
164 | }; | |
77e03a22 KG |
165 | }; |
166 | ||
167 | enet1: ethernet@25000 { | |
84ba4a58 AV |
168 | #address-cells = <1>; |
169 | #size-cells = <1>; | |
77e03a22 KG |
170 | cell-index = <1>; |
171 | device_type = "network"; | |
172 | model = "TSEC"; | |
173 | compatible = "gianfar"; | |
174 | reg = <0x25000 0x1000>; | |
84ba4a58 | 175 | ranges = <0x0 0x25000 0x1000>; |
77e03a22 KG |
176 | local-mac-address = [ 00 00 00 00 00 00 ]; |
177 | interrupts = <35 2 36 2 40 2>; | |
178 | interrupt-parent = <&mpic>; | |
b31a1d8b | 179 | tbi-handle = <&tbi1>; |
77e03a22 | 180 | phy-handle = <&phy4>; |
84ba4a58 AV |
181 | |
182 | mdio@520 { | |
183 | #address-cells = <1>; | |
184 | #size-cells = <0>; | |
185 | compatible = "fsl,gianfar-tbi"; | |
186 | reg = <0x520 0x20>; | |
187 | ||
188 | tbi1: tbi-phy@11 { | |
189 | reg = <0x11>; | |
190 | device_type = "tbi-phy"; | |
191 | }; | |
192 | }; | |
77e03a22 KG |
193 | }; |
194 | ||
195 | mpic: pic@40000 { | |
196 | interrupt-controller; | |
197 | #address-cells = <0>; | |
198 | #interrupt-cells = <2>; | |
199 | reg = <0x40000 0x40000>; | |
acd4b715 | 200 | compatible = "chrp,open-pic"; |
77e03a22 KG |
201 | device_type = "open-pic"; |
202 | }; | |
203 | ||
204 | cpm@919c0 { | |
205 | #address-cells = <1>; | |
206 | #size-cells = <1>; | |
207 | compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus"; | |
208 | reg = <0x919c0 0x30>; | |
209 | ranges; | |
210 | ||
211 | muram@80000 { | |
212 | #address-cells = <1>; | |
213 | #size-cells = <1>; | |
214 | ranges = <0 0x80000 0x10000>; | |
215 | ||
216 | data@0 { | |
217 | compatible = "fsl,cpm-muram-data"; | |
218 | reg = <0 0x4000 0x9000 0x2000>; | |
219 | }; | |
220 | }; | |
221 | ||
222 | brg@919f0 { | |
223 | compatible = "fsl,mpc8560-brg", | |
224 | "fsl,cpm2-brg", | |
225 | "fsl,cpm-brg"; | |
226 | reg = <0x919f0 0x10 0x915f0 0x10>; | |
227 | clock-frequency = <0>; | |
228 | }; | |
229 | ||
230 | cpmpic: pic@90c00 { | |
231 | interrupt-controller; | |
232 | #address-cells = <0>; | |
233 | #interrupt-cells = <2>; | |
234 | interrupts = <46 2>; | |
235 | interrupt-parent = <&mpic>; | |
236 | reg = <0x90c00 0x80>; | |
237 | compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; | |
238 | }; | |
239 | ||
240 | serial0: serial@91a20 { | |
241 | device_type = "serial"; | |
242 | compatible = "fsl,mpc8560-scc-uart", | |
243 | "fsl,cpm2-scc-uart"; | |
244 | reg = <0x91a20 0x20 0x88100 0x100>; | |
245 | fsl,cpm-brg = <2>; | |
246 | fsl,cpm-command = <0x4a00000>; | |
247 | interrupts = <41 8>; | |
248 | interrupt-parent = <&cpmpic>; | |
249 | }; | |
250 | }; | |
251 | }; | |
252 | ||
253 | pci0: pci@fdf08000 { | |
254 | cell-index = <0>; | |
255 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | |
256 | interrupt-map = < | |
257 | ||
258 | /* IDSEL 0x0c */ | |
259 | 0x6000 0 0 1 &mpic 1 1 | |
260 | 0x6000 0 0 2 &mpic 2 1 | |
261 | 0x6000 0 0 3 &mpic 3 1 | |
262 | 0x6000 0 0 4 &mpic 4 1 | |
263 | ||
264 | /* IDSEL 0x0d */ | |
265 | 0x6800 0 0 1 &mpic 4 1 | |
266 | 0x6800 0 0 2 &mpic 1 1 | |
267 | 0x6800 0 0 3 &mpic 2 1 | |
268 | 0x6800 0 0 4 &mpic 3 1 | |
269 | ||
270 | /* IDSEL 0x0e */ | |
271 | 0x7000 0 0 1 &mpic 3 1 | |
272 | 0x7000 0 0 2 &mpic 4 1 | |
273 | 0x7000 0 0 3 &mpic 1 1 | |
274 | 0x7000 0 0 4 &mpic 2 1 | |
275 | ||
276 | /* IDSEL 0x0f */ | |
277 | 0x7800 0 0 1 &mpic 2 1 | |
278 | 0x7800 0 0 2 &mpic 3 1 | |
279 | 0x7800 0 0 3 &mpic 4 1 | |
280 | 0x7800 0 0 4 &mpic 1 1>; | |
281 | ||
282 | interrupt-parent = <&mpic>; | |
283 | interrupts = <24 2>; | |
284 | bus-range = <0 0>; | |
285 | ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 | |
286 | 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>; | |
287 | clock-frequency = <66666666>; | |
288 | #interrupt-cells = <1>; | |
289 | #size-cells = <2>; | |
290 | #address-cells = <3>; | |
291 | reg = <0xfdf08000 0x1000>; | |
292 | compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; | |
293 | device_type = "pci"; | |
294 | }; | |
295 | }; |