projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 6c538111 PG |
1 | /* |
| 2 | * SBC8349E Device Tree Source | |
| 3 | * | |
| 4 | * Copyright 2007 Wind River Inc. | |
| 5 | * | |
| 6 | * Paul Gortmaker (see MAINTAINERS for contact information) | |
| 7 | * | |
| 8 | * -based largely on the Freescale MPC834x_MDS dts. | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify it | |
| 11 | * under the terms of the GNU General Public License as published by the | |
| 12 | * Free Software Foundation; either version 2 of the License, or (at your | |
| 13 | * option) any later version. | |
| 14 | */ | |
| 15 | ||
| 16 | /dts-v1/; | |
| 17 | ||
| 18 | / { | |
| 19 | model = "SBC8349E"; | |
| 20 | compatible = "SBC834xE"; | |
| 21 | #address-cells = <1>; | |
| 22 | #size-cells = <1>; | |
| 23 | ||
| 24 | aliases { | |
| 25 | ethernet0 = &enet0; | |
| 26 | ethernet1 = &enet1; | |
| 27 | serial0 = &serial0; | |
| 28 | serial1 = &serial1; | |
| 29 | pci0 = &pci0; | |
| 30 | }; | |
| 31 | ||
| 32 | cpus { | |
| 33 | #address-cells = <1>; | |
| 34 | #size-cells = <0>; | |
| 35 | ||
| 36 | PowerPC,8349@0 { | |
| 37 | device_type = "cpu"; | |
| cda13dd1 PG |
38 | reg = <0x0>; |
| 39 | d-cache-line-size = <32>; | |
| 40 | i-cache-line-size = <32>; | |
| 41 | d-cache-size = <32768>; | |
| 42 | i-cache-size = <32768>; | |
| 6c538111 PG |
43 | timebase-frequency = <0>; // from bootloader |
| 44 | bus-frequency = <0>; // from bootloader | |
| 45 | clock-frequency = <0>; // from bootloader | |
| 46 | }; | |
| 47 | }; | |
| 48 | ||
| 49 | memory { | |
| 50 | device_type = "memory"; | |
| 51 | reg = <0x00000000 0x10000000>; // 256MB at 0 | |
| 52 | }; | |
| 53 | ||
| 54 | soc8349@e0000000 { | |
| 55 | #address-cells = <1>; | |
| 56 | #size-cells = <1>; | |
| 57 | device_type = "soc"; | |
| 58 | ranges = <0x0 0xe0000000 0x00100000>; | |
| 59 | reg = <0xe0000000 0x00000200>; | |
| 60 | bus-frequency = <0>; | |
| 61 | ||
| 62 | wdt@200 { | |
| 63 | compatible = "mpc83xx_wdt"; | |
| 64 | reg = <0x200 0x100>; | |
| 65 | }; | |
| 66 | ||
| 67 | i2c@3000 { | |
| 68 | #address-cells = <1>; | |
| 69 | #size-cells = <0>; | |
| 70 | cell-index = <0>; | |
| 71 | compatible = "fsl-i2c"; | |
| 72 | reg = <0x3000 0x100>; | |
| cda13dd1 | 73 | interrupts = <14 0x8>; |
| 6c538111 PG |
74 | interrupt-parent = <&ipic>; |
| 75 | dfsrr; | |
| 76 | }; | |
| 77 | ||
| 78 | i2c@3100 { | |
| 79 | #address-cells = <1>; | |
| 80 | #size-cells = <0>; | |
| 81 | cell-index = <1>; | |
| 82 | compatible = "fsl-i2c"; | |
| 83 | reg = <0x3100 0x100>; | |
| cda13dd1 | 84 | interrupts = <15 0x8>; |
| 6c538111 PG |
85 | interrupt-parent = <&ipic>; |
| 86 | dfsrr; | |
| 87 | }; | |
| 88 | ||
| 89 | spi@7000 { | |
| f3a2b29d AV |
90 | cell-index = <0>; |
| 91 | compatible = "fsl,spi"; | |
| 6c538111 | 92 | reg = <0x7000 0x1000>; |
| cda13dd1 | 93 | interrupts = <16 0x8>; |
| 6c538111 PG |
94 | interrupt-parent = <&ipic>; |
| 95 | mode = "cpu"; | |
| 96 | }; | |
| 97 | ||
| dee80553 KG |
98 | dma@82a8 { |
| 99 | #address-cells = <1>; | |
| 100 | #size-cells = <1>; | |
| 101 | compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; | |
| 102 | reg = <0x82a8 4>; | |
| 103 | ranges = <0 0x8100 0x1a8>; | |
| 104 | interrupt-parent = <&ipic>; | |
| 105 | interrupts = <71 8>; | |
| 106 | cell-index = <0>; | |
| 107 | dma-channel@0 { | |
| 108 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | |
| 109 | reg = <0 0x80>; | |
| 110 | interrupt-parent = <&ipic>; | |
| 111 | interrupts = <71 8>; | |
| 112 | }; | |
| 113 | dma-channel@80 { | |
| 114 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | |
| 115 | reg = <0x80 0x80>; | |
| 116 | interrupt-parent = <&ipic>; | |
| 117 | interrupts = <71 8>; | |
| 118 | }; | |
| 119 | dma-channel@100 { | |
| 120 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | |
| 121 | reg = <0x100 0x80>; | |
| 122 | interrupt-parent = <&ipic>; | |
| 123 | interrupts = <71 8>; | |
| 124 | }; | |
| 125 | dma-channel@180 { | |
| 126 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | |
| 127 | reg = <0x180 0x28>; | |
| 128 | interrupt-parent = <&ipic>; | |
| 129 | interrupts = <71 8>; | |
| 130 | }; | |
| 131 | }; | |
| 132 | ||
| 6c538111 PG |
133 | /* phy type (ULPI or SERIAL) are only types supported for MPH */ |
| 134 | /* port = 0 or 1 */ | |
| 135 | usb@22000 { | |
| 136 | compatible = "fsl-usb2-mph"; | |
| 137 | reg = <0x22000 0x1000>; | |
| 138 | #address-cells = <1>; | |
| 139 | #size-cells = <0>; | |
| 140 | interrupt-parent = <&ipic>; | |
| cda13dd1 | 141 | interrupts = <39 0x8>; |
| 6c538111 PG |
142 | phy_type = "ulpi"; |
| 143 | port1; | |
| 144 | }; | |
| 145 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ | |
| 146 | usb@23000 { | |
| 147 | device_type = "usb"; | |
| 148 | compatible = "fsl-usb2-dr"; | |
| 149 | reg = <0x23000 0x1000>; | |
| 150 | #address-cells = <1>; | |
| 151 | #size-cells = <0>; | |
| 152 | interrupt-parent = <&ipic>; | |
| cda13dd1 | 153 | interrupts = <38 0x8>; |
| 6c538111 PG |
154 | dr_mode = "otg"; |
| 155 | phy_type = "ulpi"; | |
| 156 | }; | |
| 157 | ||
| 158 | mdio@24520 { | |
| 159 | #address-cells = <1>; | |
| 160 | #size-cells = <0>; | |
| 161 | compatible = "fsl,gianfar-mdio"; | |
| 162 | reg = <0x24520 0x20>; | |
| 163 | ||
| 164 | phy0: ethernet-phy@19 { | |
| 165 | interrupt-parent = <&ipic>; | |
| cda13dd1 | 166 | interrupts = <20 0x8>; |
| 6c538111 PG |
167 | reg = <0x19>; |
| 168 | device_type = "ethernet-phy"; | |
| 169 | }; | |
| 170 | phy1: ethernet-phy@1a { | |
| 171 | interrupt-parent = <&ipic>; | |
| cda13dd1 | 172 | interrupts = <21 0x8>; |
| 6c538111 PG |
173 | reg = <0x1a>; |
| 174 | device_type = "ethernet-phy"; | |
| 175 | }; | |
| 176 | }; | |
| 177 | ||
| 178 | enet0: ethernet@24000 { | |
| 179 | cell-index = <0>; | |
| 180 | device_type = "network"; | |
| 181 | model = "TSEC"; | |
| 182 | compatible = "gianfar"; | |
| 183 | reg = <0x24000 0x1000>; | |
| 184 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
| cda13dd1 | 185 | interrupts = <32 0x8 33 0x8 34 0x8>; |
| 6c538111 PG |
186 | interrupt-parent = <&ipic>; |
| 187 | phy-handle = <&phy0>; | |
| 188 | linux,network-index = <0>; | |
| 189 | }; | |
| 190 | ||
| 191 | enet1: ethernet@25000 { | |
| 192 | cell-index = <1>; | |
| 193 | device_type = "network"; | |
| 194 | model = "TSEC"; | |
| 195 | compatible = "gianfar"; | |
| 196 | reg = <0x25000 0x1000>; | |
| 197 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
| cda13dd1 | 198 | interrupts = <35 0x8 36 0x8 37 0x8>; |
| 6c538111 PG |
199 | interrupt-parent = <&ipic>; |
| 200 | phy-handle = <&phy1>; | |
| 201 | linux,network-index = <1>; | |
| 202 | }; | |
| 203 | ||
| 204 | serial0: serial@4500 { | |
| 205 | cell-index = <0>; | |
| 206 | device_type = "serial"; | |
| 207 | compatible = "ns16550"; | |
| 208 | reg = <0x4500 0x100>; | |
| 209 | clock-frequency = <0>; | |
| cda13dd1 | 210 | interrupts = <9 0x8>; |
| 6c538111 PG |
211 | interrupt-parent = <&ipic>; |
| 212 | }; | |
| 213 | ||
| 214 | serial1: serial@4600 { | |
| 215 | cell-index = <1>; | |
| 216 | device_type = "serial"; | |
| 217 | compatible = "ns16550"; | |
| 218 | reg = <0x4600 0x100>; | |
| 219 | clock-frequency = <0>; | |
| cda13dd1 | 220 | interrupts = <10 0x8>; |
| 6c538111 PG |
221 | interrupt-parent = <&ipic>; |
| 222 | }; | |
| 223 | ||
| 6c538111 | 224 | crypto@30000 { |
| 3fd44736 | 225 | compatible = "fsl,sec2.0"; |
| 6c538111 | 226 | reg = <0x30000 0x10000>; |
| cda13dd1 | 227 | interrupts = <11 0x8>; |
| 6c538111 | 228 | interrupt-parent = <&ipic>; |
| 3fd44736 KP |
229 | fsl,num-channels = <4>; |
| 230 | fsl,channel-fifo-len = <24>; | |
| 231 | fsl,exec-units-mask = <0x7e>; | |
| 232 | fsl,descriptor-types-mask = <0x01010ebf>; | |
| 6c538111 PG |
233 | }; |
| 234 | ||
| 235 | /* IPIC | |
| 236 | * interrupts cell = <intr #, sense> | |
| 237 | * sense values match linux IORESOURCE_IRQ_* defines: | |
| 238 | * sense == 8: Level, low assertion | |
| 239 | * sense == 2: Edge, high-to-low change | |
| 240 | */ | |
| 241 | ipic: pic@700 { | |
| 242 | interrupt-controller; | |
| 243 | #address-cells = <0>; | |
| 244 | #interrupt-cells = <2>; | |
| 245 | reg = <0x700 0x100>; | |
| 246 | device_type = "ipic"; | |
| 247 | }; | |
| 248 | }; | |
| 249 | ||
| 250 | pci0: pci@e0008500 { | |
| 251 | cell-index = <1>; | |
| 252 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | |
| 253 | interrupt-map = < | |
| 254 | ||
| 255 | /* IDSEL 0x11 */ | |
| cda13dd1 PG |
256 | 0x8800 0x0 0x0 0x1 &ipic 20 0x8 |
| 257 | 0x8800 0x0 0x0 0x2 &ipic 21 0x8 | |
| 258 | 0x8800 0x0 0x0 0x3 &ipic 22 0x8 | |
| 259 | 0x8800 0x0 0x0 0x4 &ipic 23 0x8>; | |
| 6c538111 PG |
260 | |
| 261 | interrupt-parent = <&ipic>; | |
| 262 | interrupts = <0x42 0x8>; | |
| 263 | bus-range = <0 0>; | |
| 264 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 | |
| 265 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | |
| 266 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; | |
| 267 | clock-frequency = <66666666>; | |
| 268 | #interrupt-cells = <1>; | |
| 269 | #size-cells = <2>; | |
| 270 | #address-cells = <3>; | |
| 271 | reg = <0xe0008500 0x100>; | |
| 272 | compatible = "fsl,mpc8349-pci"; | |
| 273 | device_type = "pci"; | |
| 274 | }; | |
| 275 | }; |